- add (partial?) i/o mode support.
- add partial cs8920 support. - add detach code. - add a quirk for EtherJet PCMCIA with cardbus bridge. (above "partial" means "engough to support EtherJet PCMCIA")
This commit is contained in:
yamt
parent
96aece1560
commit
ce170de115
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@ -1,4 +1,4 @@
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/* $NetBSD: cs89x0.c,v 1.20 2001/11/13 08:01:11 lukem Exp $ */
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/* $NetBSD: cs89x0.c,v 1.21 2001/11/24 20:18:55 yamt Exp $ */
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/*
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* Copyright 1997
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@ -186,7 +186,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: cs89x0.c,v 1.20 2001/11/13 08:01:11 lukem Exp $");
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__KERNEL_RCSID(0, "$NetBSD: cs89x0.c,v 1.21 2001/11/24 20:18:55 yamt Exp $");
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#include "opt_inet.h"
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@ -310,7 +310,7 @@ int cs_default_media[] = {
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};
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int cs_default_nmedia = sizeof(cs_default_media) / sizeof(cs_default_media[0]);
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void
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int
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cs_attach(sc, enaddr, media, nmedia, defmedia)
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struct cs_softc *sc;
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u_int8_t *enaddr;
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@ -321,7 +321,22 @@ cs_attach(sc, enaddr, media, nmedia, defmedia)
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u_int16_t reg;
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int i;
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reg = CS_READ_PACKET_PAGE_IO(sc->sc_iot, sc->sc_ioh, PKTPG_PRODUCT_ID);
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/* Start out in IO mode */
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sc->sc_memorymode = FALSE;
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/* make sure we're right */
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for (i = 0; i < 10000; i++) {
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reg = CS_READ_PACKET_PAGE(sc, PKTPG_EISA_NUM);
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if (reg == EISA_NUM_CRYSTAL) {
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break;
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}
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}
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if (i == 10000) {
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printf("%s: wrong id(0x%x)\n", sc->sc_dev.dv_xname, reg);
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return 1; /* XXX should panic? */
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}
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reg = CS_READ_PACKET_PAGE(sc, PKTPG_PRODUCT_ID);
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sc->sc_prodid = reg & PROD_ID_MASK;
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sc->sc_prodrev = (reg & PROD_REV_MASK) >> 8;
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@ -348,12 +363,9 @@ cs_attach(sc, enaddr, media, nmedia, defmedia)
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if (MCLBYTES < ETHER_MAX_LEN) {
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printf("%s: MCLBYTES too small for Ethernet frame\n",
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sc->sc_dev.dv_xname);
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return;
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return 1;
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}
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/* Start out in IO mode */
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sc->sc_memorymode = FALSE;
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/* Start out not transmitting */
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sc->sc_txbusy = FALSE;
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@ -390,7 +402,7 @@ cs_attach(sc, enaddr, media, nmedia, defmedia)
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if (cs_get_params(sc) == CS_ERROR) {
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printf("%s: unable to get settings from EEPROM\n",
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sc->sc_dev.dv_xname);
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return;
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return 1;
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}
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}
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@ -401,11 +413,11 @@ cs_attach(sc, enaddr, media, nmedia, defmedia)
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if (cs_get_enaddr(sc) == CS_ERROR) {
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printf("%s: unable to read Ethernet address\n",
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sc->sc_dev.dv_xname);
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return;
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return 1;
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}
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} else {
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printf("%s: no Ethernet address!\n", sc->sc_dev.dv_xname);
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return;
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return 1;
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}
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switch (IFM_SUBTYPE(sc->sc_media.ifm_cur->ifm_media)) {
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@ -428,16 +440,6 @@ cs_attach(sc, enaddr, media, nmedia, defmedia)
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chipname, sc->sc_prodrev + 'A', ether_sprintf(sc->sc_enaddr),
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medname);
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/*
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* XXX Driver only supports memory-mode and dma-mode operation for now.
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* XXX FIXME!!
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*/
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if ((sc->sc_cfgflags & CFGFLG_MEM_MODE) == 0) {
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printf("%s: driver only supports memory mode\n",
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sc->sc_dev.dv_xname);
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return;
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}
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if (sc->sc_drq == ISACF_DRQ_DEFAULT)
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printf("%s: DMA channel unspecified, not using DMA\n",
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sc->sc_dev.dv_xname);
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@ -480,6 +482,7 @@ cs_attach(sc, enaddr, media, nmedia, defmedia)
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sc->sc_dmasize = CS8900_DMASIZE;
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sc->sc_cfgflags |= CFGFLG_DMA_MODE;
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sc->sc_dmaaddr = dma_addr;
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}
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after_dma_block:
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@ -487,7 +490,8 @@ cs_attach(sc, enaddr, media, nmedia, defmedia)
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if (sc->sc_sh == NULL) {
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printf("%s: unable to establish shutdownhook\n",
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sc->sc_dev.dv_xname);
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return;
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cs_detach(sc);
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return 1;
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}
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/* Attach the interface. */
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@ -498,10 +502,49 @@ cs_attach(sc, enaddr, media, nmedia, defmedia)
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rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
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RND_TYPE_NET, 0);
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#endif
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sc->sc_cfgflags |= CFGFLG_ATTACHED;
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/* Reset the chip */
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if (cs_reset_chip(sc) == CS_ERROR)
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if (cs_reset_chip(sc) == CS_ERROR) {
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printf("%s: reset failed\n", sc->sc_dev.dv_xname);
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cs_detach(sc);
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return 1;
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}
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return 0;
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}
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int
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cs_detach(sc)
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struct cs_softc *sc;
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{
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struct ifnet *ifp = &sc->sc_ethercom.ec_if;
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if (sc->sc_cfgflags & CFGFLG_ATTACHED) {
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#if NRND > 0
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rnd_detach_source(&sc->rnd_source);
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#endif
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ether_ifdetach(ifp);
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if_detach(ifp);
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sc->sc_cfgflags &= ~CFGFLG_ATTACHED;
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}
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if (sc->sc_sh != NULL)
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shutdownhook_disestablish(sc->sc_sh);
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#if 0
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/*
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* XXX not necessary
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*/
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if (sc->sc_cfgflags & CFGFLG_DMA_MODE) {
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isa_dmamem_unmap(sc->sc_ic, sc->sc_drq, sc->sc_dmabase, sc->sc_dmasize);
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isa_dmamem_free(sc->sc_ic, sc->sc_drq, sc->sc_dmaaddr, sc->sc_dmasize);
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isa_dmamap_destroy(sc->sc_ic, sc->sc_drq);
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sc->sc_cfgflags &= ~CFGFLG_DMA_MODE;
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}
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#endif
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return 0;
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}
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void
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@ -818,6 +861,10 @@ cs_initChip(sc)
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}
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}
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CS_WRITE_PACKET_PAGE(sc, PKTPG_SELF_CTL, selfCtl);
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/* enable normal link pulse */
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if (sc->sc_prodid == PROD_ID_CS8920 || sc->sc_prodid == PROD_ID_CS8920M)
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CS_WRITE_PACKET_PAGE(sc, PKTPG_AUTONEG_CTL, AUTOCTL_NLP_ENABLE);
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/* Enable full-duplex, if appropriate */
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if (sc->sc_media.ifm_cur->ifm_media & IFM_FDX)
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@ -952,11 +999,18 @@ cs_initChip(sc)
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CS_WRITE_PACKET_PAGE(sc, PKTPG_IND_ADDR + 2, myea[1]);
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CS_WRITE_PACKET_PAGE(sc, PKTPG_IND_ADDR + 4, myea[2]);
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/* Set the interrupt level in the chip */
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if (sc->sc_irq == 5) {
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CS_WRITE_PACKET_PAGE(sc, PKTPG_INT_NUM, 3);
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} else {
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CS_WRITE_PACKET_PAGE(sc, PKTPG_INT_NUM, (sc->sc_irq) - 10);
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if (sc->sc_irq != -1) {
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/* Set the interrupt level in the chip */
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if (sc->sc_prodid == PROD_ID_CS8900) {
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if (sc->sc_irq == 5) {
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CS_WRITE_PACKET_PAGE(sc, PKTPG_INT_NUM, 3);
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} else {
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CS_WRITE_PACKET_PAGE(sc, PKTPG_INT_NUM, (sc->sc_irq) - 10);
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}
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}
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else { /* CS8920 */
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CS_WRITE_PACKET_PAGE(sc, PKTPG_8920_INT_NUM, sc->sc_irq);
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}
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}
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/* write the multicast mask to the address filter register */
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@ -1288,9 +1342,12 @@ cs_intr(arg)
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}
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/* Read an event from the Interrupt Status Queue */
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Event = CS_READ_PACKET_PAGE(sc, PKTPG_ISQ);
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if (sc->sc_memorymode)
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Event = CS_READ_PACKET_PAGE(sc, PKTPG_ISQ);
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else
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Event = CS_READ_PORT(sc, PORT_ISQ);
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if ((Event & REG_NUM_MASK) == 0)
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if ((Event & REG_NUM_MASK) == 0 || Event == 0xffff)
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return 0; /* not ours */
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#if NRND > 0
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@ -1298,7 +1355,7 @@ cs_intr(arg)
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#endif
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/* Process all the events in the Interrupt Status Queue */
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while (Event != 0) {
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while ((Event & REG_NUM_MASK) != 0 && Event != 0xffff) {
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/* Dispatch to an event handler based on the register number */
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switch (Event & REG_NUM_MASK) {
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case REG_NUM_RX_EVENT:
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@ -1321,7 +1378,10 @@ cs_intr(arg)
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}
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/* Read another event from the Interrupt Status Queue */
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Event = CS_READ_PACKET_PAGE(sc, PKTPG_ISQ);
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if (sc->sc_memorymode)
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Event = CS_READ_PACKET_PAGE(sc, PKTPG_ISQ);
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else
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Event = CS_READ_PORT(sc, PORT_ISQ);
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}
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/* have handled the interupt */
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@ -1586,7 +1646,7 @@ cs_process_receive(sc)
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struct mbuf *m;
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int totlen;
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int len;
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volatile u_int16_t *pBuff, *pBuffLimit;
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u_int16_t *pBuff, *pBuffLimit;
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int pad;
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unsigned int frameOffset;
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@ -1599,12 +1659,21 @@ cs_process_receive(sc)
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/* Received a packet; carrier is up. */
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sc->sc_carrier = 1;
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/* Initialize the frame offset */
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frameOffset = PKTPG_RX_LENGTH;
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if (sc->sc_memorymode) {
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/* Initialize the frame offset */
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frameOffset = PKTPG_RX_LENGTH;
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/* Get the length of the received frame */
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totlen = bus_space_read_2(sc->sc_memt, sc->sc_memh, frameOffset);
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frameOffset += 2;
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/* Get the length of the received frame */
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totlen = CS_READ_PACKET_PAGE(sc, frameOffset);
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frameOffset += 2;
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}
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else {
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/* drop status */
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CS_READ_PORT(sc, PORT_RXTX_DATA);
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/* Get the length of the received frame */
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totlen = CS_READ_PORT(sc, PORT_RXTX_DATA);
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}
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MGETHDR(m, M_DONTWAIT, MT_DATA);
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if (m == 0) {
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@ -1647,16 +1716,22 @@ cs_process_receive(sc)
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/* align ip header on word boundary for ipintr */
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pad = ALIGN(sizeof(struct ether_header)) - sizeof(struct ether_header);
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m->m_data += pad;
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len -= pad + 1;
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m->m_len = len = min(totlen, len);
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pBuff = mtod(m, u_int16_t *);
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pBuffLimit = pBuff + (len + 1) / 2; /* don't want to go over */
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/* now read the data from the chip */
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while (pBuff < pBuffLimit) {
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*pBuff++ = bus_space_read_2(sc->sc_memt, sc->sc_memh,
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frameOffset);
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frameOffset += 2;
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if (sc->sc_memorymode) {
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pBuffLimit = pBuff + (len + 1) / 2; /* don't want to go over */
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while (pBuff < pBuffLimit) {
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*pBuff++ = CS_READ_PACKET_PAGE(sc, frameOffset);
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frameOffset += 2;
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}
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}
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else {
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bus_space_read_multi_2(sc->sc_iot, sc->sc_ioh, PORT_RXTX_DATA,
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pBuff, (len + 1)>>1);
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}
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cs_ether_input(sc, m);
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@ -1945,18 +2020,15 @@ cs_process_rx_early(sc)
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* frame
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*/
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oldFrameCount = 0;
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frameCount = bus_space_read_2(sc->sc_memt, sc->sc_memh,
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PKTPG_FRAME_BYTE_COUNT);
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frameCount = CS_READ_PACKET_PAGE(sc, PKTPG_FRAME_BYTE_COUNT);
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while ((frameCount != 0) && (frameCount < MCLBYTES)) {
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for (; oldFrameCount < frameCount; oldFrameCount += 2) {
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*pBuff++ = bus_space_read_2(sc->sc_memt, sc->sc_memh,
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frameOffset);
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*pBuff++ = CS_READ_PACKET_PAGE(sc, frameOffset);
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frameOffset += 2;
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}
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/* read the new count from the chip */
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frameCount = bus_space_read_2(sc->sc_memt, sc->sc_memh,
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PKTPG_FRAME_BYTE_COUNT);
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frameCount = CS_READ_PACKET_PAGE(sc, PKTPG_FRAME_BYTE_COUNT);
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}
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/* update the mbuf counts */
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@ -1971,10 +2043,8 @@ cs_process_rx_early(sc)
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* do an implied skip, it seems to be more reliable than a
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* forced skip.
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*/
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rxEvent = bus_space_read_2(sc->sc_memt, sc->sc_memh,
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PKTPG_RX_STATUS);
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rxEvent = bus_space_read_2(sc->sc_memt, sc->sc_memh,
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PKTPG_RX_LENGTH);
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rxEvent = CS_READ_PACKET_PAGE(sc, PKTPG_RX_STATUS);
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rxEvent = CS_READ_PACKET_PAGE(sc, PKTPG_RX_LENGTH);
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/*
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* now read the RX_EVENT register to perform an implied skip.
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@ -2050,9 +2120,16 @@ cs_start_output(ifp)
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* bus is too slow. Or possibly the copy routine is
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* not streamlined enough.
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*/
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CS_WRITE_PACKET_PAGE(sc, PKTPG_TX_CMD,
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cs_xmit_early_table[sc->sc_xe_ent].txcmd);
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CS_WRITE_PACKET_PAGE(sc, PKTPG_TX_LENGTH, Length);
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if (sc->sc_memorymode) {
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CS_WRITE_PACKET_PAGE(sc, PKTPG_TX_CMD,
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cs_xmit_early_table[sc->sc_xe_ent].txcmd);
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CS_WRITE_PACKET_PAGE(sc, PKTPG_TX_LENGTH, Length);
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}
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else {
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CS_WRITE_PORT(sc, PORT_TX_CMD,
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cs_xmit_early_table[sc->sc_xe_ent].txcmd);
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CS_WRITE_PORT(sc, PORT_TX_LENGTH, Length);
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}
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/*
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* Adjust early-transmit machinery.
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@ -2140,8 +2217,6 @@ cs_copy_tx_frame(sc, m0)
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struct cs_softc *sc;
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struct mbuf *m0;
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{
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bus_space_tag_t memt = sc->sc_memt;
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bus_space_handle_t memh = sc->sc_memh;
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struct mbuf *m;
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int len, leftover, frameoff;
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u_int16_t dbuf;
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@ -2177,8 +2252,13 @@ cs_copy_tx_frame(sc, m0)
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*/
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dbuf |= *p++ << 8;
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len--;
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bus_space_write_2(memt, memh, frameoff, dbuf);
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frameoff += 2;
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if (sc->sc_memorymode) {
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CS_WRITE_PACKET_PAGE(sc, frameoff, dbuf);
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frameoff += 2;
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}
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else {
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CS_WRITE_PORT(sc, PORT_RXTX_DATA, dbuf);
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}
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leftover = 0;
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} else if ((long) p & 1) {
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/*
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@ -2196,10 +2276,16 @@ cs_copy_tx_frame(sc, m0)
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*/
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leftover = len & 1;
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len &= ~1;
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bus_space_write_region_2(memt, memh, frameoff,
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(u_int16_t *) p, len >> 1);
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if (sc->sc_memorymode) {
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bus_space_write_region_2(sc->sc_memt, sc->sc_memh, frameoff,
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(u_int16_t *) p, len >> 1);
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frameoff += len;
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}
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else {
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bus_space_write_multi_2(sc->sc_iot, sc->sc_ioh,
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PORT_RXTX_DATA, (u_int16_t *)p, len >> 1);
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}
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p += len;
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frameoff += len;
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if (leftover)
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dbuf = *p++;
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@ -2213,6 +2299,12 @@ cs_copy_tx_frame(sc, m0)
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panic("cs_copy_tx_frame: p != lim");
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#endif
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}
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if (leftover)
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bus_space_write_2(memt, memh, frameoff, dbuf);
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if (leftover) {
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if (sc->sc_memorymode) {
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CS_WRITE_PACKET_PAGE(sc, frameoff, dbuf);
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}
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else {
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CS_WRITE_PORT(sc, PORT_RXTX_DATA, dbuf);
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}
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}
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: cs89x0reg.h,v 1.6 1998/07/25 00:41:47 thorpej Exp $ */
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/* $NetBSD: cs89x0reg.h,v 1.7 2001/11/24 20:18:55 yamt Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright 1997
|
||||
|
|
@ -143,6 +143,8 @@
|
|||
#define PKTPG_TX_LENGTH 0x0146
|
||||
#define PKTPG_LOG_ADDR 0x0150 /* logical address filter hash tbl */
|
||||
#define PKTPG_IND_ADDR 0x0158
|
||||
#define PKTPG_8920_INT_NUM 0x0370
|
||||
#define PKTPG_8920_DMA_CHANNEL 0x0374
|
||||
#define PKTPG_RX_STATUS 0x0400
|
||||
#define PKTPG_RX_LENGTH 0x0402
|
||||
#define PKTPG_RX_FRAME 0x0404
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: cs89x0var.h,v 1.9 2000/09/28 10:37:21 tsutsui Exp $ */
|
||||
/* $NetBSD: cs89x0var.h,v 1.10 2001/11/24 20:18:55 yamt Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright 1997
|
||||
|
|
@ -89,6 +89,7 @@ struct cs_softc {
|
|||
bus_addr_t sc_pktpgaddr; /* PacketPage bus memory address */
|
||||
|
||||
bus_size_t sc_dmasize; /* DMA size (16k or 64k) */
|
||||
bus_addr_t sc_dmaaddr; /* DMA address */
|
||||
caddr_t sc_dmabase; /* base DMA address (KVA) */
|
||||
caddr_t sc_dmacur; /* current DMA address (KVA) */
|
||||
|
||||
|
|
@ -110,9 +111,57 @@ struct cs_softc {
|
|||
#endif
|
||||
};
|
||||
|
||||
|
||||
/* Config Flags in cs_softc */
|
||||
|
||||
#define CFGFLG_MEM_MODE 0x0001
|
||||
#define CFGFLG_USE_SA 0x0002
|
||||
#define CFGFLG_IOCHRDY 0x0004
|
||||
#define CFGFLG_DCDC_POL 0x0008
|
||||
#define CFGFLG_DMA_MODE 0x0020
|
||||
#define CFGFLG_ATTACHED 0x0040 /* XXX should not be here? */
|
||||
#define CFGFLG_CARDBUS_HACK 0x0080
|
||||
#define CFGFLG_NOT_EEPROM 0x8000
|
||||
|
||||
|
||||
/*
|
||||
* Inlines for reading/writing the packet page area.
|
||||
*/
|
||||
|
||||
static __inline__ u_int16_t _cs_read_port(struct cs_softc *, int);
|
||||
|
||||
static __inline__ u_int16_t
|
||||
_cs_read_port(struct cs_softc *sc, int off)
|
||||
{
|
||||
u_int16_t result;
|
||||
|
||||
if (sc->sc_cfgflags & CFGFLG_CARDBUS_HACK) {
|
||||
/*
|
||||
* hack for EtherJet PCMCIA and cardbus (obtained from freebsd)
|
||||
*
|
||||
* EtherJet PCMCIA don't work with cardbus bridges
|
||||
* (at least TI1250) without this hack.
|
||||
*/
|
||||
result = (bus_space_read_1(sc->sc_iot, sc->sc_ioh, off) & 0xff);
|
||||
result |= ((bus_space_read_1(sc->sc_iot, sc->sc_ioh, off+1) & 0xff) << 8);
|
||||
}
|
||||
else {
|
||||
result = bus_space_read_2(sc->sc_iot, sc->sc_ioh, off);
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
static __inline__ u_int16_t _CS_READ_PACKET_PAGE_IO(struct cs_softc *, int);
|
||||
|
||||
static __inline__ u_int16_t
|
||||
_CS_READ_PACKET_PAGE_IO(struct cs_softc *sc, int offset)
|
||||
{
|
||||
|
||||
bus_space_write_2(sc->sc_iot, sc->sc_ioh, PORT_PKTPG_PTR, offset);
|
||||
return (_cs_read_port(sc, PORT_PKTPG_DATA));
|
||||
}
|
||||
|
||||
static __inline__ u_int16_t CS_READ_PACKET_PAGE_IO __P((bus_space_tag_t,
|
||||
bus_space_handle_t, int));
|
||||
|
||||
|
|
@ -133,7 +182,7 @@ CS_READ_PACKET_PAGE_IO(iot, ioh, offset)
|
|||
#define CS_READ_PACKET_PAGE(sc, offset) \
|
||||
((sc)->sc_memorymode ? CS_READ_PACKET_PAGE_MEM((sc)->sc_memt, \
|
||||
(sc)->sc_memh, (offset)) : \
|
||||
CS_READ_PACKET_PAGE_IO((sc)->sc_iot, (sc)->sc_ioh, (offset)))
|
||||
_CS_READ_PACKET_PAGE_IO((sc), (offset)))
|
||||
|
||||
#define CS_WRITE_PACKET_PAGE_IO(iot, ioh, offset, val) \
|
||||
do { \
|
||||
|
|
@ -154,19 +203,17 @@ do { \
|
|||
(offset), (val)); \
|
||||
} while (0)
|
||||
|
||||
#define CS_READ_PORT(sc, off)\
|
||||
bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, (off))
|
||||
|
||||
#define CS_WRITE_PORT(sc, off, val)\
|
||||
bus_space_write_2((sc)->sc_iot, (sc)->sc_ioh, (off), (val))
|
||||
|
||||
|
||||
/* Return Status */
|
||||
#define CS_ERROR -1
|
||||
#define CS_OK 1
|
||||
|
||||
/* Config Flags in cs_softc */
|
||||
|
||||
#define CFGFLG_MEM_MODE 0x0001
|
||||
#define CFGFLG_USE_SA 0x0002
|
||||
#define CFGFLG_IOCHRDY 0x0004
|
||||
#define CFGFLG_DCDC_POL 0x0008
|
||||
#define CFGFLG_DMA_MODE 0x0020
|
||||
#define CFGFLG_NOT_EEPROM 0x8000
|
||||
|
||||
|
||||
/* Media Type in cs_softc */
|
||||
|
||||
|
|
@ -179,8 +226,9 @@ do { \
|
|||
|
||||
#define MAXLOOP 0x8888
|
||||
|
||||
void cs_attach __P((struct cs_softc *sc, u_int8_t *enaddr,
|
||||
int cs_attach __P((struct cs_softc *sc, u_int8_t *enaddr,
|
||||
int *media, int nmedia, int defmedia));
|
||||
int cs_detach __P((struct cs_softc *sc));
|
||||
int cs_verify_eeprom __P((bus_space_tag_t, bus_space_handle_t));
|
||||
int cs_read_eeprom __P((bus_space_tag_t, bus_space_handle_t, int,
|
||||
u_int16_t *));
|
||||
|
|
|
|||
Loading…
Reference in New Issue