Fix flags to isa_dmastart().
This commit is contained in:
mycroft
parent
26a352d1dd
commit
ce06e718ad
@ -1,4 +1,4 @@
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/* $NetBSD: sb.c,v 1.14 1994/11/18 22:03:38 mycroft Exp $ */
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/* $NetBSD: sb.c,v 1.15 1994/12/17 18:45:11 mycroft Exp $ */
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/*
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* Copyright (c) 1991-1993 Regents of the University of California.
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@ -39,6 +39,7 @@
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#include <sys/ioctl.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <sys/buf.h>
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#include <machine/cpu.h>
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#include <machine/pio.h>
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@ -179,7 +180,7 @@ sbforceintr(aux)
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* it is needed (and you pay the latency). Also, you might
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* never need the buffer anyway.)
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*/
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at_dma(1, &dmabuf, 1, ia->ia_drq);
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at_dma(B_READ, &dmabuf, 1, ia->ia_drq);
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if (wdsp(iobase, SB_DSP_RDMA) == 0) {
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(void)wdsp(iobase, 0);
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(void)wdsp(iobase, 0);
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@ -274,9 +275,13 @@ wdsp(int iobase, int v)
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register int i;
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for (i = 100; --i >= 0; ) {
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if ((inb(iobase + SBP_DSP_WSTAT) & SB_DSP_BUSY) != 0)
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register u_char x;
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x = inb(iobase + SBP_DSP_WSTAT);
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delay(20);
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if ((x & SB_DSP_BUSY) != 0)
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continue;
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outb(iobase + SBP_DSP_WRITE, v);
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delay(20);
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return 0;
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}
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++sberr.wdsp;
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@ -292,9 +297,14 @@ rdsp(int iobase)
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register int i;
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for (i = 100; --i >= 0; ) {
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if ((inb(iobase + SBP_DSP_RSTAT) & SB_DSP_READY) == 0)
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register u_char x;
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x = inb(iobase + SBP_DSP_RSTAT);
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delay(20);
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if ((x & SB_DSP_READY) == 0)
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continue;
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return inb(iobase + SBP_DSP_READ);
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x = inb(iobase + SBP_DSP_READ);
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delay(20);
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return x;
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}
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++sberr.rdsp;
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return -1;
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@ -317,8 +327,9 @@ sbreset(sc)
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* Gee, what a brilliant hardware design.
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*/
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outb(iobase + SBP_DSP_RESET, 1);
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delay(3);
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delay(20);
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outb(iobase + SBP_DSP_RESET, 0);
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delay(20);
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if (rdsp(iobase) != SB_MAGIC)
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return -1;
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return 0;
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@ -524,7 +535,7 @@ sb_dma_input(sc, p, cc, intr, arg)
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{
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register int iobase;
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at_dma(1, p, cc, sc->sc_dmachan);
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at_dma(B_READ, p, cc, sc->sc_dmachan);
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sc->sc_intr = intr;
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sc->sc_arg = arg;
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iobase = sc->sc_iobase;
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@ -559,7 +570,7 @@ sb_dma_output(sc, p, cc, intr, arg)
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{
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register int iobase;
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at_dma(0, p, cc, sc->sc_dmachan);
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at_dma(B_WRITE, p, cc, sc->sc_dmachan);
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sc->sc_intr = intr;
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sc->sc_arg = arg;
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iobase = sc->sc_iobase;
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@ -599,6 +610,7 @@ sbintr(sc)
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sc->sc_locked = 0;
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/* clear interrupt */
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inb(sc->sc_iobase + SBP_DSP_RSTAT);
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delay(20);
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if (sc->sc_mintr != 0) {
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int c = rdsp(sc->sc_iobase);
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(*sc->sc_mintr)(sc->sc_arg, c);
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@ -1,4 +1,4 @@
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/* $NetBSD: sb.c,v 1.14 1994/11/18 22:03:38 mycroft Exp $ */
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/* $NetBSD: sb.c,v 1.15 1994/12/17 18:45:11 mycroft Exp $ */
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/*
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* Copyright (c) 1991-1993 Regents of the University of California.
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@ -39,6 +39,7 @@
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#include <sys/ioctl.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <sys/buf.h>
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#include <machine/cpu.h>
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#include <machine/pio.h>
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@ -179,7 +180,7 @@ sbforceintr(aux)
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* it is needed (and you pay the latency). Also, you might
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* never need the buffer anyway.)
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*/
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at_dma(1, &dmabuf, 1, ia->ia_drq);
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at_dma(B_READ, &dmabuf, 1, ia->ia_drq);
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if (wdsp(iobase, SB_DSP_RDMA) == 0) {
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(void)wdsp(iobase, 0);
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(void)wdsp(iobase, 0);
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@ -274,9 +275,13 @@ wdsp(int iobase, int v)
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register int i;
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for (i = 100; --i >= 0; ) {
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if ((inb(iobase + SBP_DSP_WSTAT) & SB_DSP_BUSY) != 0)
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register u_char x;
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x = inb(iobase + SBP_DSP_WSTAT);
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delay(20);
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if ((x & SB_DSP_BUSY) != 0)
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continue;
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outb(iobase + SBP_DSP_WRITE, v);
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delay(20);
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return 0;
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}
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++sberr.wdsp;
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@ -292,9 +297,14 @@ rdsp(int iobase)
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register int i;
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for (i = 100; --i >= 0; ) {
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if ((inb(iobase + SBP_DSP_RSTAT) & SB_DSP_READY) == 0)
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register u_char x;
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x = inb(iobase + SBP_DSP_RSTAT);
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delay(20);
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if ((x & SB_DSP_READY) == 0)
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continue;
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return inb(iobase + SBP_DSP_READ);
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x = inb(iobase + SBP_DSP_READ);
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delay(20);
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return x;
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}
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++sberr.rdsp;
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return -1;
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@ -317,8 +327,9 @@ sbreset(sc)
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* Gee, what a brilliant hardware design.
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*/
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outb(iobase + SBP_DSP_RESET, 1);
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delay(3);
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delay(20);
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outb(iobase + SBP_DSP_RESET, 0);
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delay(20);
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if (rdsp(iobase) != SB_MAGIC)
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return -1;
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return 0;
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@ -524,7 +535,7 @@ sb_dma_input(sc, p, cc, intr, arg)
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{
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register int iobase;
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at_dma(1, p, cc, sc->sc_dmachan);
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at_dma(B_READ, p, cc, sc->sc_dmachan);
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sc->sc_intr = intr;
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sc->sc_arg = arg;
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iobase = sc->sc_iobase;
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@ -559,7 +570,7 @@ sb_dma_output(sc, p, cc, intr, arg)
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{
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register int iobase;
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at_dma(0, p, cc, sc->sc_dmachan);
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at_dma(B_WRITE, p, cc, sc->sc_dmachan);
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sc->sc_intr = intr;
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sc->sc_arg = arg;
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iobase = sc->sc_iobase;
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@ -599,6 +610,7 @@ sbintr(sc)
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sc->sc_locked = 0;
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/* clear interrupt */
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inb(sc->sc_iobase + SBP_DSP_RSTAT);
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delay(20);
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if (sc->sc_mintr != 0) {
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int c = rdsp(sc->sc_iobase);
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(*sc->sc_mintr)(sc->sc_arg, c);
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