Add some Sbus-specific definitions (more registers and more values in the
Sbus Config register).
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/* $NetBSD: gemreg.h,v 1.11 2008/01/05 20:27:44 jdc Exp $ */
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/* $NetBSD: gemreg.h,v 1.12 2008/05/06 21:09:34 jdc Exp $ */
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/*
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*
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*/
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#define GEM_PCI_BANK2_OFFSET 0x1000
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#define GEM_PCI_BANK2_SIZE 0x14
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#define GEM_ERROR_STATUS 0x0000 /* PCI error Status */
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#define GEM_ERROR_STATUS 0x0000 /* PCI Error Status */
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#define GEM_ERROR_MASK 0x0004 /* PCI Error Mask */
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#define GEM_SBUS_CONFIG 0x0004
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#define GEM_BIF_CONFIG 0x0008 /* BIF Configuration */
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#define GEM_BIF_DIAG 0x000c /* BIF Diagnostic */
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#define GEM_RESET 0x0010 /* Software Reset */
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#define GEM_BIF_CONFIG 0x0008 /* PCI BIF Configuration */
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#define GEM_BIF_DIAG 0x000c /* PCI BIF Diagnostic */
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#define GEM_RESET 0x0010 /* PCI Software Reset */
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#define GEM_SBUS_RESET 0x0000 /* Sbus Reset */
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#define GEM_SBUS_CONFIG 0x0004 /* Sbus Burst-Size Configuration */
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#define GEM_SBUS_ERROR_STATUS 0x0008 /* Sbus Fatal Error */
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#define GEM_SBUS_SOFT_RESET 0x000c /* Sbus Software Reset */
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#define GEM_SBUS_SOFT_RESET2 0x0010 /* Sbus Software Reset */
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/*
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* Bits in GEM_SEB_STATE register
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@ -137,6 +141,9 @@
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/*
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* Bits in GEM_SBUS_CONFIG register
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*/
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#define GEM_SBUS_CFG_BSIZE32 0x00000001
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#define GEM_SBUS_CFG_BSIZE64 0x00000002
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#define GEM_SBUS_CFG_BSIZE128 0x00000004
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#define GEM_SBUS_CFG_BMODE64 0x00000008
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#define GEM_SBUS_CFG_PARITY 0x00000200
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