Make gic_splfuncs optional and disable it by default until it has had

more testing.
This commit is contained in:
jmcneill 2021-08-10 17:12:31 +00:00
parent b647f9cd80
commit cdb9616634
3 changed files with 21 additions and 9 deletions

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@ -1,4 +1,4 @@
# $NetBSD: files.cortex,v 1.15 2021/08/10 15:33:09 jmcneill Exp $
# $NetBSD: files.cortex,v 1.16 2021/08/10 17:12:31 jmcneill Exp $
defflag opt_cpu_in_cksum.h NEON_IN_CKSUM
@ -11,16 +11,16 @@ device armperiph: mpcorebus
attach armperiph at mainbus
file arch/arm/cortex/armperiph.c armperiph
define gic_splfuncs
defflag opt_gic.h GIC_SPLFUNCS
file arch/arm/cortex/gic_splfuncs.c gic_splfuncs
# ARM Generic Interrupt Controller (initially on Cortex-A9)
device armgic: pic, pic_splfuncs, gic_splfuncs
device armgic: pic, pic_splfuncs
attach armgic at mpcorebus
file arch/arm/cortex/gic.c armgic
# ARM Generic Interrupt Controller v3+
device gicvthree: pic, pic_splfuncs, gic_splfuncs
device gicvthree: pic, pic_splfuncs
file arch/arm/cortex/gicv3.c gicvthree
file arch/arm/cortex/gicv3_its.c gicvthree & pci & __have_pci_msi_msix

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@ -1,4 +1,4 @@
/* $NetBSD: gic.c,v 1.48 2021/08/10 15:33:09 jmcneill Exp $ */
/* $NetBSD: gic.c,v 1.49 2021/08/10 17:12:31 jmcneill Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@ -30,11 +30,12 @@
#include "opt_ddb.h"
#include "opt_multiprocessor.h"
#include "opt_gic.h"
#define _INTR_PRIVATE
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.48 2021/08/10 15:33:09 jmcneill Exp $");
__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.49 2021/08/10 17:12:31 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@ -50,9 +51,12 @@ __KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.48 2021/08/10 15:33:09 jmcneill Exp $");
#include <arm/locore.h>
#include <arm/cortex/gic_reg.h>
#include <arm/cortex/gic_splfuncs.h>
#include <arm/cortex/mpcore_var.h>
#ifdef GIC_SPLFUNCS
#include <arm/cortex/gic_splfuncs.h>
#endif
void armgic_irq_handler(void *);
#define ARMGIC_SGI_IPIBASE 0
@ -730,7 +734,9 @@ armgic_attach(device_t parent, device_t self, void *aux)
"%u SGIs\n", priorities, sc->sc_gic_lines - ppis - sgis, ppis,
sgis);
#ifdef GIC_SPLFUNCS
gic_spl_init();
#endif
}
CFATTACH_DECL_NEW(armgic, 0,

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@ -1,4 +1,4 @@
/* $NetBSD: gicv3.c,v 1.45 2021/08/10 15:33:09 jmcneill Exp $ */
/* $NetBSD: gicv3.c,v 1.46 2021/08/10 17:12:31 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill <jmcneill@invisible.ca>
@ -27,11 +27,12 @@
*/
#include "opt_multiprocessor.h"
#include "opt_gic.h"
#define _INTR_PRIVATE
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.45 2021/08/10 15:33:09 jmcneill Exp $");
__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.46 2021/08/10 17:12:31 jmcneill Exp $");
#include <sys/param.h>
#include <sys/kernel.h>
@ -51,7 +52,10 @@ __KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.45 2021/08/10 15:33:09 jmcneill Exp $");
#include <arm/cortex/gicv3.h>
#include <arm/cortex/gic_reg.h>
#ifdef GIC_SPLFUNCS
#include <arm/cortex/gic_splfuncs.h>
#endif
#define PICTOSOFTC(pic) \
((void *)((uintptr_t)(pic) - offsetof(struct gicv3_softc, sc_pic)))
@ -952,7 +956,9 @@ gicv3_init(struct gicv3_softc *sc)
#endif
#endif
#ifdef GIC_SPLFUNCS
gic_spl_init();
#endif
return 0;
}