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Fix hangup to interrupt on cascading PIC. 

tested on bebox and evbppc/OPENBLOCKS600.
This commit is contained in:
kiyohara 2013-04-21 15:42:11 +00:00
parent 261f2631c7
commit cd4f72f266
6 changed files with 21 additions and 21 deletions
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6
sys/arch/bebox/bebox/machdep.c
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@ -1,4 +1,4 @@
/* $NetBSD: machdep.c,v 1.106 2012/10/13 17:58:54 jdc Exp $ */
/* $NetBSD: machdep.c,v 1.107 2013/04/21 15:42:11 kiyohara Exp $ */
/*
* Copyright (C) 1995, 1996 Wolfgang Solfrank.
@ -32,7 +32,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.106 2012/10/13 17:58:54 jdc Exp $");
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.107 2013/04/21 15:42:11 kiyohara Exp $");
#include "opt_compat_netbsd.h"
#include "opt_ddb.h"
@ -164,7 +164,7 @@ cpu_startup(void)
/*
* set up i8259 as a cascade on BeInterruptController irq 26.
*/
intr_establish(16 + 26, IST_LEVEL, IPL_NONE, pic_handle_intr, isa_pic);
intr_establish(16 + 26, IST_LEVEL, IPL_HIGH, pic_handle_intr, isa_pic);
oea_install_extint(pic_ext_intr);

12
sys/arch/evbppc/ev64260/gt_mainbus.c
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@ -1,4 +1,4 @@
/* $NetBSD: gt_mainbus.c,v 1.17 2011/07/01 20:46:39 dyoung Exp $ */
/* $NetBSD: gt_mainbus.c,v 1.18 2013/04/21 15:42:11 kiyohara Exp $ */
/*
* Copyright (c) 2002 Wasabi Systems, Inc.
@ -36,7 +36,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: gt_mainbus.c,v 1.17 2011/07/01 20:46:39 dyoung Exp $");
__KERNEL_RCSID(0, "$NetBSD: gt_mainbus.c,v 1.18 2013/04/21 15:42:11 kiyohara Exp $");
#include "opt_ev64260.h"
#include "opt_pci.h"
@ -203,13 +203,13 @@ gt_attach(device_t parent, device_t self, void *aux)
GPP_EXTERNAL_INTERRUPS);
discovery_pic->pic_cookie = sc;
intr_establish(IRQ_GPP7_0, IST_LEVEL, IPL_NONE,
intr_establish(IRQ_GPP7_0, IST_LEVEL, IPL_HIGH,
pic_handle_intr, discovery_gpp_pic[0]);
intr_establish(IRQ_GPP15_8, IST_LEVEL, IPL_NONE,
intr_establish(IRQ_GPP15_8, IST_LEVEL, IPL_HIGH,
pic_handle_intr, discovery_gpp_pic[1]);
intr_establish(IRQ_GPP23_16, IST_LEVEL, IPL_NONE,
intr_establish(IRQ_GPP23_16, IST_LEVEL, IPL_HIGH,
pic_handle_intr, discovery_gpp_pic[2]);
intr_establish(IRQ_GPP31_24, IST_LEVEL, IPL_NONE,
intr_establish(IRQ_GPP31_24, IST_LEVEL, IPL_HIGH,
pic_handle_intr, discovery_gpp_pic[3]);
cpumstr = bus_space_read_4(sc->sc_iot, sc->sc_ioh, GT_CPU_Master_Ctl);

6
sys/arch/macppc/macppc/pic_ohare.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: pic_ohare.c,v 1.11 2012/03/13 18:24:54 macallan Exp $ */
/* $NetBSD: pic_ohare.c,v 1.12 2013/04/21 15:42:11 kiyohara Exp $ */
/*-
* Copyright (c) 2007 Michael Lorenz
@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: pic_ohare.c,v 1.11 2012/03/13 18:24:54 macallan Exp $");
__KERNEL_RCSID(0, "$NetBSD: pic_ohare.c,v 1.12 2013/04/21 15:42:11 kiyohara Exp $");
#include "opt_interrupt.h"
@ -160,7 +160,7 @@ setup_ohare2(uint32_t addr, int irq)
pic = setup_ohare(addr, 0);
strcpy(pic->pic.pic_name, "ohare2");
intr_establish(irq, IST_LEVEL, IPL_NONE, pic_handle_intr, pic);
intr_establish(irq, IST_LEVEL, IPL_HIGH, pic_handle_intr, pic);
}
static void

6
sys/arch/ofppc/ofppc/mainbus.c
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@ -1,4 +1,4 @@
/* $NetBSD: mainbus.c,v 1.28 2011/06/30 00:52:58 matt Exp $ */
/* $NetBSD: mainbus.c,v 1.29 2013/04/21 15:42:11 kiyohara Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.28 2011/06/30 00:52:58 matt Exp $");
__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.29 2013/04/21 15:42:11 kiyohara Exp $");
#include "opt_interrupt.h"
#include "opt_multiprocessor.h"
@ -343,7 +343,7 @@ init_ofppc_interrupt(void)
}
if (isa_cascade) {
primary_pic = 1;
intr_establish(16, IST_LEVEL, IPL_NONE, pic_handle_intr,
intr_establish(16, IST_LEVEL, IPL_HIGH, pic_handle_intr,
isa_pic);
}
}

6
sys/arch/prep/prep/machdep.c
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@ -1,4 +1,4 @@
/* $NetBSD: machdep.c,v 1.73 2011/06/30 00:53:00 matt Exp $ */
/* $NetBSD: machdep.c,v 1.74 2013/04/21 15:42:11 kiyohara Exp $ */
/*
* Copyright (C) 1995, 1996 Wolfgang Solfrank.
@ -32,7 +32,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.73 2011/06/30 00:53:00 matt Exp $");
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.74 2013/04/21 15:42:11 kiyohara Exp $");
#include "opt_compat_netbsd.h"
#include "opt_openpic.h"
@ -361,7 +361,7 @@ prep_setup_openpic(PPC_DEVICE *dev)
openpic_write(OPENPIC_TIMER_FREQ, busfreq/8);
primary_pic = 1;
/* set up the IVR as a cascade on openpic 0 */
intr_establish(16, IST_LEVEL, IPL_NONE, pic_handle_intr,
intr_establish(16, IST_LEVEL, IPL_HIGH, pic_handle_intr,
isa_pic);
oea_install_extint(pic_ext_intr);
#ifdef MULTIPROCESSOR

6
sys/arch/sandpoint/sandpoint/machdep.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: machdep.c,v 1.62 2012/02/10 12:02:33 phx Exp $ */
/* $NetBSD: machdep.c,v 1.63 2013/04/21 15:42:12 kiyohara Exp $ */
/*
* Copyright (C) 1995, 1996 Wolfgang Solfrank.
@ -32,7 +32,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.62 2012/02/10 12:02:33 phx Exp $");
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.63 2013/04/21 15:42:12 kiyohara Exp $");
#include "opt_compat_netbsd.h"
#include "opt_ddb.h"
@ -257,7 +257,7 @@ cpu_startup(void)
* set up i8259 as a cascade on EPIC irq 0.
* XXX exceptional SP2 has 17
*/
intr_establish(16, IST_LEVEL, IPL_NONE, pic_handle_intr, isa_pic);
intr_establish(16, IST_LEVEL, IPL_HIGH, pic_handle_intr, isa_pic);
#else
mpcpic_reserv16();
(void)setup_mpcpic(baseaddr);