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Account for the number of counter ticks that elapse while statintr() 

processing takes place. This prevents stat clock skew by a factor
approximately proportional to stathz (not a serious problem if stathz==100;
but considerable already if stathz==1000).
This commit is contained in:
pk 2001-04-09 21:28:50 +00:00
parent 361a81bda9
commit cd24bc13e7
1 changed files with 13 additions and 2 deletions
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15
sys/arch/sparc/sparc/clock.c
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@ -1,4 +1,4 @@
/* $NetBSD: clock.c,v 1.78 2001/01/20 13:44:29 pk Exp $ */
/* $NetBSD: clock.c,v 1.79 2001/04/09 21:28:50 pk Exp $ */
/*
* Copyright (c) 1992, 1993
@ -1040,10 +1040,21 @@ statintr(cap)
newint = statmin + r;
if (CPU_ISSUN4M) {
counterreg4m->t_limit = tmr_ustolim4m(newint);
/*
* Use the `non-resetting' limit register, so we don't
* loose the counter ticks that happened since this
* interrupt was raised.
*/
counterreg4m->t_limit_nr = tmr_ustolim4m(newint);
}
if (CPU_ISSUN4OR4C) {
/*
* The sun4/4c timer has no `non-resetting' register;
* use the current counter value to compensate the new
* limit value for the number of counter ticks elapsed.
*/
newint -= tmr_cnttous(timerreg4->t_c14.t_counter);
timerreg4->t_c14.t_limit = tmr_ustolim(newint);
}
return (1);