Use L2_S_CACHE_MASK in places where we revoke cacheability.
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@ -1,4 +1,4 @@
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/* $NetBSD: pmap.c,v 1.90 2002/04/10 04:40:58 thorpej Exp $ */
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/* $NetBSD: pmap.c,v 1.91 2002/04/10 15:44:23 thorpej Exp $ */
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/*
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* Copyright (c) 2002 Wasabi Systems, Inc.
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@ -143,7 +143,7 @@
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#include <machine/param.h>
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#include <arm/arm32/katelib.h>
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__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.90 2002/04/10 04:40:58 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.91 2002/04/10 15:44:23 thorpej Exp $");
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#ifdef PMAP_DEBUG
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#define PDEBUG(_lev_,_stat_) \
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if (pmap_debug_level >= (_lev_)) \
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@ -1289,7 +1289,7 @@ pmap_alloc_l1pt(void)
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/* Revoke cacheability and bufferability */
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/* XXX should be done better than this */
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ptes[arm_btop(va)] &= ~(L2_C | L2_B);
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ptes[arm_btop(va)] &= ~L2_S_CACHE_MASK;
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va += NBPG;
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m = m->pageq.tqe_next;
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@ -1402,7 +1402,7 @@ pmap_allocpagedir(struct pmap *pmap)
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/* Revoke cacheability and bufferability */
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/* XXX should be done better than this */
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*pte &= ~(L2_C | L2_B);
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*pte &= ~L2_S_CACHE_MASK;
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/* Wire in this page table */
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pmap_map_in_l1(pmap, PTE_BASE, pmap->pm_pptpt, TRUE);
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@ -2188,7 +2188,7 @@ pmap_vac_me_user(struct pmap *pmap, struct vm_page *pg, pt_entry_t *ptes,
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if ((pmap == npv->pv_pmap
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|| kpmap == npv->pv_pmap) &&
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(npv->pv_flags & PVF_NC) == 0) {
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ptes[arm_btop(npv->pv_va)] &= ~(L2_C | L2_B);
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ptes[arm_btop(npv->pv_va)] &= ~L2_S_CACHE_MASK;
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npv->pv_flags |= PVF_NC;
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/*
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* If this page needs flushing from the
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