remove irqblock[] as no one uses it. reviewed by Ben Harris.
This commit is contained in:
yamt
parent
1ee9d337ea
commit
ccc0bd2ab6
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@ -1,4 +1,4 @@
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/* $NetBSD: iomd_irqhandler.c,v 1.9 2005/12/11 12:16:47 christos Exp $ */
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/* $NetBSD: iomd_irqhandler.c,v 1.10 2006/05/11 12:05:37 yamt Exp $ */
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/*
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* Copyright (c) 1994-1998 Mark Brinicombe.
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@ -40,7 +40,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: iomd_irqhandler.c,v 1.9 2005/12/11 12:16:47 christos Exp $");
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__KERNEL_RCSID(0, "$NetBSD: iomd_irqhandler.c,v 1.10 2006/05/11 12:05:37 yamt Exp $");
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#include "opt_irqstats.h"
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@ -65,7 +65,6 @@ u_int actual_mask;
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u_int disabled_mask;
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u_int spl_mask;
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u_int irqmasks[IPL_LEVELS];
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u_int irqblock[NIRQS];
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extern u_int soft_interrupts; /* Only so we can initialise it */
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@ -89,7 +88,6 @@ irq_init()
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/* Clear all the IRQ handlers and the irq block masks */
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for (loop = 0; loop < NIRQS; ++loop) {
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irqhandlers[loop] = NULL;
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irqblock[loop] = 0;
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}
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/* Clear the IRQ/FIQ masks in the IOMD */
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@ -145,7 +143,6 @@ irq_claim(irq, handler)
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irqhandler_t *handler;
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{
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int level;
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int loop;
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u_int oldirqstate;
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#ifdef DIAGNOSTIC
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@ -249,32 +246,6 @@ irq_claim(irq, handler)
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#endif
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}
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/*
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* We now need to update the irqblock array. This array indicates
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* what other interrupts should be blocked when interrupt is asserted
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* This basically emulates hardware interrupt priorities e.g. by
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* blocking all other IPL_BIO interrupts with an IPL_BIO interrupt
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* is asserted. For each interrupt we find the highest IPL and set
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* the block mask to the interrupt mask for that level.
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*/
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for (loop = 0; loop < NIRQS; ++loop) {
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irqhandler_t *ptr;
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ptr = irqhandlers[loop];
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if (ptr) {
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/* There is at least 1 handler so scan the chain */
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level = ptr->ih_level;
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while (ptr) {
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if (ptr->ih_level > level)
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level = ptr->ih_level;
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ptr = ptr->ih_next;
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}
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irqblock[loop] = ~irqmasks[level];
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} else
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/* No handlers for this irq so nothing to block */
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irqblock[loop] = 0;
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}
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enable_irq(irq);
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set_spl_masks();
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restore_interrupts(oldirqstate);
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@ -295,7 +266,6 @@ irq_release(irq, handler)
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irqhandler_t *handler;
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{
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int level;
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int loop;
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irqhandler_t *irqhand;
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irqhandler_t **prehand;
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#ifdef IRQSTATS
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@ -379,32 +349,6 @@ irq_release(irq, handler)
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}
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}
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/*
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* We now need to update the irqblock array. This array indicates
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* what other interrupts should be blocked when interrupt is asserted
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* This basically emulates hardware interrupt priorities e.g. by
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* blocking all other IPL_BIO interrupts with an IPL_BIO interrupt
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* is asserted. For each interrupt we find the highest IPL and set
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* the block mask to the interrupt mask for that level.
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*/
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for (loop = 0; loop < NIRQS; ++loop) {
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irqhandler_t *ptr;
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ptr = irqhandlers[loop];
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if (ptr) {
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/* There is at least 1 handler so scan the chain */
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level = ptr->ih_level;
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while (ptr) {
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if (ptr->ih_level > level)
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level = ptr->ih_level;
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ptr = ptr->ih_next;
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}
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irqblock[loop] = ~irqmasks[level];
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} else
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/* No handlers for this irq so nothing to block */
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irqblock[loop] = 0;
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}
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/*
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* Disable the appropriate mask bit if there are no handlers left for
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* this IRQ.
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@ -1,4 +1,4 @@
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/* $NetBSD: ofw_irqhandler.c,v 1.5 2005/12/11 12:16:51 christos Exp $ */
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/* $NetBSD: ofw_irqhandler.c,v 1.6 2006/05/11 12:05:37 yamt Exp $ */
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/*
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* Copyright (c) 1994-1998 Mark Brinicombe.
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@ -42,7 +42,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ofw_irqhandler.c,v 1.5 2005/12/11 12:16:51 christos Exp $");
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__KERNEL_RCSID(0, "$NetBSD: ofw_irqhandler.c,v 1.6 2006/05/11 12:05:37 yamt Exp $");
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#include "opt_irqstats.h"
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@ -64,7 +64,6 @@ u_int actual_mask;
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u_int disabled_mask;
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u_int spl_mask;
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u_int irqmasks[IPL_LEVELS];
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u_int irqblock[NIRQS];
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extern u_int intrcnt[];
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extern u_int soft_interrupts; /* Only so we can initialise it */
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@ -90,7 +89,6 @@ irq_init()
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/* Clear all the IRQ handlers and the irq block masks */
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for (loop = 0; loop < NIRQS; ++loop) {
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irqhandlers[loop] = NULL;
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irqblock[loop] = 0;
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}
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/*
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@ -218,33 +216,6 @@ irq_claim(irq, handler)
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#endif
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}
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/*
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* We now need to update the irqblock array. This array indicates
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* what other interrupts should be blocked when interrupt is asserted
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* This basically emulates hardware interrupt priorities e.g. by
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* blocking all other IPL_BIO interrupts with an IPL_BIO interrupt
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* is asserted. For each interrupt we find the highest IPL and set
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* the block mask to the interrupt mask for that level.
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*/
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for (loop = 0; loop < NIRQS; ++loop) {
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irqhandler_t *ptr;
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ptr = irqhandlers[loop];
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if (ptr) {
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/* There is at least 1 handler so scan the chain */
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level = ptr->ih_level;
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while (ptr) {
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if (ptr->ih_level > level)
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level = ptr->ih_level;
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ptr = ptr->ih_next;
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}
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irqblock[loop] = ~irqmasks[level];
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} else
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/* No handlers for this irq so nothing to block */
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irqblock[loop] = 0;
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}
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enable_irq(irq);
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set_spl_masks();
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@ -346,32 +317,6 @@ irq_release(irq, handler)
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}
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}
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/*
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* We now need to update the irqblock array. This array indicates
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* what other interrupts should be blocked when interrupt is asserted
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* This basically emulates hardware interrupt priorities e.g. by
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* blocking all other IPL_BIO interrupts with an IPL_BIO interrupt
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* is asserted. For each interrupt we find the highest IPL and set
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* the block mask to the interrupt mask for that level.
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*/
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for (loop = 0; loop < NIRQS; ++loop) {
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irqhandler_t *ptr;
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ptr = irqhandlers[loop];
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if (ptr) {
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/* There is at least 1 handler so scan the chain */
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level = ptr->ih_level;
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while (ptr) {
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if (ptr->ih_level > level)
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level = ptr->ih_level;
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ptr = ptr->ih_next;
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}
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irqblock[loop] = ~irqmasks[level];
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} else
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/* No handlers for this irq so nothing to block */
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irqblock[loop] = 0;
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}
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/*
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* Disable the appropriate mask bit if there are no handlers left for
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* this IRQ.
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@ -1,4 +1,4 @@
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/* $NetBSD: sa11x0_irqhandler.c,v 1.8 2006/03/05 11:32:01 peter Exp $ */
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/* $NetBSD: sa11x0_irqhandler.c,v 1.9 2006/05/11 12:05:37 yamt Exp $ */
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/*-
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* Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
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@ -76,7 +76,7 @@
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: sa11x0_irqhandler.c,v 1.8 2006/03/05 11:32:01 peter Exp $");
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__KERNEL_RCSID(0, "$NetBSD: sa11x0_irqhandler.c,v 1.9 2006/05/11 12:05:37 yamt Exp $");
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#include "opt_irqstats.h"
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@ -104,7 +104,6 @@ u_int imask[NIPL];
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u_int spl_mask;
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u_int irqmasks[IPL_LEVELS];
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#endif
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u_int irqblock[NIRQS];
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extern void set_spl_masks(void);
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@ -166,19 +165,6 @@ intr_calculatemasks(void)
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for (level = IPL_LEVELS; level > 0; level--)
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irqmasks[level - 1] |= irqmasks[level];
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#endif
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/*
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* Calculate irqblock[], which emulates hardware interrupt levels.
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*/
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for (irq = 0; irq < ICU_LEN; irq++) {
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int irqs = 1 << irq;
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for (q = irqhandlers[irq]; q; q = q->ih_next)
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#ifdef hpcarm
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irqs |= ~imask[q->ih_level];
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#else
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irqs |= ~irqmasks[q->ih_level];
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#endif
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irqblock[irq] = irqs;
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}
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: isa_irqhandler.c,v 1.7 2005/12/11 12:19:02 christos Exp $ */
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/* $NetBSD: isa_irqhandler.c,v 1.8 2006/05/11 12:05:37 yamt Exp $ */
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/*
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* Copyright 1997
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@ -75,7 +75,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: isa_irqhandler.c,v 1.7 2005/12/11 12:19:02 christos Exp $");
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__KERNEL_RCSID(0, "$NetBSD: isa_irqhandler.c,v 1.8 2006/05/11 12:05:37 yamt Exp $");
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#include "opt_irqstats.h"
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@ -97,7 +97,6 @@ u_int actual_mask;
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u_int disabled_mask;
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u_int spl_mask;
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u_int irqmasks[IPL_LEVELS];
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u_int irqblock[NIRQS];
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extern u_int soft_interrupts; /* Only so we can initialise it */
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@ -125,7 +124,6 @@ irq_init()
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/* Clear all the IRQ handlers and the irq block masks */
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for (loop = 0; loop < NIRQS; ++loop) {
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irqhandlers[loop] = NULL;
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irqblock[loop] = 0;
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}
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/*
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@ -362,23 +360,6 @@ irq_calculatemasks()
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* avoid overruns, so serial > high.
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*/
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irqmasks[IPL_SERIAL] &= irqmasks[IPL_HIGH];
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/*
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* We now need to update the irqblock array. This array indicates
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* what other interrupts should be blocked when interrupt is asserted
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* This basically emulates hardware interrupt priorities e.g. by
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* blocking all other IPL_BIO interrupts with an IPL_BIO interrupt
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* is asserted. For each interrupt we find the highest IPL and set
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* the block mask to the interrupt mask for that level.
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*/
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/* And eventually calculate the complete masks. */
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for (irq = 0; irq < NIRQS; irq++) {
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int irqs = 1 << irq;
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for (ptr = irqhandlers[irq]; ptr; ptr = ptr->ih_next)
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irqs |= ~(irqmasks[ptr->ih_level]);
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irqblock[irq] = irqs;
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}
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}
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