pte and pmap files for the soft tlb on coldfire cpus.
(uncompiled and mostly probably wrong.)
This commit is contained in:
matt
parent
8f26ebd43e
commit
cc2211c874
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/* $NetBSD: pmap_coldfire.h,v 1.1 2013/07/18 22:24:53 matt Exp $ */
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/*-
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* Copyright (c) 2013 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Matt Thomas of 3am Software Foundry.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _M68K_PMAP_COLDFIRE_H_
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#define M68K_PMAP_COLDFIRE_H_
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#ifdef _LOCORE
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#error use assym.h instead
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#endif
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#if defined(_MODULE)
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#error this file should not be included by loadable kernel modules
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#endif
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#ifdef _KERNEL_OPT
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#include "opt_pmap.h"
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#endif
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#include <sys/cpu.h>
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#include <sys/kcore.h>
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#include <uvm/uvm_page.h>
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#ifdef __PMAP_PRIVATE
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#include <powerpc/booke/cpuvar.h>
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#include <powerpc/cpuset.h>
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#endif
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#define PMAP_NEED_PROCWR
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#include <uvm/pmap/vmpagemd.h>
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#include <m68k/pte_coldfire.h>
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#define NBSEG (NBPG*NPTEPG)
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#define SEGSHIFT (PGSHIFT + PGSHIFT - 2)
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#define SEGOFSET ((1 << SEGSHIFT) - 1)
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#define PMAP_SEGTABSIZE (1 << (32 - SEGSHIFT))
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#define NPTEPG (NBPG >> 2)
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#define KERNEL_PID 0
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#define PMAP_TLB_MAX 1
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#define PMAP_TLB_NUM_PIDS 256
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#define PMAP_INVALID_SEGTAB_ADDRESS ((pmap_segtab_t *)0xfeeddead)
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#define pmap_phys_address(x) (x)
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void pmap_procwr(struct proc *, vaddr_t, size_t);
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#define PMAP_NEED_PROCWR
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#ifdef __PMAP_PRIVATE
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struct vm_page *
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pmap_md_alloc_poolpage(int flags);
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vaddr_t pmap_md_map_poolpage(paddr_t, vsize_t);
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void pmap_md_unmap_poolpage(vaddr_t, vsize_t);
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bool pmap_md_direct_mapped_vaddr_p(vaddr_t);
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bool pmap_md_io_vaddr_p(vaddr_t);
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paddr_t pmap_md_direct_mapped_vaddr_to_paddr(vaddr_t);
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vaddr_t pmap_md_direct_map_paddr(paddr_t);
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void pmap_md_init(void);
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bool pmap_md_tlb_check_entry(void *, vaddr_t, tlb_asid_t, pt_entry_t);
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#ifdef PMAP_MINIMALTLB
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vaddr_t pmap_kvptefill(vaddr_t, vaddr_t, pt_entry_t);
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#endif
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#endif
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void pmap_md_page_syncicache(struct vm_page *, const kcpuset_t *);
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vaddr_t pmap_bootstrap(vaddr_t, vaddr_t, phys_ram_seg_t *, size_t);
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bool pmap_extract(struct pmap *, vaddr_t, paddr_t *);
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static inline paddr_t vtophys(vaddr_t);
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static inline paddr_t
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vtophys(vaddr_t va)
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{
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paddr_t pa;
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if (pmap_extract(pmap_kernel(), va, &pa))
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return pa;
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KASSERT(0);
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return (paddr_t) -1;
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}
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#ifdef __PMAP_PRIVATE
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/*
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* Virtual Cache Alias helper routines. Not a problem for Booke CPUs.
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*/
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static inline bool
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pmap_md_vca_add(struct vm_page *pg, vaddr_t va, pt_entry_t *nptep)
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{
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return false;
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}
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static inline void
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pmap_md_vca_remove(struct vm_page *pg, vaddr_t va)
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{
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}
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static inline void
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pmap_md_vca_clean(struct vm_page *pg, vaddr_t va, int op)
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{
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}
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static inline size_t
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pmap_md_tlb_asid_max(void)
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{
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return PMAP_TLB_NUM_PIDS - 1;
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}
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#endif
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#define POOL_VTOPHYS(va) ((paddr_t)(vaddr_t)(va))
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#define POOL_PHYSTOV(pa) ((vaddr_t)(paddr_t)(pa))
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#include <uvm/pmap/pmap.h>
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#endif /* !_M68K_PMAP_COLDFIRE_H_ */
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@ -0,0 +1,241 @@
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/* $NetBSD: pte_coldfire.h,v 1.1 2013/07/18 22:24:53 matt Exp $ */
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/*-
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* Copyright (c) 2013 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Matt Thomas of 3am Software Foundry.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _M68K_PTE_COLDFIRE_H_
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#define _M68K_PTE_COLDFIRE_H_
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#ifdef __ASSEMBLY__
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#error use assym.h instead
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#endif
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#ifndef __BSD_PT_ENTRY_T
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#define __BSD_PT_ENTRY_T __uint32_t
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typedef __BSD_PT_ENTRY_T pt_entry_t;
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#endif
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#define MMUTR_VA __BITS(31,10) // Virtual Address
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#define MMUTR_ID __BITS(9,2) // ASID
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#define MMUTR_SG __BIT(1) // Shared Global
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#define MMUTR_V __BIT(0) // Valid
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#define MMUDR_PA __BITS(31,10) // Physical Address
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#define MMUDR_SZ __BITS(9,8) // Entry Size
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#define MMUDR_SZ_1MB 0
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#define MMUDR_SZ_4KB 1
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#define MMUDR_SZ_8KB 2
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#define MMUDR_SZ_16MB 3
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#define MMUDR_CM __BITS(7,6) // Cache Mode
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#define MMUDR_CM_WT 0 // Write-Through
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#define MMUDR_CM_WB 1 // Write-Back (Copy-Back)
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#define MMUDR_CM_NC 2 // Non-cacheable
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#define MMUDR_CM_NCP 2 // Non-cacheable Precise
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#define MMUDR_CM_NCI 3 // Non-cacheable Imprecise
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#define MMUDR_SP __BIT(5) // Supervisor Protect
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#define MMUDR_R __BIT(4) // Read Access
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#define MMUDR_W __BIT(3) // Write Access
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#define MMUDR_X __BIT(2) // Execute Access
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#define MMUDR_LK __BIT(1) // Lock Entry
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#define MMUDR_MBZ0 __BIT(0) // Must be zero
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/*
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* The PTE basically the contents of MMUDR[31:2] | MMUAR[0].
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* We overload the meaning of MMUDR_LK for indicating wired.
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* It will be cleared before writing to the TLB.
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*/
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#ifdef _KERNEL
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static inline bool
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pte_cached_p(pt_entry_t pt_entry)
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{
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return (pt_entry & MMUDR_CM_NC) != MMUDR_CM_NC;
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}
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static inline bool
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pte_modified_p(pt_entry_t pt_entry)
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{
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return (pt_entry & MMUDR_W) == MMUDR_W;
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}
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static inline bool
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pte_valid_p(pt_entry_t pt_entry)
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{
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return (pt_entry & MMUAR_V) == MMUAR_V;
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}
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static inline bool
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pte_exec_p(pt_entry_t pt_entry)
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{
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return (pt_entry & MMUDR_X) == MMUDR_X;
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}
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static inline bool
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pte_deferred_exec_p(pt_entry_t pt_entry)
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{
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return !pte_exec_p(pt_entry);
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}
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static inline bool
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pte_wired_p(pt_entry_t pt_entry)
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{
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return (pt_entry & MMUDR_LK) == MMUDR_LK;
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}
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static inline pt_entry_t
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pte_nv_entry(bool kernel)
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{
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return 0;
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}
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static inline paddr_t
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pte_to_paddr(pt_entry_t pt_entry)
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{
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return (paddr_t)(pt_entry & MMUDR_PA);
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}
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static inline pt_entry_t
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pte_ionocached_bits(void)
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{
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return MMUDR_CM_NCP;
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}
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static inline pt_entry_t
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pte_iocached_bits(void)
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{
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return MMUDR_CM_NCP;
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}
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static inline pt_entry_t
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pte_nocached_bits(void)
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{
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return MMUDR_CM_NCP;
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}
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static inline pt_entry_t
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pte_cached_bits(void)
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{
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return MMUDR_CM_WB;
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}
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static inline pt_entry_t
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pte_cached_change(pt_entry_t pt_entry, bool cached)
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{
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return (pt_entry & ~MMUDR_CM) | (cached ? MMUDR_CM_WB : MMUDR_CM_NCP);
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}
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static inline pt_entry_t
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pte_wire_entry(pt_entry_t pt_entry)
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{
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return pt_entry | MMUDR_LK;
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}
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static inline pt_entry_t
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pte_unwire_entry(pt_entry_t pt_entry)
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{
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return pt_entry & ~MMUDR_LK;
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}
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static inline pt_entry_t
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pte_prot_nowrite(pt_entry_t pt_entry)
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{
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return pt_entry & ~MMUDR_W;
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}
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static inline pt_entry_t
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pte_prot_downgrade(pt_entry_t pt_entry, vm_prot_t newprot)
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{
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pt_entry &= ~MMUDR_W;
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if ((newprot & VM_PROT_EXECUTE) == 0)
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pt_entry &= ~MMUDR_X;
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return pt_entry;
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}
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static inline pt_entry_t
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pte_prot_bits(struct vm_page_md *mdpg, vm_prot_t prot)
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{
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KASSERT(prot & VM_PROT_READ);
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pt_entry_t pt_entry = MMUDR_R;
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if (prot & VM_PROT_EXECUTE) {
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/* Only allow exec for managed pages */
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if (mdpg != NULL && VM_PAGEMD_EXECPAGE_P(mdpg))
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pt_entry |= MMUDR_X;
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}
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if (prot & VM_PROT_WRITE) {
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if (mdpg == NULL || VM_PAGEMD_MODIFIED_P(mdpg))
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pt_entry |= MMUDR_W;
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}
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return pt_entry;
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}
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static inline pt_entry_t
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pte_flag_bits(struct vm_page_md *mdpg, int flags)
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{
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if (__predict_false(flags & PMAP_NOCACHE)) {
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if (__predict_true(mdpg != NULL)) {
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return pte_nocached_bits();
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} else {
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return pte_ionocached_bits();
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}
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} else {
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if (__predict_false(mdpg != NULL)) {
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return pte_cached_bits();
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} else {
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return pte_iocached_bits();
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}
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}
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}
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static inline pt_entry_t
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pte_make_enter(paddr_t pa, struct vm_page_md *mdpg, vm_prot_t prot,
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int flags, bool kernel)
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{
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pt_entry_t pt_entry = (pt_entry_t) pa & MMUDR_PA;
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pt_entry |= pte_flag_bits(mdpg, flags);
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pt_entry |= pte_prot_bits(mdpg, prot);
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return pt_entry;
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}
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static inline pt_entry_t
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pte_make_kenter_pa(paddr_t pa, struct vm_page_md *mdpg, vm_prot_t prot,
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int flags)
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{
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pt_entry_t pt_entry = (pt_entry_t) pa & MMUDR_PA;
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pt_entry |= MMUDR_LK;
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pt_entry |= pte_flag_bits(mdpg, flags);
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pt_entry |= pte_prot_bits(NULL, prot); /* pretend unmanaged */
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return pt_entry;
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}
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#endif /* _KERNEL_ */
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#endif /* _M68K_PTE_COLDFIRE_H_ */
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