Improve some of the DImode support. Add/improve a bunch more peepholes.
Generate smaller/faster code in general.
This commit is contained in:
matt
parent
eaf4f43227
commit
cb70721fea
150
gnu/dist/toolchain/gcc/config/vax/vax.md
vendored
150
gnu/dist/toolchain/gcc/config/vax/vax.md
vendored
@ -294,30 +294,33 @@
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}")
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(define_insn "*movimmsi2"
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[(set (match_operand:SI 0 "vax_lvalue_operand" "=g,g,g,g,g,g,g,g")
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(match_operand:SI 1 "const_int_operand" "I,J,O,K,M,L,N,i"))]
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[(set (match_operand:SI 0 "vax_lvalue_operand" "=g")
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(match_operand:SI 1 "const_int_operand" "i"))]
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""
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"@
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clrl %0
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movl %1,%0
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mnegl $%n1,%0
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cvtbl %1,%0
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movzbl %1,%0
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cvtwl %1,%0
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movzwl %1,%0
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movl %1,%0")
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"*
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{
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int val = INTVAL (operands[1]);
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if ( 0 == val) return \"clrl %0\";
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if ( 0 < val && val < 64) return \"movl %1,%0\";
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if ( -63 <= val && val < 0) return \"mnegl $%n1,%0\";
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if ( 0 < val && val < 256) return \"movzbl %1,%0\";
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if ( -128 <= val && val < 128) return \"cvtbl %1,%0\";
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if ( 0 < val && val < 65536) return \"movzwl %1,%0\";
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if (-32768 <= val && val < 32768) return \"cvtwl %1,%0\";
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return \"movl %1,%0\";
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}")
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(define_insn "*pushsymsi"
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[(set (match_operand:SI 0 "push_operand" "=g")
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(match_operand:SI 1 "vax_symbolic_operand" "p"))]
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""
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"pushal %a1")
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"pushab %a1")
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(define_insn "*movsymsi"
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[(set (match_operand:SI 0 "vax_lvalue_operand" "=g")
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(match_operand:SI 1 "vax_symbolic_operand" "p"))]
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""
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"moval %a1,%0")
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"movab %a1,%0")
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(define_insn "*pushsi"
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[(set (match_operand:SI 0 "push_operand" "=g")
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@ -799,6 +802,8 @@
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return \"movab %a2[%0],%0\";
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operands[2] = legitimize_pic_address(operands[2], NULL, CODE_FOR_nothing);
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}
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if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) < 0)
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return \"subl2 $%n2,%0\";
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return \"addl2 %2,%0\";
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}")
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@ -1024,10 +1029,52 @@
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return \"adwc $0,%0\";
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}")
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(define_insn "*pushaddimmdi3"
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[(set (match_operand:DI 0 "push_operand" "=g")
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(plus:DI (match_operand:DI 1 "general_operand" "g")
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(match_operand:DI 2 "const_int_operand" "i")))]
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""
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"*
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{
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rtx lo, hi;
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if (operands[2] == const0_rtx)
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return \"movq %D1,%0\";
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output_asm_insn (\"movq %D1,%0\", operands);
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lo = operand_subword (operands[2], 0, 0, DImode);
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hi = operand_subword (operands[2], 1, 0, DImode);
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if (lo != const0_rtx)
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{
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if (lo == const1_rtx)
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output_asm_insn (\"incl (sp)\", operands);
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else if (lo == constm1_rtx)
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output_asm_insn (\"decl (sp)\", operands);
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else if (INTVAL (lo) < 0)
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output_asm_insn (\"subl2 $%n0,(sp)\", &lo);
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else
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output_asm_insn (\"addl2 %0,(sp)\", &lo);
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}
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operands[2] = hi;
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if (lo == const0_rtx)
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{
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if (hi == const1_rtx)
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return \"incl 4(sp)\";
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else if (hi == constm1_rtx)
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return \"decl 4(sp)\";
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else if (INTVAL (hi) < 0)
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return \"subl2 $%n2,4(sp)\";
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else
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return \"addl2 %2,4(sp)\";
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}
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if (hi != constm1_rtx)
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return \"adwc %2,4(sp)\";
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output_asm_insn (\"adwc $0,4(sp)\", operands);
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return \"decl 4(sp)\";
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}")
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(define_insn "*addgendi3"
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[(set (match_operand:DI 0 "vax_lvalue_operand" "=ro>,ro>")
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(plus:DI (match_operand:DI 1 "general_operand" "%0,ro>")
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(match_operand:DI 2 "general_operand" "IFro,IF")))]
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[(set (match_operand:DI 0 "vax_lvalue_operand" "=ro,ro")
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(plus:DI (match_operand:DI 1 "general_operand" "%0,ro")
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(match_operand:DI 2 "general_operand" "iro,i")))]
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""
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"*
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{
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@ -1044,6 +1091,8 @@
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pattern = \"tstl %0\", carry = 0;
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else if (low[2] == const1_rtx)
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pattern = \"incl %0\";
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else if (low[2] == constm1_rtx)
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pattern = \"decl %0\";
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else
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pattern = \"addl2 %2,%0\";
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}
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@ -1051,6 +1100,8 @@
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{
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if (low[2] == const0_rtx)
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pattern = \"movq %1,%0\";
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else if (GET_CODE (low[2]) == CONST_INT && INTVAL (low[2]) < 0)
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pattern = \"subl3 $%n2,%1,%0\";
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else
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pattern = \"addl3 %2,%1,%0\";
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}
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@ -1064,6 +1115,11 @@
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output_asm_insn ((operands[1] == const0_rtx
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? \"clrl %0\"
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: \"movl %1,%0\"), operands);
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if (operands[2] == constm1_rtx && GET_CODE (operands[0]) != POST_INC)
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{
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output_asm_insn (\"adwc $0,%0\", operands);
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return \"decl %0\";
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}
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return \"adwc %2,%0\";
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}")
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@ -1122,12 +1178,13 @@
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subl3 %2,%1,%0")
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(define_insn "subgensi3"
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[(set (match_operand:SI 0 "vax_lvalue_operand" "=g,=g")
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(minus:SI (match_operand:SI 1 "vax_nonsymbolic_operand" "0,g")
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(match_operand:SI 2 "vax_nonsymbolic_operand" "g,g")))]
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[(set (match_operand:SI 0 "vax_lvalue_operand" "=g,ro,g")
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(minus:SI (match_operand:SI 1 "vax_nonsymbolic_operand" "0,O,g")
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(match_operand:SI 2 "vax_nonsymbolic_operand" "g,g,g")))]
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""
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"@
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subl2 %2,%0
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mnegl $%n1,%0; subl2 %2,%0
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subl3 %2,%1,%0")
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(define_insn "subhi3"
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@ -2681,6 +2738,20 @@
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""
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"addl3 %1,%1,%0")
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(define_peephole
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[(set (match_operand:SI 0 "register_operand" "=r")
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(match_operand:SI 1 "vax_nonsymbolic_operand" "g"))
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(set (match_operand:SI 2 "push_operand" "=g")
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(plus:SI (match_dup 0)
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(match_operand:SI 3 "vax_nonsymbolic_operand" "g")))]
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"!rtx_equal_p (operands[0], operands[3]) && dead_or_set_p (insn, operands[0])"
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"*
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{
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if (GET_CODE (operands[3]) == CONST_INT && INTVAL (operands[3]) < 0)
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return \"subl3 $%n3,%1,%2\";
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return \"addl3 %3,%1,%2\";
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}")
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(define_peephole
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[(set (match_operand:SI 0 "register_operand" "=r")
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(match_operand:SI 1 "vax_nonsymbolic_operand" "g"))
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@ -2714,6 +2785,33 @@
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"REGNO (operands[0]) == REGNO (operands[1]) + 1"
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"clrq %1")
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(define_peephole
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[(set (match_operand:SI 0 "memory_operand" "=o")
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(const_int 0))
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(set (match_operand:SI 1 "memory_operand" "=o")
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(const_int 0))]
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"(GET_CODE (operands[0]) == MEM
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&& GET_CODE (XEXP (operands[0], 0)) == PLUS
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&& GET_CODE (XEXP (XEXP (operands[0], 0), 0)) == REG
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&& REGNO (XEXP (XEXP (operands[0], 0), 0)) == FRAME_POINTER_REGNUM
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&& GET_CODE (XEXP (XEXP (operands[0], 0), 1)) == CONST_INT)
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&& (GET_CODE (operands[1]) == MEM
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&& GET_CODE (XEXP (operands[1], 0)) == PLUS
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&& GET_CODE (XEXP (XEXP (operands[1], 0), 0)) == REG
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&& REGNO (XEXP (XEXP (operands[1], 0), 0)) == FRAME_POINTER_REGNUM
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&& GET_CODE (XEXP (XEXP (operands[1], 0), 1)) == CONST_INT)
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&& (4 == INTVAL (XEXP (XEXP (operands[1], 0), 1))
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- INTVAL (XEXP (XEXP (operands[0], 0), 1))
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|| 4 == INTVAL (XEXP (XEXP (operands[0], 0), 1))
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- INTVAL (XEXP (XEXP (operands[1], 0), 1)))"
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"*
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{
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if (INTVAL (XEXP (XEXP (operands[0], 0), 1)) < INTVAL (XEXP (XEXP (operands[1], 0), 1)))
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return \"clrq %0\";
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else
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return \"clrq %1\";
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}")
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(define_peephole
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[(set (match_operand:SI 0 "memory_operand" "=m")
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(match_operand:SI 1 "register_operand" "r"))
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@ -2792,14 +2890,14 @@
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(const:SI (plus:SI (match_operand:SI 1 "vax_symbolic_operand" "p")
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(match_operand:SI 2 "const_int_operand" "i"))))]
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"!flag_pic && !TARGET_HALFPIC"
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"pushal %a1+%c2")
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"pushab %a1+%c2")
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(define_peephole
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[(set (match_operand:SI 0 "vax_lvalue_operand" "=g")
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(const:SI (plus:SI (match_operand:SI 1 "vax_symbolic_operand" "p")
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(match_operand:SI 2 "const_int_operand" "i"))))]
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"!flag_pic && !TARGET_HALFPIC"
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"moval %a1+%c2,%0")
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"movab %a1+%c2,%0")
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(define_peephole
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[(set (match_operand:SI 0 "register_operand" "=r")
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@ -2815,6 +2913,16 @@
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"GET_CODE (operands[1]) == REG && REGNO (operands[1]) != REGNO (operands[0])"
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"movab %a2,%0; subl3 %0,%1,%0")
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(define_peephole
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[(set (match_operand:SI 0 "register_operand" "=r")
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(plus:SI (match_dup 0)
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(const_int -1)))
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(set (match_operand:SI 1 "vax_lvalue_operand" "=g")
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(match_dup 0))]
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"dead_or_set_p (insn, operands[0])"
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"subl3 $1,%0,%1")
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;;(define_peephole2
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;; [(match_scratch:SI 3 "r")
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;; (set (match_operand:SI 0 "register_operand" "=r")
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