Map the SATA registers for SATA channels, and probe drives using them instead
of using the old PATA way. Tested with a PDC20375 (2xSATA + 1xPATA). While there add the PDC20618-621 products (Ultra/133 controllers); untested. Yes, it's strange to support PATA-only devices in a driver called pdcsata, but that's how it is ...
This commit is contained in:
bouyer
parent
576987983a
commit
cb53a57e9c
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@ -1,4 +1,4 @@
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# $NetBSD: files.pci,v 1.269 2006/09/23 05:12:22 macallan Exp $
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# $NetBSD: files.pci,v 1.270 2006/10/25 17:38:27 bouyer Exp $
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#
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# Config file and device description for machine-independent PCI code.
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# Included by ports that need it. Requires that the SCSI files be
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@ -264,7 +264,7 @@ attach piixide at pci
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file dev/pci/piixide.c piixide
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# Promise Serial ATA controllers
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device pdcsata: ata, ata_dma, ata_udma, pciide_common, wdc_common
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device pdcsata: ata, ata_dma, ata_udma, pciide_common, wdc_common, sata
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attach pdcsata at pci
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file dev/pci/pdcsata.c pdcsata
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@ -1,4 +1,4 @@
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/* $NetBSD: pdcsata.c,v 1.12 2006/10/12 01:31:33 christos Exp $ */
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/* $NetBSD: pdcsata.c,v 1.13 2006/10/25 17:38:27 bouyer Exp $ */
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/*
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* Copyright (c) 2004, Manuel Bouyer.
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@ -30,7 +30,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: pdcsata.c,v 1.12 2006/10/12 01:31:33 christos Exp $");
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__KERNEL_RCSID(0, "$NetBSD: pdcsata.c,v 1.13 2006/10/25 17:38:27 bouyer Exp $");
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#include <sys/types.h>
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#include <sys/malloc.h>
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@ -45,27 +45,32 @@ __KERNEL_RCSID(0, "$NetBSD: pdcsata.c,v 1.12 2006/10/12 01:31:33 christos Exp $"
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#include <dev/ata/satavar.h>
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#include <dev/ata/satareg.h>
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#define PDC203xx_NCHANNELS 4
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#define PDC40718_NCHANNELS 4
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#define PDC20575_NCHANNELS 3
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#define PDC203xx_SATA_NCHANNELS 4
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#define PDC203xx_COMBO_NCHANNELS 3
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#define PDC40718_SATA_NCHANNELS 4
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#define PDC20575_COMBO_NCHANNELS 3
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#define PDC203xx_BAR_IDEREGS 0x1c /* BAR where the IDE registers are mapped */
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#define PDC_CHANNELBASE(ch) 0x200 + ((ch) * 0x80)
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#define PDC_ERRMASK 0x00780700
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#define PDC205_REGADDR(base,ch) ((base)+((ch)<<8))
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#define PDC205_SSTATUS(ch) PDC205_REGADDR(0x400,ch)
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#define PDC205_SERROR(ch) PDC205_REGADDR(0x404,ch)
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#define PDC205_SCONTROL(ch) PDC205_REGADDR(0x408,ch)
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#define PDC205_MULTIPLIER(ch) PDC205_REGADDR(0x4e8,ch)
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static void pdcsata_chip_map(struct pciide_softc *, struct pci_attach_args *);
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static void pdc203xx_setup_channel(struct ata_channel *);
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static void pdc203xx_irqack(struct ata_channel *);
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static int pdc203xx_dma_init(void *, int, int, void *, size_t, int);
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static void pdc203xx_dma_start(void *,int ,int);
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static int pdc203xx_dma_finish(void *, int, int, int);
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static void pdc203xx_combo_probe(struct ata_channel *);
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static int pdcsata_pci_intr(void *);
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static void pdcsata_do_reset(struct ata_channel *, int);
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/* PDC205xx, PDC405xx and PDC407xx. but tested only pdc40718 */
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static void pdc205xx_drv_probe(struct ata_channel *);
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static int pdcsata_match(struct device *, struct cfdata *, void *);
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static void pdcsata_attach(struct device *, struct device *, void *);
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@ -163,6 +168,31 @@ static const struct pciide_product_desc pciide_pdcsata_products[] = {
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"Promise PDC20775 SATA300 controller",
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pdcsata_chip_map,
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},
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{ PCI_PRODUCT_PROMISE_PDC20617,
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0,
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"Promise PDC2020617 Ultra/133 controller",
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pdcsata_chip_map,
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},
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{ PCI_PRODUCT_PROMISE_PDC20618,
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0,
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"Promise PDC20618 Ultra/133 controller",
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pdcsata_chip_map,
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},
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{ PCI_PRODUCT_PROMISE_PDC20619,
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0,
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"Promise PDC20619 Ultra/133 controller",
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pdcsata_chip_map,
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},
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{ PCI_PRODUCT_PROMISE_PDC20620,
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0,
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"Promise PDC20620 Ultra/133 controller",
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pdcsata_chip_map,
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},
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{ PCI_PRODUCT_PROMISE_PDC20621,
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0,
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"Promise PDC20621 Ultra/133 controller",
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pdcsata_chip_map,
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},
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{ 0,
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0,
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NULL,
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@ -272,18 +302,21 @@ pdcsata_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
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switch (sc->sc_pp->ide_product) {
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case PCI_PRODUCT_PROMISE_PDC20318:
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case PCI_PRODUCT_PROMISE_PDC20319:
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bus_space_write_4(sc->sc_ba5_st, sc->sc_ba5_sh, 0x6c,
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0x00ff0033);
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sc->sc_wdcdev.sc_atac.atac_probe = wdc_sataprobe;
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sc->sc_wdcdev.sc_atac.atac_nchannels = PDC203xx_SATA_NCHANNELS;
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break;
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case PCI_PRODUCT_PROMISE_PDC20371:
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case PCI_PRODUCT_PROMISE_PDC20375:
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case PCI_PRODUCT_PROMISE_PDC20376:
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case PCI_PRODUCT_PROMISE_PDC20377:
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case PCI_PRODUCT_PROMISE_PDC20378:
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case PCI_PRODUCT_PROMISE_PDC20379:
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default:
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bus_space_write_4(sc->sc_ba5_st, sc->sc_ba5_sh, 0x6c, 0x00ff0033);
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sc->sc_wdcdev.sc_atac.atac_nchannels =
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(bus_space_read_4(sc->sc_ba5_st, sc->sc_ba5_sh, 0x48) & 0x02) ?
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PDC203xx_NCHANNELS : 3;
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bus_space_write_4(sc->sc_ba5_st, sc->sc_ba5_sh, 0x6c,
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0x00ff0033);
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sc->sc_wdcdev.sc_atac.atac_probe = pdc203xx_combo_probe;
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sc->sc_wdcdev.sc_atac.atac_nchannels = PDC203xx_COMBO_NCHANNELS;
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break;
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case PCI_PRODUCT_PROMISE_PDC40518:
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@ -291,23 +324,39 @@ pdcsata_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
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case PCI_PRODUCT_PROMISE_PDC40718:
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case PCI_PRODUCT_PROMISE_PDC40719:
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case PCI_PRODUCT_PROMISE_PDC40779:
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case PCI_PRODUCT_PROMISE_PDC20571:
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bus_space_write_4(sc->sc_ba5_st, sc->sc_ba5_sh, 0x60, 0x00ff00ff);
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sc->sc_wdcdev.sc_atac.atac_nchannels = PDC40718_NCHANNELS;
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sc->sc_wdcdev.sc_atac.atac_probe = pdc205xx_drv_probe;
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bus_space_write_4(sc->sc_ba5_st, sc->sc_ba5_sh, 0x60,
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0x00ff00ff);
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sc->sc_wdcdev.sc_atac.atac_nchannels = PDC40718_SATA_NCHANNELS;
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sc->sc_wdcdev.sc_atac.atac_probe = wdc_sataprobe;
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break;
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case PCI_PRODUCT_PROMISE_PDC20571:
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case PCI_PRODUCT_PROMISE_PDC20575:
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case PCI_PRODUCT_PROMISE_PDC20579:
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case PCI_PRODUCT_PROMISE_PDC20771:
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case PCI_PRODUCT_PROMISE_PDC20775:
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bus_space_write_4(sc->sc_ba5_st, sc->sc_ba5_sh, 0x60, 0x00ff00ff);
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sc->sc_wdcdev.sc_atac.atac_nchannels = PDC20575_NCHANNELS;
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sc->sc_wdcdev.sc_atac.atac_probe = pdc205xx_drv_probe;
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bus_space_write_4(sc->sc_ba5_st, sc->sc_ba5_sh, 0x60,
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0x00ff00ff);
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sc->sc_wdcdev.sc_atac.atac_nchannels = PDC20575_COMBO_NCHANNELS;
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sc->sc_wdcdev.sc_atac.atac_probe = pdc203xx_combo_probe;
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break;
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case PCI_PRODUCT_PROMISE_PDC20617:
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case PCI_PRODUCT_PROMISE_PDC20618:
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case PCI_PRODUCT_PROMISE_PDC20619:
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case PCI_PRODUCT_PROMISE_PDC20620:
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case PCI_PRODUCT_PROMISE_PDC20621:
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sc->sc_wdcdev.sc_atac.atac_nchannels =
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((bus_space_read_4(sc->sc_ba5_st, sc->sc_ba5_sh,
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0x48) & 0x01) ? 1 : 0) +
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((bus_space_read_4(sc->sc_ba5_st, sc->sc_ba5_sh,
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0x48) & 0x02) ? 1 : 0) +
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2;
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sc->sc_wdcdev.sc_atac.atac_probe = wdc_drvprobe;
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default:
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aprint_error("unknown promise product 0x%x\n",
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sc->sc_pp->ide_product);
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}
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wdc_allocate_regs(&sc->sc_wdcdev);
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goto next_channel;
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}
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/* subregion the SATA registers */
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if (sc->sc_wdcdev.sc_atac.atac_probe == wdc_sataprobe ||
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(sc->sc_wdcdev.sc_atac.atac_probe == pdc203xx_combo_probe
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&& channel < 2)) {
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wdr->sata_iot = sc->sc_ba5_st;
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wdr->sata_baseioh = sc->sc_ba5_sh;
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if (bus_space_subregion(sc->sc_ba5_st, sc->sc_ba5_sh,
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PDC205_SSTATUS(channel), 1,
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&wdr->sata_status) != 0) {
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aprint_error("%s: couldn't map channel %d "
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"sata_status regs\n",
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sc->sc_wdcdev.sc_atac.atac_dev.dv_xname,
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channel);
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goto next_channel;
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}
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if (bus_space_subregion(sc->sc_ba5_st, sc->sc_ba5_sh,
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PDC205_SERROR(channel), 1, &wdr->sata_error) != 0) {
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aprint_error("%s: couldn't map channel %d "
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"sata_error regs\n",
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sc->sc_wdcdev.sc_atac.atac_dev.dv_xname,
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channel);
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goto next_channel;
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}
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if (bus_space_subregion(sc->sc_ba5_st, sc->sc_ba5_sh,
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PDC205_SCONTROL(channel), 1,
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&wdr->sata_control) != 0) {
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aprint_error("%s: couldn't map channel %d "
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"sata_control regs\n",
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sc->sc_wdcdev.sc_atac.atac_dev.dv_xname,
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channel);
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goto next_channel;
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}
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}
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wdcattach(wdc_cp);
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bus_space_write_4(sc->sc_dma_iot, cp->dma_iohs[IDEDMA_CMD], 0,
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(bus_space_read_4(sc->sc_dma_iot, cp->dma_iohs[IDEDMA_CMD],
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@ -396,6 +479,15 @@ next_channel:
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return;
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}
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static void
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pdc203xx_combo_probe(struct ata_channel *chp)
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{
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if (chp->ch_channel < 2)
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wdc_sataprobe(chp);
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else
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wdc_drvprobe(chp);
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}
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static void
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pdc203xx_setup_channel(struct ata_channel *chp)
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{
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@ -522,22 +614,6 @@ pdc203xx_dma_finish(void *v, int channel, int drive, int force __unused)
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return 0;
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}
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#define PDC205_REGADDR(base,ch) ((base)+((ch)<<8))
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#define PDC205_SSTATUS(ch) PDC205_REGADDR(0x400,ch)
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#define PDC205_SERROR(ch) PDC205_REGADDR(0x404,ch)
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#define PDC205_SCONTROL(ch) PDC205_REGADDR(0x408,ch)
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#define PDC205_MULTIPLIER(ch) PDC205_REGADDR(0x4e8,ch)
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#define SCONTROL_WRITE(sc,channel,scontrol) \
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bus_space_write_4((sc)->sc_ba5_st, (sc)->sc_ba5_sh, \
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PDC205_SCONTROL(channel), scontrol)
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#define SSTATUS_READ(sc,channel) \
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bus_space_read_4((sc)->sc_ba5_st, (sc)->sc_ba5_sh, \
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PDC205_SSTATUS(channel))
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static void
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pdcsata_do_reset(struct ata_channel *chp, int poll)
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@ -563,88 +639,3 @@ pdcsata_do_reset(struct ata_channel *chp, int poll)
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wdc_do_reset(chp, poll);
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}
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static void
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pdc205xx_drv_probe(struct ata_channel *chp)
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{
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struct pciide_softc *sc = CHAN_TO_PCIIDE(chp);
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struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp);
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u_int32_t scontrol, sstatus;
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u_int16_t scnt, sn, cl, ch;
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int i, s;
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/* XXX This should be done by other code. */
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for (i = 0; i < 2; i++) {
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chp->ch_drive[i].chnl_softc = chp;
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chp->ch_drive[i].drive = i;
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}
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SCONTROL_WRITE(sc, chp->ch_channel, 0);
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delay(50*1000);
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scontrol = SControl_DET_INIT | SControl_SPD_ANY | SControl_IPM_NONE;
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SCONTROL_WRITE(sc,chp->ch_channel,scontrol);
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delay(50*1000);
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scontrol &= ~SControl_DET_INIT;
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SCONTROL_WRITE(sc,chp->ch_channel,scontrol);
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delay(50*1000);
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sstatus = SSTATUS_READ(sc,chp->ch_channel);
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switch (sstatus & SStatus_DET_mask) {
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case SStatus_DET_NODEV:
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/* No Device; be silent. */
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break;
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case SStatus_DET_DEV_NE:
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aprint_error("%s: port %d: device connected, but "
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"communication not established\n",
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sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, chp->ch_channel);
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break;
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case SStatus_DET_OFFLINE:
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aprint_error("%s: port %d: PHY offline\n",
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sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, chp->ch_channel);
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break;
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case SStatus_DET_DEV:
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bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0,
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WDSD_IBM);
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delay(10); /* 400ns delay */
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scnt = bus_space_read_2(wdr->cmd_iot,
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wdr->cmd_iohs[wd_seccnt], 0);
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sn = bus_space_read_2(wdr->cmd_iot,
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wdr->cmd_iohs[wd_sector], 0);
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cl = bus_space_read_2(wdr->cmd_iot,
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wdr->cmd_iohs[wd_cyl_lo], 0);
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ch = bus_space_read_2(wdr->cmd_iot,
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wdr->cmd_iohs[wd_cyl_hi], 0);
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#if 0
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printf("%s: port %d: scnt=0x%x sn=0x%x cl=0x%x ch=0x%x\n",
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sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, chp->ch_channel,
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scnt, sn, cl, ch);
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#endif
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/*
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* scnt and sn are supposed to be 0x1 for ATAPI, but in some
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* cases we get wrong values here, so ignore it.
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*/
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s = splbio();
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if (cl == 0x14 && ch == 0xeb)
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chp->ch_drive[0].drive_flags |= DRIVE_ATAPI;
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else
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chp->ch_drive[0].drive_flags |= DRIVE_ATA;
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splx(s);
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#if 0
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aprint_normal("%s: port %d: device present, speed: %s\n",
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sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, chp->ch_channel,
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sata_speed(sstatus));
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#endif
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break;
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default:
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aprint_error("%s: port %d: unknown SStatus: 0x%08x\n",
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sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, chp->ch_channel,
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sstatus);
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}
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}
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|
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