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Update AR5312 interrupt masks along the same lines as the AR5315.

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This commit is contained in:
dyoung 2008-01-07 07:14:37 +00:00
parent b82c6f8442
commit cb1ed32e14
1 changed files with 6 additions and 27 deletions
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33
sys/arch/mips/atheros/ar5312_intr.c
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@ -1,4 +1,4 @@
/* $Id: ar5312_intr.c,v 1.4 2007/02/21 02:26:15 dyoung Exp $ */
/* $Id: ar5312_intr.c,v 1.5 2008/01/07 07:14:37 dyoung Exp $ */
/*
* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
* Copyright (c) 2006 Garrett D'Amore.
@ -41,7 +41,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: ar5312_intr.c,v 1.4 2007/02/21 02:26:15 dyoung Exp $");
__KERNEL_RCSID(0, "$NetBSD: ar5312_intr.c,v 1.5 2008/01/07 07:14:37 dyoung Exp $");
#include <sys/param.h>
#include <sys/queue.h>
@ -92,38 +92,17 @@ struct ar531x_intr {
const uint32_t ipl_sr_bits[_IPL_N] = {
0, /* 0: IPL_NONE */
MIPS_SOFT_INT_MASK_0, /* 1: IPL_SOFT */
MIPS_SOFT_INT_MASK_0, /* 2: IPL_SOFTCLOCK */
MIPS_SOFT_INT_MASK_0, /* 3: IPL_SOFTNET */
MIPS_SOFT_INT_MASK_0, /* 4: IPL_SOFTSERIAL */
MIPS_SOFT_INT_MASK_0, /* 1: IPL_SOFTCLOCK */
MIPS_SOFT_INT_MASK_0, /* 2: IPL_SOFTNET */
MIPS_SOFT_INT_MASK_0 |
MIPS_SOFT_INT_MASK_1 |
MIPS_INT_MASK_0 |
MIPS_INT_MASK_1 |
MIPS_INT_MASK_2 |
MIPS_INT_MASK_3, /* 5: IPL_BIO */
MIPS_SOFT_INT_MASK_0 |
MIPS_SOFT_INT_MASK_1 |
MIPS_INT_MASK_0 |
MIPS_INT_MASK_1 |
MIPS_INT_MASK_2 |
MIPS_INT_MASK_3, /* 6: IPL_NET */
MIPS_INT_MASK_3, /* 3: IPL_VM */
MIPS_SOFT_INT_MASK_0 |
MIPS_SOFT_INT_MASK_1 |
MIPS_INT_MASK_0 |
MIPS_INT_MASK_1 |
MIPS_INT_MASK_2 |
MIPS_INT_MASK_3 |
MIPS_INT_MASK_4, /* 7: IPL_{SERIAL,TTY} */
MIPS_INT_MASK, /* 8: IPL_{CLOCK,HIGH} */
MIPS_INT_MASK, /* 4: IPL_{SCHED,HIGH} */
};
const uint32_t mips_ipl_si_to_sr[SI_NQUEUES] = {