port-i386/38935: Add appropriate x86_lfence or x86_mfence calls to
bus_dmamap_sync(), depending on the BUS_DMASYNC flag. This makes sure that the kernel reads data from main memory in the intended order.
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@ -1,4 +1,4 @@
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/* $NetBSD: bus_dma.c,v 1.44 2008/06/13 09:53:46 bjs Exp $ */
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/* $NetBSD: bus_dma.c,v 1.45 2008/06/28 17:23:01 bouyer Exp $ */
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/*-
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* Copyright (c) 1996, 1997, 1998, 2007 The NetBSD Foundation, Inc.
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@ -31,7 +31,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.44 2008/06/13 09:53:46 bjs Exp $");
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__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.45 2008/06/28 17:23:01 bouyer Exp $");
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/*
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* The following is included because _bus_dma_uiomove is derived from
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@ -722,7 +722,7 @@ _bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
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*/
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if (len == 0 || cookie == NULL ||
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(cookie->id_flags & X86_DMA_IS_BOUNCING) == 0)
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return;
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goto end;
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switch (cookie->id_buftype) {
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case X86_DMA_BUFTYPE_LINEAR:
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@ -844,6 +844,21 @@ _bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
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printf("unknown buffer type %d\n", cookie->id_buftype);
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panic("_bus_dmamap_sync");
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}
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end:
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if (ops & (BUS_DMASYNC_PREWRITE|BUS_DMASYNC_POSTWRITE)) {
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/*
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* from the memory POV a load can be reordered before a store
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* (a load can fetch data from the write buffers, before
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* data hits the cache or memory), a mfence avoids it.
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*/
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x86_mfence();
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} else if (ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_POSTREAD)) {
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/*
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* all past reads should have completed at before this point,
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* and futur reads should not have started yet.
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*/
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x86_lfence();
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}
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}
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/*
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