Use a single copy of the source.
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christos
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common/lib/libc/arch/sparc64/string/memcpy.S
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1624
common/lib/libc/arch/sparc64/string/memcpy.S
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File diff suppressed because it is too large
Load Diff
214
common/lib/libc/arch/sparc64/string/memset.S
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214
common/lib/libc/arch/sparc64/string/memset.S
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/* $NetBSD: memset.S,v 1.1 2013/03/17 00:42:32 christos Exp $ */
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/*
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* Copyright (c) 1996-2002 Eduardo Horvath
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include "strmacros.h"
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/*
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* XXXXXXXXXXXXXXXXXXXX
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* We need to make sure that this doesn't use floating point
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* before our trap handlers are installed or we could panic
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* XXXXXXXXXXXXXXXXXXXX
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*/
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/*
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* memset(addr, c, len)
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*
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* We want to use VIS instructions if we're clearing out more than
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* 256 bytes, but to do that we need to properly save and restore the
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* FP registers. Unfortunately the code to do that in the kernel needs
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* to keep track of the current owner of the FPU, hence the different
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* code.
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*
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* XXXXX To produce more efficient code, we do not allow lengths
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* greater than 0x80000000000000000, which are negative numbers.
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* This should not really be an issue since the VA hole should
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* cause any such ranges to fail anyway.
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*/
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#if !defined(_KERNEL) || defined(_RUMPKERNEL)
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ENTRY(bzero)
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! %o0 = addr, %o1 = len
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mov %o1, %o2
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mov 0, %o1
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#endif
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ENTRY(memset)
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! %o0 = addr, %o1 = pattern, %o2 = len
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mov %o0, %o4 ! Save original pointer
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Lmemset_internal:
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btst 7, %o0 ! Word aligned?
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bz,pn %xcc, 0f
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nop
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inc %o0
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deccc %o2 ! Store up to 7 bytes
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bge,a,pt CCCR, Lmemset_internal
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stb %o1, [%o0 - 1]
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retl ! Duplicate Lmemset_done
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mov %o4, %o0
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0:
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/*
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* Duplicate the pattern so it fills 64-bits.
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*/
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andcc %o1, 0x0ff, %o1 ! No need to extend zero
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bz,pt %icc, 1f
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sllx %o1, 8, %o3 ! sigh. all dependent insns.
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or %o1, %o3, %o1
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sllx %o1, 16, %o3
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or %o1, %o3, %o1
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sllx %o1, 32, %o3
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or %o1, %o3, %o1
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1:
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#ifdef USE_BLOCK_STORE_LOAD
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!! Now we are 64-bit aligned
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cmp %o2, 256 ! Use block clear if len > 256
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bge,pt CCCR, Lmemset_block ! use block store insns
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#endif /* USE_BLOCK_STORE_LOAD */
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deccc 8, %o2
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Lmemset_longs:
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bl,pn CCCR, Lmemset_cleanup ! Less than 8 bytes left
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nop
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3:
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inc 8, %o0
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deccc 8, %o2
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bge,pt CCCR, 3b
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stx %o1, [%o0 - 8] ! Do 1 longword at a time
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/*
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* Len is in [-8..-1] where -8 => done, -7 => 1 byte to zero,
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* -6 => two bytes, etc. Mop up this remainder, if any.
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*/
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Lmemset_cleanup:
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btst 4, %o2
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bz,pt CCCR, 5f ! if (len & 4) {
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nop
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stw %o1, [%o0] ! *(int *)addr = 0;
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inc 4, %o0 ! addr += 4;
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5:
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btst 2, %o2
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bz,pt CCCR, 7f ! if (len & 2) {
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nop
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sth %o1, [%o0] ! *(short *)addr = 0;
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inc 2, %o0 ! addr += 2;
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7:
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btst 1, %o2
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bnz,a %icc, Lmemset_done ! if (len & 1)
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stb %o1, [%o0] ! *addr = 0;
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Lmemset_done:
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retl
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mov %o4, %o0 ! Restore ponter for memset (ugh)
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#ifdef USE_BLOCK_STORE_LOAD
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Lmemset_block:
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sethi %hi(block_disable), %o3
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ldx [ %o3 + %lo(block_disable) ], %o3
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brnz,pn %o3, Lmemset_longs
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!! Make sure our trap table is installed
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set _C_LABEL(trapbase), %o5
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rdpr %tba, %o3
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sub %o3, %o5, %o3
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brnz,pn %o3, Lmemset_longs ! No, then don't use block load/store
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nop
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/*
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* Kernel:
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*
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* Here we use VIS instructions to do a block clear of a page.
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* But before we can do that we need to save and enable the FPU.
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* The last owner of the FPU registers is fplwp, and
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* fplwp->l_md.md_fpstate is the current fpstate. If that's not
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* null, call savefpstate() with it to store our current fp state.
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*
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* Next, allocate an aligned fpstate on the stack. We will properly
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* nest calls on a particular stack so this should not be a problem.
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*
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* Now we grab either curlwp (or if we're on the interrupt stack
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* lwp0). We stash its existing fpstate in a local register and
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* put our new fpstate in curlwp->p_md.md_fpstate. We point
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* fplwp at curlwp (or lwp0) and enable the FPU.
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*
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* If we are ever preempted, our FPU state will be saved in our
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* fpstate. Then, when we're resumed and we take an FPDISABLED
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* trap, the trap handler will be able to fish our FPU state out
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* of curlwp (or lwp0).
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*
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* On exiting this routine we undo the damage: restore the original
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* pointer to curlwp->p_md.md_fpstate, clear our fplwp, and disable
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* the MMU.
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*
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*/
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ENABLE_FPU(0)
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!! We are now 8-byte aligned. We need to become 64-byte aligned.
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btst 63, %i0
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bz,pt CCCR, 2f
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nop
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1:
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stx %i1, [%i0]
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inc 8, %i0
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btst 63, %i0
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bnz,pt %xcc, 1b
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dec 8, %i2
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2:
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brz %i1, 3f ! Skip the memory op
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fzero %f0 ! if pattern is 0
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#ifdef _LP64
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stx %i1, [%i0] ! Flush this puppy to RAM
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membar #StoreLoad
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ldd [%i0], %f0
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#else
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stw %i1, [%i0] ! Flush this puppy to RAM
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membar #StoreLoad
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ld [%i0], %f0
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fmovsa %icc, %f0, %f1
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#endif
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3:
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fmovd %f0, %f2 ! Duplicate the pattern
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fmovd %f0, %f4
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fmovd %f0, %f6
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fmovd %f0, %f8
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fmovd %f0, %f10
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fmovd %f0, %f12
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fmovd %f0, %f14
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!! Remember: we were 8 bytes too far
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dec 56, %i2 ! Go one iteration too far
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5:
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stda %f0, [%i0] ASI_STORE ! Store 64 bytes
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deccc BLOCK_SIZE, %i2
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bg,pt %icc, 5b
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inc BLOCK_SIZE, %i0
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membar #Sync
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/*
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* We've saved our possible fpstate, now disable the fpu
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* and continue with life.
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*/
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RESTORE_FPU
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addcc %i2, 56, %i2 ! Restore the count
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ba,pt %xcc, Lmemset_longs ! Finish up the remainder
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restore
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#endif /* USE_BLOCK_STORE_LOAD */
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119
common/lib/libc/arch/sparc64/string/strmacros.h
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119
common/lib/libc/arch/sparc64/string/strmacros.h
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@ -0,0 +1,119 @@
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/* $NetBSD: strmacros.h,v 1.1 2013/03/17 00:42:32 christos Exp $ */
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/*
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* Copyright (c) 1996-2002 Eduardo Horvath
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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*notice, this list of conditions and the following disclaimer.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <machine/asm.h>
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#if defined(_KERNEL) && !defined(_RUMPKERNEL)
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#define USE_BLOCK_STORE_LOAD /* enable block load/store ops */
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#include "assym.h"
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#include <machine/param.h>
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#include <machine/ctlreg.h>
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#include <machine/psl.h>
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#include <machine/frame.h>
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#include <machine/intr.h>
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#include <machine/locore.h>
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#ifdef USE_BLOCK_STORE_LOAD
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#define BLOCK_SIZE SPARC64_BLOCK_SIZE
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#define BLOCK_ALIGN SPARC64_BLOCK_ALIGN
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/*
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* The following routines allow fpu use in the kernel.
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*
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* They allocate a stack frame and use all local regs. Extra
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* local storage can be requested by setting the siz parameter,
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* and can be accessed at %sp+CC64FSZ.
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*/
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#define ENABLE_FPU(siz) \
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save %sp, -(CC64FSZ), %sp; /* Allocate a stack frame */ \
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sethi %hi(FPLWP), %l1; \
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add %fp, STKB-FS_SIZE, %l0; /* Allocate a fpstate */\
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LDPTR [%l1 + %lo(FPLWP)], %l2; /* Load fplwp */ \
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andn %l0, BLOCK_ALIGN, %l0; /* Align it */ \
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clr %l3; /* NULL fpstate */ \
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brz,pt %l2, 1f; /* fplwp == NULL? */ \
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add %l0, -STKB-CC64FSZ-(siz), %sp; /* Set proper %sp */ \
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LDPTR [%l2 + L_FPSTATE], %l3; \
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brz,pn %l3, 1f; /* Make sure we have an fpstate */ \
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mov %l3, %o0; \
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call _C_LABEL(savefpstate); /* Save the old fpstate */ \
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1: \
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set EINTSTACK-STKB, %l4; /* Are we on intr stack? */ \
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cmp %sp, %l4; \
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bgu,pt %xcc, 1f; \
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set INTSTACK-STKB, %l4; \
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cmp %sp, %l4; \
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blu %xcc, 1f; \
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0: \
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sethi %hi(_C_LABEL(lwp0)), %l4; /* Yes, use lpw0 */ \
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ba,pt %xcc, 2f; /* XXXX needs to change to CPUs idle proc */ \
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or %l4, %lo(_C_LABEL(lwp0)), %l5; \
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1: \
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sethi %hi(CURLWP), %l4; /* Use curlwp */ \
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LDPTR [%l4 + %lo(CURLWP)], %l5; \
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brz,pn %l5, 0b; nop; /* If curlwp is NULL need to use lwp0 */\
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2: \
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LDPTR [%l5 + L_FPSTATE], %l6; /* Save old fpstate */ \
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STPTR %l0, [%l5 + L_FPSTATE]; /* Insert new fpstate */\
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STPTR %l5, [%l1 + %lo(FPLWP)]; /* Set new fplwp */ \
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wr %g0, FPRS_FEF, %fprs /* Enable FPU */
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/*
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* Weve saved our possible fpstate, now disable the fpu
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* and continue with life.
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*/
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#ifdef DEBUG
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#define __CHECK_FPU \
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LDPTR [%l5 + L_FPSTATE], %l7; \
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cmp %l7, %l0; \
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tnz 1;
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#else
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#define __CHECK_FPU
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#endif
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#define RESTORE_FPU \
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__CHECK_FPU \
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STPTR %l2, [%l1 + %lo(FPLWP)]; /* Restore old fproc */ \
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wr %g0, 0, %fprs; /* Disable fpu */ \
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brz,pt %l3, 1f; /* Skip if no fpstate */ \
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STPTR %l6, [%l5 + L_FPSTATE]; /* Restore old fpstate */\
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\
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mov %l3, %o0; \
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call _C_LABEL(loadfpstate); /* Reload orig fpstate */\
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1: \
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membar #Sync; /* Finish all FP ops */
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#endif /* USE_BLOCK_STORE_LOAD */
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#ifdef USE_BLOCK_STORE_LOAD
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#if 0
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#define ASI_STORE ASI_BLK_COMMIT_P
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#else
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#define ASI_STORE ASI_BLK_P
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#endif
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#endif /* USE_BLOCK_STORE_LOAD */
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#endif /* _KERNEL && !_RUMPKERNEL */
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