Reorganized, machine-independent z8530 driver, based on the sparc/sun3 zs.
Uses autoconfig to attach keyboard, mouse, or tty. (See z8530.doc)
This commit is contained in:
gwr
parent
ae2b8aaf1f
commit
ca633a9f35
76
sys/dev/ic/z8530.doc
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76
sys/dev/ic/z8530.doc
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@ -0,0 +1,76 @@
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$NetBSD: z8530.doc,v 1.1 1996/01/24 01:07:21 gwr Exp $
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Here are the results of my reorganization work on the zs driver.
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Everything compiles and appears to work.
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Enjoy!
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Gordon Ross
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----------------------------------------------------------------
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This design has a "zs controller" named "zsc" with three
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flavors of child drivers that can be attached above it.
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The three child drivers are:
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zstty: normal RS-232 line
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kbd: sun keyboard
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ms: sun mouse
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Note that the machine-dependent parts are:
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arch/sun3/include/z8530var.h
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arch/sun3/dev/zs.c
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(replicate those for new systems)
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The Sun hardware dependent parts (Sun3 and SPARC) are:
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kd* sun keyboard/display console stuff
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event* sun "firm event" stuff
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----------------------------------------------------------------
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Here is how the autoconfig looks on a sun3:
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zsc0 at obio0 addr 0x0 level 6 softpri 3
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kbd0 at zsc0 channel 0
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ms0 at zsc0 channel 1
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zsc1 at obio0 addr 0x20000 level 6 softpri 3
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zstty0 at zsc1 channel 0 (console)
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zstty1 at zsc1 channel 1
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----------------------------------------------------------------
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Config lines:
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In any config file (i.e. GENERIC, NEW_ZS, ...)
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Note {kbd,ms} are sun-specific.
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#
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# New console (zs) stuff
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#
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zsc0 at obio? addr ?
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zsc1 at obio? addr ?
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kbd0 at zsc0 channel 0
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ms0 at zsc0 channel 1
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zstty* at zsc? channel ?
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----------------------------------------------------------------
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In conf/files.sun3
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#
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# Console (zs) related stuff
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#
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device zsc at obio {channel = -1}
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file arch/sun3/dev/zs.c zsc needs-flag
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file dev/ic/z8530sc.c zsc
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device zstty at zsc: tty
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file dev/ic/z8530tty.c zstty needs-flag
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define zsevent
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file dev/sun/event.c zsevent
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device kbd at zsc: zsevent
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file dev/sun/kbd.c kbd needs-flag
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file dev/sun/kbd_tables.c kbd
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file arch/sun3/dev/kd.c kbd
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device ms at zsc: zsevent
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file dev/sun/ms.c ms needs-flag
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326
sys/dev/ic/z8530sc.c
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326
sys/dev/ic/z8530sc.c
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/* $NetBSD: z8530sc.c,v 1.1 1996/01/24 01:07:23 gwr Exp $ */
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/*
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* Copyright (c) 1994 Gordon W. Ross
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This software was developed by the Computer Systems Engineering group
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* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
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* contributed to Berkeley.
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*
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* All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Lawrence Berkeley Laboratory.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)zs.c 8.1 (Berkeley) 7/19/93
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*/
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/*
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* Zilog Z8530 Dual UART driver (common part)
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*
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* This file contains the machine-independent parts of the
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* driver common to tty and keyboard/mouse sub-drivers.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/proc.h>
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#include <sys/device.h>
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#include <sys/conf.h>
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#include <sys/file.h>
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#include <sys/ioctl.h>
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#include <sys/tty.h>
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#include <sys/time.h>
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#include <sys/kernel.h>
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#include <sys/syslog.h>
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#include <dev/ic/z8530reg.h>
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#include <machine/z8530var.h>
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int
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zs_break(cs, set)
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struct zs_chanstate *cs;
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int set;
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{
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int s;
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s = splzs();
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if (set) {
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cs->cs_preg[5] |= ZSWR5_BREAK;
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cs->cs_creg[5] |= ZSWR5_BREAK;
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} else {
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cs->cs_preg[5] &= ~ZSWR5_BREAK;
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cs->cs_creg[5] &= ~ZSWR5_BREAK;
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}
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ZS_WRITE(cs, 5, cs->cs_creg[5]);
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splx(s);
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}
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/*
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* Compute the current baud rate given a ZSCC channel.
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*/
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int
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zs_getspeed(cs)
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struct zs_chanstate *cs;
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{
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int tconst;
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tconst = ZS_READ(cs, 12);
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tconst |= ZS_READ(cs, 13) << 8;
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return (TCONST_TO_BPS(cs->cs_pclk_div16, tconst));
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}
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/*
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* drain on-chip fifo
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*/
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void
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zs_iflush(cs)
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struct zs_chanstate *cs;
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{
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u_char c, rr0, rr1;
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for (;;) {
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/* Is there input available? */
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rr0 = *(cs->cs_reg_csr);
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ZS_DELAY();
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if ((rr0 & ZSRR0_RX_READY) == 0)
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break;
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/* Read the data. */
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c = *(cs->cs_reg_data);
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ZS_DELAY();
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/* Need to read status register too? */
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rr1 = ZS_READ(cs, 1);
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if (rr1 & (ZSRR1_FE | ZSRR1_DO | ZSRR1_PE)) {
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/* Clear the receive error. */
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*(cs->cs_reg_csr) = ZSWR0_RESET_ERRORS;
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ZS_DELAY();
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}
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}
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}
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/*
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* Write the given register set to the given zs channel in the proper order.
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* The channel must not be transmitting at the time. The receiver will
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* be disabled for the time it takes to write all the registers.
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* Call this with interrupts disabled.
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*/
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void
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zs_loadchannelregs(cs)
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struct zs_chanstate *cs;
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{
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u_char *reg;
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int i;
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/* Copy "pending" regs to "current" */
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bcopy((caddr_t)cs->cs_preg, (caddr_t)cs->cs_creg, 16);
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reg = cs->cs_creg; /* current regs */
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*(cs->cs_reg_csr) = ZSM_RESET_ERR; /* XXX: reset error condition */
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ZS_DELAY();
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#if 1
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/*
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* XXX: Is this really a good idea?
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* XXX: Should go elsewhere! -gwr
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*/
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zs_iflush(cs); /* XXX */
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#endif
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/* baud clock divisor, stop bits, parity */
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ZS_WRITE(cs, 4, reg[4]);
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/* misc. TX/RX control bits */
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ZS_WRITE(cs, 10, reg[10]);
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/* char size, enable (RX/TX) */
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ZS_WRITE(cs, 3, reg[3] & ~ZSWR3_RX_ENABLE);
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ZS_WRITE(cs, 5, reg[5] & ~ZSWR5_TX_ENABLE);
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/* interrupt enables: TX, TX, STATUS */
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ZS_WRITE(cs, 1, reg[1]);
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#if 0
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/*
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* Registers 2 and 9 are special because they are
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* actually common to both channels, but must be
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* programmed through channel A. The "zsc" attach
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* function takes care of setting these registers
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* and they should not be touched thereafter.
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*/
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/* interrupt vector */
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ZS_WRITE(cs, 2, reg[2]);
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/* master interrupt control */
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ZS_WRITE(cs, 9, reg[9]);
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#endif
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/* clock mode control */
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ZS_WRITE(cs, 11, reg[11]);
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/* baud rate (lo/hi) */
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ZS_WRITE(cs, 12, reg[12]);
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ZS_WRITE(cs, 13, reg[13]);
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/* Misc. control bits */
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ZS_WRITE(cs, 14, reg[14]);
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/* which lines cause status interrupts */
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ZS_WRITE(cs, 15, reg[15]);
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/* char size, enable (RX/TX)*/
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ZS_WRITE(cs, 3, reg[3]);
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ZS_WRITE(cs, 5, reg[5]);
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}
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/*
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* ZS hardware interrupt. Scan all ZS channels. NB: we know here that
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* channels are kept in (A,B) pairs.
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*
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* Do just a little, then get out; set a software interrupt if more
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* work is needed.
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*
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* We deliberately ignore the vectoring Zilog gives us, and match up
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* only the number of `reset interrupt under service' operations, not
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* the order.
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*/
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int
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zsc_intr_hard(arg)
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void *arg;
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{
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register struct zsc_softc *zsc = arg;
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register struct zs_chanstate *cs_a;
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register struct zs_chanstate *cs_b;
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register int rval, soft;
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register u_char rr3;
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cs_a = &zsc->zsc_cs[0];
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cs_b = &zsc->zsc_cs[1];
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rval = 0;
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soft = 0;
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/* Note: only channel A has an RR3 */
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rr3 = ZS_READ(cs_a, 3);
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/* Handle receive interrupts first. */
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if (rr3 & ZSRR3_IP_A_RX)
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(*cs_a->cs_ops->zsop_rxint)(cs_a);
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if (rr3 & ZSRR3_IP_B_RX)
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(*cs_b->cs_ops->zsop_rxint)(cs_b);
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/* Handle transmit done interrupts. */
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if (rr3 & ZSRR3_IP_A_TX)
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(*cs_a->cs_ops->zsop_txint)(cs_a);
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if (rr3 & ZSRR3_IP_B_TX)
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(*cs_b->cs_ops->zsop_txint)(cs_b);
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/* Handle status interrupts. */
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if (rr3 & ZSRR3_IP_A_STAT)
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(*cs_a->cs_ops->zsop_stint)(cs_a);
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if (rr3 & ZSRR3_IP_B_STAT)
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(*cs_b->cs_ops->zsop_stint)(cs_b);
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/* Clear interrupt. */
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if (rr3 & (ZSRR3_IP_A_RX | ZSRR3_IP_A_TX | ZSRR3_IP_A_STAT)) {
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*(cs_a->cs_reg_csr) = ZSWR0_CLR_INTR;
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ZS_DELAY();
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rval |= 1;
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}
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if (rr3 & (ZSRR3_IP_B_RX | ZSRR3_IP_B_TX | ZSRR3_IP_B_STAT)) {
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*(cs_b->cs_reg_csr) = ZSWR0_CLR_INTR;
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ZS_DELAY();
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rval |= 2;
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}
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if ((cs_a->cs_softreq) || (cs_b->cs_softreq))
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{
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/* This is a machine-dependent function. */
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zsc_req_softint(zsc);
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}
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return (rval);
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}
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/*
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* ZS software interrupt. Scan all channels for deferred interrupts.
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*/
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int
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zsc_intr_soft(arg)
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void *arg;
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{
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register struct zsc_softc *zsc = arg;
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register struct zs_chanstate *cs;
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register int req, rval, s, unit;
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rval = 0;
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for (unit = 0; unit < 2; unit++) {
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cs = &zsc->zsc_cs[unit];
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s = splzs();
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req = cs->cs_softreq;
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cs->cs_softreq = 0;
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splx(s);
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if (req) {
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(*cs->cs_ops->zsop_softint)(cs);
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rval = 1;
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}
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}
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return (rval);
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}
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static int
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zsnull_intr(cs)
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struct zs_chanstate *cs;
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{
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ZS_WRITE(cs, 1, 0);
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ZS_WRITE(cs, 15, 0);
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}
|
||||||
|
|
||||||
|
static int
|
||||||
|
zsnull_softint(cs)
|
||||||
|
struct zs_chanstate *cs;
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
struct zsops zsops_null = {
|
||||||
|
zsnull_intr, /* receive char available */
|
||||||
|
zsnull_intr, /* external/status */
|
||||||
|
zsnull_intr, /* xmit buffer empty */
|
||||||
|
zsnull_softint, /* process software interrupt */
|
||||||
|
};
|
||||||
111
sys/dev/ic/z8530sc.h
Normal file
111
sys/dev/ic/z8530sc.h
Normal file
@ -0,0 +1,111 @@
|
|||||||
|
/* $NetBSD: z8530sc.h,v 1.1 1996/01/24 01:07:24 gwr Exp $ */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Copyright (c) 1994 Gordon W. Ross
|
||||||
|
* Copyright (c) 1992, 1993
|
||||||
|
* The Regents of the University of California. All rights reserved.
|
||||||
|
*
|
||||||
|
* This software was developed by the Computer Systems Engineering group
|
||||||
|
* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
|
||||||
|
* contributed to Berkeley.
|
||||||
|
*
|
||||||
|
* All advertising materials mentioning features or use of this software
|
||||||
|
* must display the following acknowledgement:
|
||||||
|
* This product includes software developed by the University of
|
||||||
|
* California, Lawrence Berkeley Laboratory.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
* 3. All advertising materials mentioning features or use of this software
|
||||||
|
* must display the following acknowledgement:
|
||||||
|
* This product includes software developed by the University of
|
||||||
|
* California, Berkeley and its contributors.
|
||||||
|
* 4. Neither the name of the University nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||||
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||||
|
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||||
|
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||||
|
* SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* @(#)zsvar.h 8.1 (Berkeley) 6/11/93
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Function vector - per channel
|
||||||
|
*/
|
||||||
|
struct zsops {
|
||||||
|
int (*zsop_rxint)(); /* receive char available */
|
||||||
|
int (*zsop_stint)(); /* external/status */
|
||||||
|
int (*zsop_txint)(); /* xmit buffer empty */
|
||||||
|
int (*zsop_softint)(); /* process software interrupt */
|
||||||
|
};
|
||||||
|
|
||||||
|
extern struct zsops zsops_null;
|
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Software state, per zs channel.
|
||||||
|
*/
|
||||||
|
struct zs_chanstate {
|
||||||
|
|
||||||
|
/* Pointers to the device registers. */
|
||||||
|
volatile u_char *cs_reg_csr; /* ctrl, status, and reg. number. */
|
||||||
|
volatile u_char *cs_reg_data; /* data or numbered register */
|
||||||
|
|
||||||
|
int cs_channel; /* sub-unit number */
|
||||||
|
void *cs_private; /* sub-driver data pointer */
|
||||||
|
struct zsops *cs_ops;
|
||||||
|
|
||||||
|
int cs_pclk_div16; /* PCLK / 16 */
|
||||||
|
int cs_defspeed; /* default baud rate (from PROM) */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* We must keep a copy of the write registers as they are
|
||||||
|
* mostly write-only and we sometimes need to set and clear
|
||||||
|
* individual bits (e.g., in WR3). Not all of these are
|
||||||
|
* needed but 16 bytes is cheap and this makes the addressing
|
||||||
|
* simpler. Unfortunately, we can only write to some registers
|
||||||
|
* when the chip is not actually transmitting, so whenever
|
||||||
|
* we are expecting a `transmit done' interrupt the preg array
|
||||||
|
* is allowed to `get ahead' of the current values. In a
|
||||||
|
* few places we must change the current value of a register,
|
||||||
|
* rather than (or in addition to) the pending value; for these
|
||||||
|
* cs_creg[] contains the current value.
|
||||||
|
*/
|
||||||
|
u_char cs_creg[16]; /* current values */
|
||||||
|
u_char cs_preg[16]; /* pending values */
|
||||||
|
|
||||||
|
u_char cs_heldchange; /* change pending (creg != preg) */
|
||||||
|
u_char cs_rr0; /* last rr0 processed */
|
||||||
|
|
||||||
|
char cs_softreq; /* need soft interrupt call */
|
||||||
|
char cs__spare;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct zsc_softc {
|
||||||
|
struct device zsc_dev; /* required first: base device */
|
||||||
|
struct zs_chanstate zsc_cs[2]; /* channel A and B soft state */
|
||||||
|
};
|
||||||
|
|
||||||
|
struct zsc_attach_args {
|
||||||
|
int channel; /* two serial channels per zsc */
|
||||||
|
int hwflags;
|
||||||
|
};
|
||||||
|
#define ZS_HWFLAG_CONSOLE 1
|
||||||
|
|
||||||
1042
sys/dev/ic/z8530tty.c
Normal file
1042
sys/dev/ic/z8530tty.c
Normal file
File diff suppressed because it is too large
Load Diff
111
sys/dev/ic/z8530var.h
Normal file
111
sys/dev/ic/z8530var.h
Normal file
@ -0,0 +1,111 @@
|
|||||||
|
/* $NetBSD: z8530var.h,v 1.1 1996/01/24 01:07:24 gwr Exp $ */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Copyright (c) 1994 Gordon W. Ross
|
||||||
|
* Copyright (c) 1992, 1993
|
||||||
|
* The Regents of the University of California. All rights reserved.
|
||||||
|
*
|
||||||
|
* This software was developed by the Computer Systems Engineering group
|
||||||
|
* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
|
||||||
|
* contributed to Berkeley.
|
||||||
|
*
|
||||||
|
* All advertising materials mentioning features or use of this software
|
||||||
|
* must display the following acknowledgement:
|
||||||
|
* This product includes software developed by the University of
|
||||||
|
* California, Lawrence Berkeley Laboratory.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
* 3. All advertising materials mentioning features or use of this software
|
||||||
|
* must display the following acknowledgement:
|
||||||
|
* This product includes software developed by the University of
|
||||||
|
* California, Berkeley and its contributors.
|
||||||
|
* 4. Neither the name of the University nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||||
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||||
|
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||||
|
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||||
|
* SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* @(#)zsvar.h 8.1 (Berkeley) 6/11/93
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Function vector - per channel
|
||||||
|
*/
|
||||||
|
struct zsops {
|
||||||
|
int (*zsop_rxint)(); /* receive char available */
|
||||||
|
int (*zsop_stint)(); /* external/status */
|
||||||
|
int (*zsop_txint)(); /* xmit buffer empty */
|
||||||
|
int (*zsop_softint)(); /* process software interrupt */
|
||||||
|
};
|
||||||
|
|
||||||
|
extern struct zsops zsops_null;
|
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Software state, per zs channel.
|
||||||
|
*/
|
||||||
|
struct zs_chanstate {
|
||||||
|
|
||||||
|
/* Pointers to the device registers. */
|
||||||
|
volatile u_char *cs_reg_csr; /* ctrl, status, and reg. number. */
|
||||||
|
volatile u_char *cs_reg_data; /* data or numbered register */
|
||||||
|
|
||||||
|
int cs_channel; /* sub-unit number */
|
||||||
|
void *cs_private; /* sub-driver data pointer */
|
||||||
|
struct zsops *cs_ops;
|
||||||
|
|
||||||
|
int cs_pclk_div16; /* PCLK / 16 */
|
||||||
|
int cs_defspeed; /* default baud rate (from PROM) */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* We must keep a copy of the write registers as they are
|
||||||
|
* mostly write-only and we sometimes need to set and clear
|
||||||
|
* individual bits (e.g., in WR3). Not all of these are
|
||||||
|
* needed but 16 bytes is cheap and this makes the addressing
|
||||||
|
* simpler. Unfortunately, we can only write to some registers
|
||||||
|
* when the chip is not actually transmitting, so whenever
|
||||||
|
* we are expecting a `transmit done' interrupt the preg array
|
||||||
|
* is allowed to `get ahead' of the current values. In a
|
||||||
|
* few places we must change the current value of a register,
|
||||||
|
* rather than (or in addition to) the pending value; for these
|
||||||
|
* cs_creg[] contains the current value.
|
||||||
|
*/
|
||||||
|
u_char cs_creg[16]; /* current values */
|
||||||
|
u_char cs_preg[16]; /* pending values */
|
||||||
|
|
||||||
|
u_char cs_heldchange; /* change pending (creg != preg) */
|
||||||
|
u_char cs_rr0; /* last rr0 processed */
|
||||||
|
|
||||||
|
char cs_softreq; /* need soft interrupt call */
|
||||||
|
char cs__spare;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct zsc_softc {
|
||||||
|
struct device zsc_dev; /* required first: base device */
|
||||||
|
struct zs_chanstate zsc_cs[2]; /* channel A and B soft state */
|
||||||
|
};
|
||||||
|
|
||||||
|
struct zsc_attach_args {
|
||||||
|
int channel; /* two serial channels per zsc */
|
||||||
|
int hwflags;
|
||||||
|
};
|
||||||
|
#define ZS_HWFLAG_CONSOLE 1
|
||||||
|
|
||||||
Loading…
Reference in New Issue
Block a user