Merge forward from matt-nb5-mips64.
(XXX generic kernels on raq2 die after interrupts are enabled but gxemul works fine).
This commit is contained in:
matt
parent
7641af9757
commit
c9fc40b4be
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: bus.c,v 1.38 2009/12/14 00:46:00 matt Exp $ */
|
||||
/* $NetBSD: bus.c,v 1.39 2011/02/20 07:54:10 matt Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1998 The NetBSD Foundation, Inc.
|
||||
|
|
@ -31,7 +31,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: bus.c,v 1.38 2009/12/14 00:46:00 matt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: bus.c,v 1.39 2011/02/20 07:54:10 matt Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -568,22 +568,24 @@ _bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
|
|||
mips_dcache_wbinv_range(start, minlen);
|
||||
break;
|
||||
|
||||
case BUS_DMASYNC_PREREAD:
|
||||
case BUS_DMASYNC_PREREAD: {
|
||||
struct mips_cache_info * const mci = &mips_cache_info;
|
||||
end = start + minlen;
|
||||
preboundary = start & ~mips_dcache_align_mask;
|
||||
firstboundary = (start + mips_dcache_align_mask)
|
||||
& ~mips_dcache_align_mask;
|
||||
lastboundary = end & ~mips_dcache_align_mask;
|
||||
preboundary = start & ~mci->mci_dcache_align_mask;
|
||||
firstboundary = (start + mci->mci_dcache_align_mask)
|
||||
& ~mci->mci_dcache_align_mask;
|
||||
lastboundary = end & ~mci->mci_dcache_align_mask;
|
||||
if (preboundary < start && preboundary < lastboundary)
|
||||
mips_dcache_wbinv_range(preboundary,
|
||||
mips_dcache_align);
|
||||
mci->mci_dcache_align);
|
||||
if (firstboundary < lastboundary)
|
||||
mips_dcache_inv_range(firstboundary,
|
||||
lastboundary - firstboundary);
|
||||
if (lastboundary < end)
|
||||
mips_dcache_wbinv_range(lastboundary,
|
||||
mips_dcache_align);
|
||||
mci->mci_dcache_align);
|
||||
break;
|
||||
}
|
||||
|
||||
case BUS_DMASYNC_PREWRITE:
|
||||
mips_dcache_wb_range(start, minlen);
|
||||
|
|
@ -606,12 +608,11 @@ _bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
|
|||
bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
|
||||
int flags)
|
||||
{
|
||||
extern paddr_t avail_start, avail_end;
|
||||
extern paddr_t mips_avail_start, mips_avail_end;
|
||||
|
||||
return (_bus_dmamem_alloc_range_common(t, size, alignment, boundary,
|
||||
segs, nsegs, rsegs, flags,
|
||||
avail_start /*low*/,
|
||||
avail_end - PAGE_SIZE /*high*/));
|
||||
segs, nsegs, rsegs, flags,
|
||||
mips_avail_start /*low*/, mips_avail_end - PAGE_SIZE /*high*/));
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: cpu.c,v 1.10 2008/05/09 10:59:55 tsutsui Exp $ */
|
||||
/* $NetBSD: cpu.c,v 1.11 2011/02/20 07:54:10 matt Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1994, 1995 Carnegie-Mellon University.
|
||||
|
|
@ -28,18 +28,19 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.10 2008/05/09 10:59:55 tsutsui Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.11 2011/02/20 07:54:10 matt Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/device.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/cpu.h>
|
||||
|
||||
#include <machine/autoconf.h>
|
||||
|
||||
#include "ioconf.h"
|
||||
|
||||
int cpu_match(device_t, cfdata_t, void *);
|
||||
void cpu_attach(device_t, device_t, void *);
|
||||
static int cpu_match(device_t, cfdata_t, void *);
|
||||
static void cpu_attach(device_t, device_t, void *);
|
||||
|
||||
CFATTACH_DECL_NEW(cpu, 0,
|
||||
cpu_match, cpu_attach, NULL, NULL);
|
||||
|
|
@ -55,6 +56,11 @@ void
|
|||
cpu_attach(device_t parent, device_t self, void *aux)
|
||||
{
|
||||
|
||||
struct cpu_info * const ci = curcpu();
|
||||
|
||||
ci->ci_dev = self;
|
||||
self->dv_private = ci;
|
||||
|
||||
aprint_normal(": ");
|
||||
cpu_identify();
|
||||
cpu_identify(self);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: interrupt.c,v 1.5 2010/12/20 00:25:31 matt Exp $ */
|
||||
/* $NetBSD: interrupt.c,v 1.6 2011/02/20 07:54:10 matt Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2006 Izumi Tsutsui. All rights reserved.
|
||||
|
|
@ -79,7 +79,9 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.5 2010/12/20 00:25:31 matt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.6 2011/02/20 07:54:10 matt Exp $");
|
||||
|
||||
#define __INTR_PRIVATE
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/malloc.h>
|
||||
|
|
@ -137,11 +139,26 @@ static struct cpu_intrhead cpu_intrtab[NCPU_INT];
|
|||
static int icu_intr(void *);
|
||||
static void icu_set(void);
|
||||
|
||||
static const struct ipl_sr_map cobalt_ipl_sr_map = {
|
||||
.sr_bits = {
|
||||
[IPL_NONE] = MIPS_INT_MASK_0,
|
||||
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0 | MIPS_INT_MASK_0,
|
||||
[IPL_SOFTBIO] = MIPS_SOFT_INT_MASK_0 | MIPS_INT_MASK_0,
|
||||
[IPL_SOFTNET] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0,
|
||||
[IPL_SOFTSERIAL] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0,
|
||||
[IPL_VM] = MIPS_INT_MASK ^ MIPS_INT_MASK_5,
|
||||
[IPL_SCHED] = MIPS_INT_MASK,
|
||||
[IPL_DDB] = MIPS_INT_MASK,
|
||||
[IPL_HIGH] = MIPS_INT_MASK,
|
||||
},
|
||||
};
|
||||
|
||||
void
|
||||
intr_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
ipl_sr_map = cobalt_ipl_sr_map;
|
||||
/*
|
||||
* Initialize CPU interrupts.
|
||||
*/
|
||||
|
|
@ -386,110 +403,65 @@ cpu_intr_disestablish(void *cookie)
|
|||
}
|
||||
}
|
||||
|
||||
static void inline
|
||||
intr_handle(struct cpu_intrhead *intr)
|
||||
{
|
||||
struct cobalt_intrhand * const ih = &intr->intr_ih;
|
||||
if (__predict_true(ih->ih_func != NULL)
|
||||
&& __predict_true((*ih->ih_func)(ih->ih_arg))) {
|
||||
intr->intr_evcnt.ev_count++;
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
cpu_intr(uint32_t status, uint32_t cause, vaddr_t pc, uint32_t ipending)
|
||||
cpu_intr(int ppl, vaddr_t pc, uint32_t status)
|
||||
{
|
||||
struct clockframe cf;
|
||||
struct cobalt_intrhand *ih;
|
||||
struct cpu_info *ci;
|
||||
uint32_t handled;
|
||||
uint32_t pending;
|
||||
int ipl;
|
||||
|
||||
handled = 0;
|
||||
ci = curcpu();
|
||||
ci->ci_idepth++;
|
||||
ci->ci_data.cpu_nintr++;
|
||||
curcpu()->ci_data.cpu_nintr++;
|
||||
|
||||
if (ipending & MIPS_INT_MASK_5) {
|
||||
/* call the common MIPS3 clock interrupt handler */
|
||||
cf.pc = pc;
|
||||
cf.sr = status;
|
||||
mips3_clockintr(&cf);
|
||||
|
||||
handled |= MIPS_INT_MASK_5;
|
||||
}
|
||||
_splset((status & handled) | MIPS_SR_INT_IE);
|
||||
|
||||
if (__predict_false(ipending & MIPS_INT_MASK_0)) {
|
||||
/* GT64x11 timer0 */
|
||||
volatile uint32_t *irq_src =
|
||||
(uint32_t *)MIPS_PHYS_TO_KSEG1(GT_BASE + GT_INTR_CAUSE);
|
||||
|
||||
if (__predict_true((*irq_src & T0EXP) != 0)) {
|
||||
/* GT64x11 timer is no longer used for hardclock(9) */
|
||||
*irq_src = 0;
|
||||
while (ppl < (ipl = splintr(&pending))) {
|
||||
splx(ipl);
|
||||
if (pending & MIPS_INT_MASK_5) {
|
||||
struct clockframe cf;
|
||||
/* call the common MIPS3 clock interrupt handler */
|
||||
cf.pc = pc;
|
||||
cf.sr = status;
|
||||
cf.intr = (curcpu()->ci_idepth > 1);
|
||||
mips3_clockintr(&cf);
|
||||
}
|
||||
handled |= MIPS_INT_MASK_0;
|
||||
}
|
||||
|
||||
if (ipending & MIPS_INT_MASK_3) {
|
||||
/* 16650 serial */
|
||||
ih = &cpu_intrtab[3].intr_ih;
|
||||
if (__predict_true(ih->ih_func != NULL)) {
|
||||
if (__predict_true((*ih->ih_func)(ih->ih_arg))) {
|
||||
cpu_intrtab[3].intr_evcnt.ev_count++;
|
||||
if (__predict_false(pending & MIPS_INT_MASK_0)) {
|
||||
/* GT64x11 timer0 */
|
||||
volatile uint32_t *irq_src =
|
||||
(uint32_t *)MIPS_PHYS_TO_KSEG1(GT_BASE + GT_INTR_CAUSE);
|
||||
|
||||
if (__predict_true((*irq_src & T0EXP) != 0)) {
|
||||
/* GT64x11 timer is no longer used for hardclock(9) */
|
||||
*irq_src = 0;
|
||||
}
|
||||
}
|
||||
handled |= MIPS_INT_MASK_3;
|
||||
}
|
||||
_splset((status & handled) | MIPS_SR_INT_IE);
|
||||
|
||||
if (ipending & MIPS_INT_MASK_1) {
|
||||
/* tulip primary */
|
||||
ih = &cpu_intrtab[1].intr_ih;
|
||||
if (__predict_true(ih->ih_func != NULL)) {
|
||||
if (__predict_true((*ih->ih_func)(ih->ih_arg))) {
|
||||
cpu_intrtab[1].intr_evcnt.ev_count++;
|
||||
}
|
||||
if (pending & MIPS_INT_MASK_3) {
|
||||
/* 16650 serial */
|
||||
intr_handle(&cpu_intrtab[3]);
|
||||
}
|
||||
handled |= MIPS_INT_MASK_1;
|
||||
}
|
||||
if (ipending & MIPS_INT_MASK_2) {
|
||||
/* tulip secondary */
|
||||
ih = &cpu_intrtab[2].intr_ih;
|
||||
if (__predict_true(ih->ih_func != NULL)) {
|
||||
if (__predict_true((*ih->ih_func)(ih->ih_arg))) {
|
||||
cpu_intrtab[2].intr_evcnt.ev_count++;
|
||||
}
|
||||
}
|
||||
handled |= MIPS_INT_MASK_2;
|
||||
}
|
||||
|
||||
if (ipending & MIPS_INT_MASK_4) {
|
||||
/* ICU interrupts */
|
||||
ih = &cpu_intrtab[4].intr_ih;
|
||||
if (__predict_true(ih->ih_func != NULL)) {
|
||||
if (__predict_true((*ih->ih_func)(ih->ih_arg))) {
|
||||
cpu_intrtab[4].intr_evcnt.ev_count++;
|
||||
}
|
||||
if (pending & MIPS_INT_MASK_1) {
|
||||
/* tulip primary */
|
||||
intr_handle(&cpu_intrtab[1]);
|
||||
}
|
||||
handled |= MIPS_INT_MASK_4;
|
||||
}
|
||||
cause &= ~handled;
|
||||
_splset((status & ~cause & MIPS_HARD_INT_MASK) | MIPS_SR_INT_IE);
|
||||
ci->ci_idepth--;
|
||||
|
||||
#ifdef __HAVE_FAST_SOFTINTS
|
||||
/* software interrupt */
|
||||
ipending &= (MIPS_SOFT_INT_MASK_1|MIPS_SOFT_INT_MASK_0);
|
||||
if (ipending == 0)
|
||||
return;
|
||||
_clrsoftintr(ipending);
|
||||
softintr_dispatch(ipending);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
static const int ipl2spl_table[] = {
|
||||
[IPL_NONE] = 0,
|
||||
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
|
||||
[IPL_SOFTNET] = MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1,
|
||||
[IPL_VM] = SPLVM,
|
||||
[IPL_SCHED] = SPLSCHED,
|
||||
};
|
||||
|
||||
ipl_cookie_t
|
||||
makeiplcookie(ipl_t ipl)
|
||||
{
|
||||
|
||||
return (ipl_cookie_t){._spl = ipl2spl_table[ipl]};
|
||||
if (pending & MIPS_INT_MASK_2) {
|
||||
/* tulip secondary */
|
||||
intr_handle(&cpu_intrtab[2]);
|
||||
}
|
||||
|
||||
if (pending & MIPS_INT_MASK_4) {
|
||||
/* ICU interrupts */
|
||||
intr_handle(&cpu_intrtab[4]);
|
||||
}
|
||||
(void)splhigh();
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: machdep.c,v 1.109 2010/02/08 19:02:27 joerg Exp $ */
|
||||
/* $NetBSD: machdep.c,v 1.110 2011/02/20 07:54:10 matt Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2006 Izumi Tsutsui. All rights reserved.
|
||||
|
|
@ -50,7 +50,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.109 2010/02/08 19:02:27 joerg Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.110 2011/02/20 07:54:10 matt Exp $");
|
||||
|
||||
#include "opt_ddb.h"
|
||||
#include "opt_kgdb.h"
|
||||
|
|
@ -125,27 +125,22 @@ static const char * const cobalt_model[] =
|
|||
phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
|
||||
int mem_cluster_cnt;
|
||||
|
||||
void mach_init(intptr_t, u_int, int32_t);
|
||||
void mach_init(int32_t, u_int, int32_t);
|
||||
void decode_bootstring(void);
|
||||
static char *strtok_light(char *, const char);
|
||||
static u_int read_board_id(void);
|
||||
|
||||
/*
|
||||
* safepri is a safe priority for sleep to set for a spin-wait during
|
||||
* autoconfiguration or after a panic. Used as an argument to splx().
|
||||
*/
|
||||
int safepri = MIPS1_PSL_LOWIPL;
|
||||
|
||||
extern char *esym;
|
||||
|
||||
/*
|
||||
* Do all the stuff that locore normally does before calling main().
|
||||
*/
|
||||
void
|
||||
mach_init(intptr_t memsize, u_int bim, int32_t bip32)
|
||||
mach_init(int32_t memsize32, u_int bim, int32_t bip32)
|
||||
{
|
||||
void *bip = (void *)(intptr_t)bip32;
|
||||
intptr_t memsize = (int32_t)memsize32;
|
||||
char *kernend;
|
||||
char *bip = (char *)(intptr_t)(int32_t)bip32;
|
||||
u_long first, last;
|
||||
extern char edata[], end[];
|
||||
const char *bi_msg;
|
||||
|
|
@ -183,16 +178,15 @@ mach_init(intptr_t memsize, u_int bim, int32_t bip32)
|
|||
*/
|
||||
memset(edata, 0, kernend - edata);
|
||||
|
||||
/*
|
||||
* XXX
|
||||
* lwp0 and cpu_info_store are allocated in BSS
|
||||
* and initialized before mach_init() is called,
|
||||
* so restore them again.
|
||||
*/
|
||||
lwp0.l_cpu = &cpu_info_store;
|
||||
cpu_info_store.ci_curlwp = &lwp0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Copy exception-dispatch code down to exception vector.
|
||||
* Initialize locore-function vector.
|
||||
* Clear out the I and D caches.
|
||||
*/
|
||||
mips_vector_init(NULL, false);
|
||||
|
||||
/* Check for valid bootinfo passed from bootstrap */
|
||||
if (bim == BOOTINFO_MAGIC) {
|
||||
struct btinfo_magic *bi_magic;
|
||||
|
|
@ -260,18 +254,12 @@ mach_init(intptr_t memsize, u_int bim, int32_t bip32)
|
|||
|
||||
consinit();
|
||||
|
||||
KASSERT(&lwp0 == curlwp);
|
||||
if (bi_msg != NULL)
|
||||
printf("%s: magic=%#x\n", bi_msg, bim);
|
||||
printf("%s: magic=%#x bip=%p\n", bi_msg, bim, bip);
|
||||
|
||||
uvm_setpagesize();
|
||||
|
||||
/*
|
||||
* Copy exception-dispatch code down to exception vector.
|
||||
* Initialize locore-function vector.
|
||||
* Clear out the I and D caches.
|
||||
*/
|
||||
mips_vector_init();
|
||||
|
||||
/*
|
||||
* The boot command is passed in the top 512 bytes,
|
||||
* so don't clobber that.
|
||||
|
|
@ -291,8 +279,9 @@ mach_init(intptr_t memsize, u_int bim, int32_t bip32)
|
|||
if ((bi_syms != NULL) && (esym != NULL))
|
||||
ksyms_addsyms_elf(esym - ssym, ssym, esym);
|
||||
#endif
|
||||
KASSERT(&lwp0 == curlwp);
|
||||
#ifdef DDB
|
||||
if (boothowto & RB_KDB)
|
||||
// if (boothowto & RB_KDB)
|
||||
Debugger();
|
||||
#endif
|
||||
#ifdef KGDB
|
||||
|
|
@ -315,6 +304,9 @@ mach_init(intptr_t memsize, u_int bim, int32_t bip32)
|
|||
|
||||
pmap_bootstrap();
|
||||
|
||||
/*
|
||||
* Allocate space for proc0's USPACE.
|
||||
*/
|
||||
mips_init_lwp0_uarea();
|
||||
}
|
||||
|
||||
|
|
@ -359,8 +351,7 @@ cpu_reboot(int howto, char *bootstr)
|
|||
{
|
||||
|
||||
/* Take a snapshot before clobbering any registers. */
|
||||
if (curlwp)
|
||||
savectx(curpcb);
|
||||
savectx(curpcb);
|
||||
|
||||
if (cold) {
|
||||
howto |= RB_HALT;
|
||||
|
|
@ -516,7 +507,7 @@ lookup_bootinfo(unsigned int type)
|
|||
return (void *)help;
|
||||
help += bt->next;
|
||||
} while (bt->next != 0 &&
|
||||
(size_t)help < (size_t)bootinfo + BOOTINFO_SIZE);
|
||||
(uintptr_t)help < (uintptr_t)bootinfo + BOOTINFO_SIZE);
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
# $NetBSD: GENERIC,v 1.127 2010/11/23 11:13:55 hannken Exp $
|
||||
# $NetBSD: GENERIC,v 1.128 2011/02/20 07:54:10 matt Exp $
|
||||
#
|
||||
# GENERIC machine description file
|
||||
#
|
||||
|
|
@ -22,7 +22,7 @@ include "arch/cobalt/conf/std.cobalt"
|
|||
|
||||
options INCLUDE_CONFIG_FILE # embed config file in kernel binary
|
||||
|
||||
#ident "GENERIC-$Revision: 1.127 $"
|
||||
#ident "GENERIC-$Revision: 1.128 $"
|
||||
|
||||
maxusers 32
|
||||
|
||||
|
|
@ -43,13 +43,13 @@ options SYSCTL_INCLUDE_DESCR # Include sysctl descriptions in kernel
|
|||
#options BUFQ_PRIOCSCAN
|
||||
|
||||
# Debugging options
|
||||
#options DIAGNOSTIC # extra kernel sanity checking
|
||||
options DIAGNOSTIC # extra kernel sanity checking
|
||||
#options DEBUG # extra kernel debugging support
|
||||
#options KMEMSTATS # kernel memory statistics (vmstat -m)
|
||||
options DDB # kernel dynamic debugger
|
||||
#options DDB_HISTORY_SIZE=100 # enable history editing in DDB
|
||||
#makeoptions DEBUG="-g" # compile full symbol table
|
||||
makeoptions CPUFLAGS="-march=vr5000 -mabi=32"
|
||||
makeoptions DEBUG="-g" # compile full symbol table
|
||||
makeoptions CPUFLAGS="-march=vr5000"
|
||||
|
||||
# Compatibility options
|
||||
options COMPAT_43 # compatibility with 4.3BSD binaries
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
# $NetBSD: files.cobalt,v 1.34 2009/08/21 03:50:01 thorpej Exp $
|
||||
# $NetBSD: files.cobalt,v 1.35 2011/02/20 07:54:10 matt Exp $
|
||||
|
||||
maxpartitions 16
|
||||
|
||||
|
|
@ -46,8 +46,6 @@ file arch/cobalt/cobalt/disksubr.c
|
|||
file arch/cobalt/cobalt/interrupt.c
|
||||
file arch/cobalt/cobalt/machdep.c
|
||||
|
||||
file arch/mips/mips/softintr.c
|
||||
|
||||
file common/bus_dma/bus_dmamem_common.c
|
||||
|
||||
file dev/md_root.c memory_disk_hooks
|
||||
|
|
|
|||
|
|
@ -1,8 +1,7 @@
|
|||
# $NetBSD: std.cobalt,v 1.14 2009/12/17 15:29:47 matt Exp $
|
||||
# $NetBSD: std.cobalt,v 1.15 2011/02/20 07:54:10 matt Exp $
|
||||
|
||||
machine cobalt mips
|
||||
include "conf/std" # MI standard options
|
||||
#makeoptions MACHINE_ARCH="mipsel"
|
||||
|
||||
options MIPS3
|
||||
options MIPS3_ENABLE_CLOCK_INTR
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: gt.c,v 1.22 2009/11/27 03:23:05 rmind Exp $ */
|
||||
/* $NetBSD: gt.c,v 1.23 2011/02/20 07:54:11 matt Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
|
||||
|
|
@ -26,7 +26,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: gt.c,v 1.22 2009/11/27 03:23:05 rmind Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: gt.c,v 1.23 2011/02/20 07:54:11 matt Exp $");
|
||||
|
||||
#include "opt_pci.h"
|
||||
#include "pci.h"
|
||||
|
|
@ -131,7 +131,7 @@ gt_attach(device_t parent, device_t self, void *aux)
|
|||
pc->pc_memext = extent_create("pcimem", 0x12000000, 0x13ffffff,
|
||||
M_DEVBUF, NULL, 0, EX_NOWAIT);
|
||||
pci_configure_bus(pc, pc->pc_ioext, pc->pc_memext, NULL, 0,
|
||||
mips_dcache_align);
|
||||
mips_cache_info.mci_dcache_align);
|
||||
#endif
|
||||
pba.pba_dmat = &pci_bus_dma_tag;
|
||||
pba.pba_dmat64 = NULL;
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: bootinfo.h,v 1.9 2009/12/30 18:39:03 he Exp $ */
|
||||
/* $NetBSD: bootinfo.h,v 1.10 2011/02/20 07:54:11 matt Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1997, 2000-2004
|
||||
|
|
@ -34,7 +34,7 @@
|
|||
|
||||
struct btinfo_common {
|
||||
int32_t next; /* offset of next item, or zero */
|
||||
int32_t type;
|
||||
uint32_t type;
|
||||
};
|
||||
|
||||
#define BTINFO_MAGIC 1
|
||||
|
|
@ -45,7 +45,7 @@ struct btinfo_common {
|
|||
|
||||
struct btinfo_magic {
|
||||
struct btinfo_common common;
|
||||
int32_t magic;
|
||||
uint32_t magic;
|
||||
};
|
||||
|
||||
#define BTINFO_BOOTPATH_LEN 80
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: intr.h,v 1.32 2008/10/01 02:44:14 uebayasi Exp $ */
|
||||
/* $NetBSD: intr.h,v 1.33 2011/02/20 07:54:11 matt Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
|
||||
|
|
@ -28,58 +28,13 @@
|
|||
#ifndef _COBALT_INTR_H_
|
||||
#define _COBALT_INTR_H_
|
||||
|
||||
#define IPL_NONE 0 /* Disable only this interrupt. */
|
||||
#define IPL_SOFTCLOCK 1 /* generic software interrupts */
|
||||
#define IPL_SOFTBIO 1 /* clock software interrupts */
|
||||
#define IPL_SOFTNET 2 /* network software interrupts */
|
||||
#define IPL_SOFTSERIAL 2 /* serial software interrupts */
|
||||
#define IPL_VM 3 /* Memory allocation */
|
||||
#define IPL_SCHED 4 /* Disable clock interrupts. */
|
||||
#define IPL_HIGH 4 /* Disable all interrupts. */
|
||||
#define NIPL 5
|
||||
|
||||
/* Interrupt sharing types. */
|
||||
#define IST_NONE 0 /* none */
|
||||
#define IST_PULSE 1 /* pulsed */
|
||||
#define IST_EDGE 2 /* edge-triggered */
|
||||
#define IST_LEVEL 3 /* level-triggered */
|
||||
#include <mips/intr.h>
|
||||
|
||||
#ifdef _KERNEL
|
||||
#ifndef _LOCORE
|
||||
|
||||
#include <sys/evcnt.h>
|
||||
#include <mips/cpuregs.h>
|
||||
#include <mips/locore.h>
|
||||
|
||||
#define SPLVM (MIPS_SOFT_INT_MASK_0 | MIPS_SOFT_INT_MASK_1 | \
|
||||
MIPS_INT_MASK_1 | MIPS_INT_MASK_2 | \
|
||||
MIPS_INT_MASK_3 | MIPS_INT_MASK_4)
|
||||
#define SPLSCHED (SPLVM | MIPS_INT_MASK_5)
|
||||
|
||||
#define spl0() (void)_spllower(0)
|
||||
#define splx(s) (void)_splset(s)
|
||||
#define splvm() _splraise(SPLVM)
|
||||
#define splsched() _splraise(SPLSCHED)
|
||||
#define splhigh() _splraise(MIPS_INT_MASK)
|
||||
|
||||
#define splsoftclock() _splraise(MIPS_SOFT_INT_MASK_0)
|
||||
#define splsoftbio() _splraise(MIPS_SOFT_INT_MASK_0)
|
||||
#define splsoftnet() _splraise(MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
|
||||
#define splsoftserial() _splraise(MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
|
||||
|
||||
typedef int ipl_t;
|
||||
typedef struct {
|
||||
int _spl;
|
||||
} ipl_cookie_t;
|
||||
|
||||
ipl_cookie_t makeiplcookie(ipl_t);
|
||||
|
||||
static inline int
|
||||
splraiseipl(ipl_cookie_t icookie)
|
||||
{
|
||||
|
||||
return _splraise(icookie._spl);
|
||||
}
|
||||
|
||||
#define NCPU_INT 6
|
||||
#define NICU_INT 16
|
||||
|
|
@ -94,8 +49,6 @@ struct cobalt_intrhand {
|
|||
#define COBALT_COOKIE_TYPE_ICU 0x2
|
||||
};
|
||||
|
||||
#include <mips/softintr.h>
|
||||
|
||||
void intr_init(void);
|
||||
void *cpu_intr_establish(int, int, int (*)(void *), void *);
|
||||
void *icu_intr_establish(int, int, int, int (*)(void *), void *);
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: pci_machdep.c,v 1.27 2008/05/30 19:26:35 ad Exp $ */
|
||||
/* $NetBSD: pci_machdep.c,v 1.28 2011/02/20 07:54:11 matt Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
|
||||
|
|
@ -26,7 +26,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.27 2008/05/30 19:26:35 ad Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.28 2011/02/20 07:54:11 matt Exp $");
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <sys/param.h>
|
||||
|
|
@ -109,6 +109,8 @@ pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
|
|||
pcireg_t data;
|
||||
int bus, dev, func;
|
||||
|
||||
KASSERT(pc != NULL);
|
||||
|
||||
pci_decompose_tag(pc, tag, &bus, &dev, &func);
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
# $NetBSD: Makefile,v 1.22 2011/01/22 19:19:16 joerg Exp $
|
||||
# $NetBSD: Makefile,v 1.23 2011/02/20 07:54:11 matt Exp $
|
||||
|
||||
NOMAN= # defined
|
||||
|
||||
|
|
@ -53,7 +53,13 @@ CPPFLAGS+= -DSUPPORT_DHCP -DSUPPORT_BOOTP
|
|||
#CPPFLAGS+= -DRPC_DEBUG -DRARP_DEBUG -DNET_DEBUG -DDEBUG -DPARANOID
|
||||
|
||||
# compiler flags for smallest code size
|
||||
CFLAGS= -Os -mmemcpy -ffreestanding -mno-abicalls -msoft-float -G 128
|
||||
CFLAGS= -O2 -mmemcpy -ffreestanding -mno-abicalls -msoft-float -G 128
|
||||
.if ${MACHINE_ARCH} == "mips64el"
|
||||
AFLAGS+= -mips3 -mabi=32
|
||||
CFLAGS+= -mips3 -mabi=32
|
||||
LINKFORMAT= -m elf32ltsmip
|
||||
MACHINE_ARCH= mipsel
|
||||
.endif
|
||||
|
||||
CFLAGS+= -Wall -Werror
|
||||
CFLAGS+= -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith
|
||||
|
|
@ -101,7 +107,7 @@ vers.c: ${.CURDIR}/version
|
|||
${.CURDIR}/version "cobalt"
|
||||
|
||||
${PROG}: ${LDSCRIPT} ${OBJS} ${LIBS}
|
||||
${LD} -Map ${PROG}.map -N -x -Ttext ${LOAD_ADDRESS} \
|
||||
${LD} ${LINKFORMAT} -Map ${PROG}.map -N -x -Ttext ${LOAD_ADDRESS} \
|
||||
-T ${LDSCRIPT} -e start -o ${PROG} ${OBJS} ${LIBS}
|
||||
gzip -c9 ${PROG} > ${PROG}.gz
|
||||
@${SIZE} ${PROG}
|
||||
|
|
|
|||
Loading…
Reference in New Issue