Abandon disabled_mask and spl_mask, and use only current_spl_level to
manage interrupt masking. This change is necessary for straightforward implementation of coming IPL support for cascaded intrs, and it should not impair performance.
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1ef476f4a4
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c939f00e98
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@ -1,4 +1,4 @@
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/* $NetBSD: spl.S,v 1.3 2001/04/17 16:07:13 toshii Exp $ */
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/* $NetBSD: spl.S,v 1.4 2001/05/14 16:19:30 toshii Exp $ */
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/*
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* Copyright (c) 1996-1998 Mark Brinicombe.
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@ -49,12 +49,6 @@
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Lcurrent_spl_level:
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.word _C_LABEL(current_spl_level)
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Lspl_masks:
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.word _C_LABEL(spl_masks)
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Lspl_mask:
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.word _C_LABEL(spl_mask)
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ENTRY(raisespl)
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stmfd sp!, {r4}
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/* Disable interrupts */
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@ -70,12 +64,6 @@ ENTRY(raisespl)
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str r3, [r1] /* Store the new spl level */
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ldr r2, Lspl_masks /* Get the spl mask */
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ldr r2, [r2, r3, lsl #2]
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ldr r1, Lspl_mask /* Store in the current spl mask */
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str r2, [r1]
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stmfd sp!, {r0, lr} /* Preserve registers */
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bl _C_LABEL(irq_setmasks) /* Update the actual masks */
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ldmfd sp!, {r0, lr}
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@ -99,12 +87,6 @@ ENTRY(lowerspl)
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str r3, [r1] /* Store the new spl level */
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ldr r2, Lspl_masks /* Get the spl mask */
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ldr r2, [r2, r3, lsl #2]
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ldr r1, Lspl_mask /* Store in the current spl mask */
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str r2, [r1]
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stmfd sp!, {r0, lr} /* Preserve registers */
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bl _C_LABEL(irq_setmasks) /* Update the actual masks */
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msr cpsr_all, r4
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@ -132,12 +114,6 @@ ENTRY(splx)
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str r3, [r1] /* Store the new spl level */
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ldr r2, Lspl_masks /* Get the spl mask */
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ldr r2, [r2, r3, lsl #2] /* Use r4 so available later */
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ldr r1, Lspl_mask /* Store in the current spl mask */
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str r2, [r1]
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stmfd sp!, {r0, lr} /* Preserve registers */
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bl _C_LABEL(irq_setmasks) /* Update the actual masks */
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msr cpsr_all, r4
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@ -1,4 +1,4 @@
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/* $NetBSD: sa11x0_irq.S,v 1.4 2001/03/11 14:37:03 toshii Exp $ */
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/* $NetBSD: sa11x0_irq.S,v 1.5 2001/05/14 16:19:31 toshii Exp $ */
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/*
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* Copyright (c) 1998 Mark Brinicombe.
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@ -50,9 +50,6 @@
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.text
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.align 0
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Ldisabled_mask:
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.word _C_LABEL(disabled_mask)
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Lcurrent_spl_level:
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.word _C_LABEL(current_spl_level)
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@ -109,12 +106,6 @@ ASENTRY_NP(irq_entry)
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add r1, r1, #1
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str r1, [r0]
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/* Block the current requested interrupts */
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ldr r1, Ldisabled_mask
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ldr r0, [r1]
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stmfd sp!, {r0}
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orr r0, r0, r8
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/*
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* Need to block all interrupts at the IPL or lower for
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* all asserted interrupts.
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@ -141,9 +132,6 @@ Lfind_highest_ipl:
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add r9, r9, #1
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ldr r2, [r7, r9, lsl #2]
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mvn r2, r2
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orr r0, r0, r2
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str r0, [r1]
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ldr r0, Lcurrent_spl_level
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ldr r1, [r0]
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@ -210,7 +198,7 @@ irqchainloop:
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add lr, pc, #nextinchain - . - 8 /* return address */
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ldr r0, [r6, #(IH_ARG)] /* Get argument pointer */
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teq r0, #0x00000000 /* If arg is zero pass stack frame */
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addeq r0, sp, #8 /* ... stack frame [XXX needs care] */
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addeq r0, sp, #4 /* ... stack frame [XXX needs care] */
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ldr pc, [r6, #(IH_FUNC)] /* Call handler */
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nextinchain:
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@ -233,9 +221,6 @@ nextirq:
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str r2, [r1]
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/* Restore previous disabled mask */
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ldmfd sp!, {r2}
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ldr r1, Ldisabled_mask
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str r2, [r1]
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bl _C_LABEL(irq_setmasks)
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bl _C_LABEL(dosoftints) /* Handle the soft interrupts */
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@ -314,9 +299,6 @@ irqast:
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b . - 8
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Lspl_mask:
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.word _C_LABEL(spl_mask) /* irq's allowed at current spl level */
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Lcurrent_mask:
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.word _C_LABEL(current_mask) /* irq's that are usable */
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@ -329,12 +311,11 @@ ENTRY(irq_setmasks)
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/* Calculate interrupt mask */
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ldr r1, Lcurrent_mask /* All the enabled interrupts */
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ldr r1, [r1]
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ldr r2, Lspl_mask /* Block due to current spl level */
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ldr r0, Lspl_masks
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ldr r2, Lcurrent_spl_level
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ldr r2, [r2]
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ldr r2, [r0, r2, lsl #2]
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and r1, r1, r2
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ldr r2, Ldisabled_mask /* Block due to active interrupts */
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ldr r2, [r2]
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bic r1, r1, r2
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ldr r0, [pc, #_C_LABEL(saipic_base) - . - 8]
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str r1, [r0, #(SAIPIC_MR)] /* Set mask register */
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@ -1,4 +1,4 @@
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/* $NetBSD: sa11x0_irqhandler.c,v 1.3 2001/03/31 12:48:10 toshii Exp $ */
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/* $NetBSD: sa11x0_irqhandler.c,v 1.4 2001/05/14 16:19:31 toshii Exp $ */
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/*-
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* Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
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@ -100,8 +100,6 @@ irqhandler_t *irqhandlers[NIRQS];
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int current_intr_depth;
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u_int current_mask;
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u_int actual_mask;
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u_int disabled_mask;
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u_int spl_mask;
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u_int imask[NIPL];
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u_int irqblock[NIRQS];
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@ -238,7 +236,6 @@ sa11x0_intr_establish(ic, irq, type, level, ih_fun, ih_arg)
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saved_cpsr = SetCPSR(I32_bit, I32_bit);
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set_spl_masks();
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spl_mask = spl_masks[current_spl_level];
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current_mask |= (1 << irq);
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irq_setmasks();
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@ -283,7 +280,6 @@ sa11x0_intr_disestablish(ic, arg)
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intr_calculatemasks();
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saved_cpsr = SetCPSR(I32_bit, I32_bit);
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set_spl_masks();
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spl_mask = spl_masks[current_spl_level];
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current_mask &= ~(1 << irq);
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irq_setmasks();
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