First version of the CyberVision 3D driver. This driver is based on
the CyberVision64 driver. Modified by Tobias Abt with some bugfixes from Bernd Ernesti. ZorroII is at the moment not supported and there is a small problem with the Console driver where you just get a black screen, but the system boots and you can use X11 without a problem.
This commit is contained in:
veego
parent
f470d346c3
commit
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/* $NetBSD: grf_cv3dreg.h,v 1.1 1997/10/19 18:55:23 veego Exp $ */
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/*
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* Copyright (c) 1995 Michael Teske
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Ezra Story and by Kari
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* Mettinen.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _GRF_CV3DREG_H
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#define _GRF_CV3DREG_H
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/*
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* This is derived from ciruss driver source
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*/
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/* Extension to grfvideo_mode to support text modes.
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* This can be passed to both text & gfx functions
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* without worry. If gv.depth == 4, then the extended
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* fields for a text mode are present.
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*/
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struct grfcv3dtext_mode {
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struct grfvideo_mode gv;
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unsigned short fx; /* font x dimension */
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unsigned short fy; /* font y dimension */
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unsigned short cols; /* screen dimensions */
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unsigned short rows;
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void *fdata; /* font data */
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unsigned short fdstart;
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unsigned short fdend;
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};
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/* maximum console size */
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#define MAXROWS 200
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#define MAXCOLS 200
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/* read VGA register */
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#define vgar(ba, reg) (*((volatile caddr_t)(((caddr_t)ba)+(reg ^ 3))))
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/* write VGA register */
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#define vgaw(ba, reg, val) \
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*((volatile caddr_t)(((caddr_t)ba)+(reg ^ 3))) = ((val) & 0xff)
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/* MMIO access */
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#define BYTEACCIO(x) ( ((x) & 0x3ffc) | (((x) & 3)^3) | (((x) & 3) <<14) )
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#define vgario(ba, reg) \
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(*((volatile caddr_t)(((caddr_t)ba) + ( BYTEACCIO(reg) ))))
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#define vgawio(ba, reg, val) \
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do { \
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if (cv3d_zorroIII != 1) { \
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*((volatile caddr_t)(((caddr_t)cv3d_vcode_switch_base) + \
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0x04)) = (0x01 & 0xffff); \
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asm volatile ("nop"); \
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} \
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*((volatile caddr_t)(((caddr_t)cv3d_special_register_base) + \
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( BYTEACCIO(reg) & 0xffff ))) = ((val) & 0xff); \
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if (cv3d_zorroIII != 1) { \
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*((volatile caddr_t)(((caddr_t)cv3d_vcode_switch_base) + \
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0x04)) = (0x02 & 0xffff); \
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asm volatile ("nop"); \
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} \
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} while (0)
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/* read 32 Bit VGA register */
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#define vgar32(ba, reg) ( *((unsigned long *) (((volatile caddr_t)ba)+reg)) )
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/* write 32 Bit VGA register */
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#define vgaw32(ba, reg, val) \
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*((unsigned long *) (((volatile caddr_t)ba)+reg)) = val
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/* read 16 Bit VGA register */
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#define vgar16(ba, reg) ( *((unsigned short *) (((volatile caddr_t)ba)+reg)) )
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/* write 16 Bit VGA register */
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#define vgaw16(ba, reg, val) \
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*((unsigned short *) (((volatile caddr_t)ba)+reg)) = val
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int grfcv3d_cnprobe __P((void));
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void grfcv3d_iteinit __P((struct grf_softc *));
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static __inline void GfxBusyWait __P((volatile caddr_t));
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static __inline void GfxFifoWait __P((volatile caddr_t));
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static __inline unsigned char RAttr __P((volatile caddr_t, short));
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static __inline unsigned char RSeq __P((volatile caddr_t, short));
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static __inline unsigned char RCrt __P((volatile caddr_t, short));
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static __inline unsigned char RGfx __P((volatile caddr_t, short));
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/*
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* defines for the used register addresses (mw)
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*
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* NOTE: there are some registers that have different addresses when
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* in mono or color mode. We only support color mode, and thus
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* some addresses won't work in mono-mode!
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*
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* General and VGA-registers taken from retina driver. Fixed a few
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* bugs in it. (SR and GR read address is Port + 1, NOT Port)
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*
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*/
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/* General Registers: */
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#define GREG_MISC_OUTPUT_R 0x03CC
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#define GREG_MISC_OUTPUT_W 0x03C2
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#define GREG_FEATURE_CONTROL_R 0x03CA
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#define GREG_FEATURE_CONTROL_W 0x03DA
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#define GREG_INPUT_STATUS0_R 0x03C2
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#define GREG_INPUT_STATUS1_R 0x03DA
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/* Setup Registers: */
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#define SREG_OPTION_SELECT 0x0102
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#define SREG_VIDEO_SUBS_ENABLE 0x03C3 /* Trio64: 0x46E8 */
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/* Attribute Controller: */
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#define ACT_ADDRESS 0x03C0
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#define ACT_ADDRESS_R 0x03C1
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#define ACT_ADDRESS_W 0x03C0
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#define ACT_ADDRESS_RESET 0x03DA
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#define ACT_ID_PALETTE0 0x00
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#define ACT_ID_PALETTE1 0x01
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#define ACT_ID_PALETTE2 0x02
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#define ACT_ID_PALETTE3 0x03
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#define ACT_ID_PALETTE4 0x04
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#define ACT_ID_PALETTE5 0x05
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#define ACT_ID_PALETTE6 0x06
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#define ACT_ID_PALETTE7 0x07
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#define ACT_ID_PALETTE8 0x08
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#define ACT_ID_PALETTE9 0x09
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#define ACT_ID_PALETTE10 0x0A
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#define ACT_ID_PALETTE11 0x0B
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#define ACT_ID_PALETTE12 0x0C
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#define ACT_ID_PALETTE13 0x0D
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#define ACT_ID_PALETTE14 0x0E
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#define ACT_ID_PALETTE15 0x0F
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#define ACT_ID_ATTR_MODE_CNTL 0x10
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#define ACT_ID_OVERSCAN_COLOR 0x11
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#define ACT_ID_COLOR_PLANE_ENA 0x12
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#define ACT_ID_HOR_PEL_PANNING 0x13
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#define ACT_ID_COLOR_SELECT 0x14
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/* Graphics Controller: */
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#define GCT_ADDRESS 0x03CE
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#define GCT_ADDRESS_R 0x03CF
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#define GCT_ADDRESS_W 0x03CF
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#define GCT_ID_SET_RESET 0x00
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#define GCT_ID_ENABLE_SET_RESET 0x01
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#define GCT_ID_COLOR_COMPARE 0x02
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#define GCT_ID_DATA_ROTATE 0x03
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#define GCT_ID_READ_MAP_SELECT 0x04
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#define GCT_ID_GRAPHICS_MODE 0x05
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#define GCT_ID_MISC 0x06
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#define GCT_ID_COLOR_XCARE 0x07
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#define GCT_ID_BITMASK 0x08
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/* Sequencer: */
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#define SEQ_ADDRESS 0x03C4
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#define SEQ_ADDRESS_R 0x03C5
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#define SEQ_ADDRESS_W 0x03C5
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#define SEQ_ID_RESET 0x00
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#define SEQ_ID_CLOCKING_MODE 0x01
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#define SEQ_ID_MAP_MASK 0x02
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#define SEQ_ID_CHAR_MAP_SELECT 0x03
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#define SEQ_ID_MEMORY_MODE 0x04
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#define SEQ_ID_UNKNOWN1 0x05
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#define SEQ_ID_UNKNOWN2 0x06
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#define SEQ_ID_UNKNOWN3 0x07
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/* S3 extensions */
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#define SEQ_ID_UNLOCK_EXT 0x08
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#define SEQ_ID_MMIO_SELECT 0x09 /* Trio64: SEQ_ID_EXT_SEQ_REG9 */
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#define SEQ_ID_BUS_REQ_CNTL 0x0A
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#define SEQ_ID_EXT_MISC_SEQ 0x0B
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#define SEQ_ID_UNKNOWN4 0x0C
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#define SEQ_ID_EXT_SEQ 0x0D
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#define SEQ_ID_UNKNOWN5 0x0E
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#define SEQ_ID_UNKNOWN6 0x0F
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#define SEQ_ID_MCLK_LO 0x10
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#define SEQ_ID_MCLK_HI 0x11
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#define SEQ_ID_DCLK_LO 0x12
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#define SEQ_ID_DCLK_HI 0x13
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#define SEQ_ID_CLKSYN_CNTL_1 0x14
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#define SEQ_ID_CLKSYN_CNTL_2 0x15
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#define SEQ_ID_CLKSYN_TEST_HI 0x16 /* reserved for S3 testing of the */
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#define SEQ_ID_CLKSYN_TEST_LO 0x17 /* internal clock synthesizer */
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#define SEQ_ID_RAMDAC_CNTL 0x18
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#define SEQ_ID_MORE_MAGIC 0x1A /* not available on the Virge */
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#define SEQ_ID_SIGNAL_SELECT 0x1C
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/* CRT Controller: */
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#define CRT_ADDRESS 0x03D4
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#define CRT_ADDRESS_R 0x03D5
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#define CRT_ADDRESS_W 0x03D5
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#define CRT_ID_HOR_TOTAL 0x00
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#define CRT_ID_HOR_DISP_ENA_END 0x01
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#define CRT_ID_START_HOR_BLANK 0x02
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#define CRT_ID_END_HOR_BLANK 0x03
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#define CRT_ID_START_HOR_RETR 0x04
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#define CRT_ID_END_HOR_RETR 0x05
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#define CRT_ID_VER_TOTAL 0x06
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#define CRT_ID_OVERFLOW 0x07
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#define CRT_ID_PRESET_ROW_SCAN 0x08
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#define CRT_ID_MAX_SCAN_LINE 0x09
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#define CRT_ID_CURSOR_START 0x0A
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#define CRT_ID_CURSOR_END 0x0B
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#define CRT_ID_START_ADDR_HIGH 0x0C
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#define CRT_ID_START_ADDR_LOW 0x0D
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#define CRT_ID_CURSOR_LOC_HIGH 0x0E
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#define CRT_ID_CURSOR_LOC_LOW 0x0F
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#define CRT_ID_START_VER_RETR 0x10
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#define CRT_ID_END_VER_RETR 0x11
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#define CRT_ID_VER_DISP_ENA_END 0x12
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#define CRT_ID_SCREEN_OFFSET 0x13
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#define CRT_ID_UNDERLINE_LOC 0x14
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#define CRT_ID_START_VER_BLANK 0x15
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#define CRT_ID_END_VER_BLANK 0x16
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#define CRT_ID_MODE_CONTROL 0x17
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#define CRT_ID_LINE_COMPARE 0x18
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#define CRT_ID_GD_LATCH_RBACK 0x22
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#define CRT_ID_ACT_TOGGLE_RBACK 0x24
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#define CRT_ID_ACT_INDEX_RBACK 0x26
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/* S3 extensions: S3 VGA Registers */
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#define CRT_ID_DEVICE_HIGH 0x2D
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#define CRT_ID_DEVICE_LOW 0x2E
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#define CRT_ID_REVISION 0x2F
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#define CRT_ID_CHIP_ID_REV 0x30
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#define CRT_ID_MEMORY_CONF 0x31
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#define CRT_ID_BACKWAD_COMP_1 0x32
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#define CRT_ID_BACKWAD_COMP_2 0x33
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#define CRT_ID_BACKWAD_COMP_3 0x34
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#define CRT_ID_REGISTER_LOCK 0x35
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#define CRT_ID_CONFIG_1 0x36
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#define CRT_ID_CONFIG_2 0x37
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#define CRT_ID_REGISTER_LOCK_1 0x38
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#define CRT_ID_REGISTER_LOCK_2 0x39
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#define CRT_ID_MISC_1 0x3A
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#define CRT_ID_DISPLAY_FIFO 0x3B
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#define CRT_ID_LACE_RETR_START 0x3C
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/* S3 extensions: System Control Registers */
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#define CRT_ID_SYSTEM_CONFIG 0x40
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#define CRT_ID_BIOS_FLAG 0x41
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#define CRT_ID_LACE_CONTROL 0x42
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#define CRT_ID_EXT_MODE 0x43
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#define CRT_ID_HWGC_MODE 0x45 /* HWGC = Hardware Graphics Cursor */
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#define CRT_ID_HWGC_ORIGIN_X_HI 0x46
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#define CRT_ID_HWGC_ORIGIN_X_LO 0x47
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#define CRT_ID_HWGC_ORIGIN_Y_HI 0x48
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#define CRT_ID_HWGC_ORIGIN_Y_LO 0x49
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#define CRT_ID_HWGC_FG_STACK 0x4A
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#define CRT_ID_HWGC_BG_STACK 0x4B
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#define CRT_ID_HWGC_START_AD_HI 0x4C
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#define CRT_ID_HWGC_START_AD_LO 0x4D
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#define CRT_ID_HWGC_DSTART_X 0x4E
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#define CRT_ID_HWGC_DSTART_Y 0x4F
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/* S3 extensions: System Extension Registers */
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#define CRT_ID_EXT_SYS_CNTL_1 0x50
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#define CRT_ID_EXT_SYS_CNTL_2 0x51
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#define CRT_ID_EXT_BIOS_FLAG_1 0x52
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#define CRT_ID_EXT_MEM_CNTL_1 0x53
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#define CRT_ID_EXT_MEM_CNTL_2 0x54
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#define CRT_ID_EXT_DAC_CNTL 0x55
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#define CRT_ID_EX_SYNC_1 0x56
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#define CRT_ID_EX_SYNC_2 0x57
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#define CRT_ID_LAW_CNTL 0x58 /* LAW = Linear Address Window */
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#define CRT_ID_LAW_POS_HI 0x59
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#define CRT_ID_LAW_POS_LO 0x5A
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#define CRT_ID_GOUT_PORT 0x5C
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#define CRT_ID_EXT_HOR_OVF 0x5D
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#define CRT_ID_EXT_VER_OVF 0x5E
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#define CRT_ID_EXT_MEM_CNTL_3 0x60
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#define CRT_ID_EXT_MEM_CNTL_4 0x61 /* only available on the Virge */
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#define CRT_ID_EX_SYNC_3 0x63 /* not available on the Virge */
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#define CRT_ID_EXT_MISC_CNTL 0x65
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#define CRT_ID_EXT_MISC_CNTL_1 0x66
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#define CRT_ID_EXT_MISC_CNTL_2 0x67
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#define CRT_ID_CONFIG_3 0x68
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#define CRT_ID_EXT_SYS_CNTL_3 0x69
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#define CRT_ID_EXT_SYS_CNTL_4 0x6A
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#define CRT_ID_EXT_BIOS_FLAG_3 0x6B
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#define CRT_ID_EXT_BIOS_FLAG_4 0x6C
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#define CRT_ID_EXT_BIOS_FLAG_5 0x6D /* only available on the Virge */
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#define CRT_ID_RAMDAC_SIG_TEST 0x6E /* only available on the Virge */
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#define CRT_ID_CONFIG_4 0x6F /* only available on the Virge */
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/* Streams Processor */
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#define SP_PRIMARY_CONTROL 0x8180
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#define SP_COLOR_CHROMA_KEY_CONTROL 0x8184
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#define SP_SECONDARY_CONTROL 0x8190
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#define SP_CHROMA_KEY_UPPER_BOUND 0x8194
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#define SP_SECONDARY_CONSTANTS 0x8198
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#define SP_BLEND_CONTROL 0x81A0
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#define SP_PRIMARY_ADDRESS_0 0x81C0
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#define SP_PRIMARY_ADDRESS_1 0x81C4
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#define SP_PRIMARY_STRIDE 0x81C8
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#define SP_DOUBLE_BUFFER_LPB_SUPPORT 0x81CC
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#define SP_SECONDARY_ADDRESS_0 0x81D0
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#define SP_SECONDARY_ADDRESS_1 0x81D4
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#define SP_SECONDARY_STRIDE 0x81D8
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#define SP_OPAQUE_OVERLAY_CONTROL 0x81DC
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#define SP_K1_VERTICAL_SCALE_FACTOR 0x81E0
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#define SP_K2_VERTICAL_SCALE_FACTOR 0x81E4
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#define SP_DDA_VERTICAL_ACCUMULATOR 0x81E8
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#define SP_FIFO_CONTROL 0x81EC
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#define SP_PRIMARY_WINDOW_TOP_LEFT 0x81F0
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#define SP_PRIMARY_WINDOW_SIZE 0x81F4
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#define SP_SECONDARY_WINDOW_TOP_LEFT 0x81F8
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#define SP_SECONDARY_WINDOW_SIZE 0x81FC
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/* Memory Port Controller */
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#define MPC_FIFO_CONTROL 0x8200
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#define MPC_MIU_CONTROL 0x8204
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#define MPC_STREAMS_TIMEOUT 0x8208
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#define MPC_MISC_TIMEOUT 0x820C
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#define MPC_DMA_READ_BASE_ADDRESS 0x8220
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#define MPC_DMA_READ_STRIDE_WIDTH 0x8224
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/* Miscellaneous Registers */
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#define MR_SUBSYSTEM_STATUS_CNTL 0x8504
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#define MR_ADVANCED_FUNCTION_CONTROL 0x850C
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/* S3d Engine */
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#define S3D_BIT_BLT_RECT_FILL 0xA400
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#define S3D_LINE_2D 0xA800
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#define S3D_POLYGON_2D 0xAC00
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#define S3D_LINE_3D 0xB000
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#define S3D_TRIANGLE_3D 0xB400
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#define BLT_ADDRESS 0xA4D4
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#define BLT_SOURCE_ADDRESS 0xA4D4
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#define BLT_DEST_ADDRESS 0xA4D8
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#define BLT_CLIP_LEFT_RIGHT 0xA4DC
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#define BLT_CLIP_LEFT BLT_CLIP_LEFT_RIGHT
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#define BLT_CLIP_RIGHT 0xA4DE
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#define BLT_CLIP_TOP_BOTTOM 0xA4E0
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#define BLT_CLIP_BOTTOM BLT_CLIP_TOP_BOTTOM
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#define BLT_CLIP_TOP 0xA4E2
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#define BLT_DEST_SOURCE_PITCH 0xA4E4
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#define BLT_SOURCE_PITCH BLT_DEST_SOURCE_PITCH
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#define BLT_DEST_PITCH 0xA4E6
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#define BLT_MONO_PATTERN 0xA4E8
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#define BLT_MONO_PATTERN_0 BLT_MONO_PATTERN
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#define BLT_MONO_PATTERN_1 0xA4EC
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#define BLT_PATTERN_BG_COLOR 0xA4F0
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#define BLT_PATTERN_BG_COLOR_TRUE_COLOR BLT_PATTERN_BG_COLOR
|
||||
#define BLT_PATTERN_BG_COLOR_ALPHA BLT_PATTERN_BG_COLOR
|
||||
#define BLT_PATTERN_BG_COLOR_RED 0xA4F1
|
||||
#define BLT_PATTERN_BG_COLOR_HI_COLOR 0xA4F2
|
||||
#define BLT_PATTERN_BG_COLOR_GREEN BLT_PATTERN_BG_COLOR_HI_COLOR
|
||||
#define BLT_PATTERN_BG_COLOR_INDEX 0xA4F3
|
||||
#define BLT_PATTERN_BG_COLOR_BLUE BLT_PATTERN_BG_COLOR_INDEX
|
||||
#define BLT_PATTERN_FG_COLOR 0xA4F4
|
||||
#define BLT_PATTERN_FG_COLOR_TRUE_COLOR BLT_PATTERN_FG_COLOR
|
||||
#define BLT_PATTERN_FG_COLOR_ALPHA BLT_PATTERN_FG_COLOR
|
||||
#define BLT_PATTERN_FG_COLOR_RED 0xA4F5
|
||||
#define BLT_PATTERN_FG_COLOR_HI_COLOR 0xA4F6
|
||||
#define BLT_PATTERN_FG_COLOR_GREEN BLT_PATTERN_FG_COLOR_HI_COLOR
|
||||
#define BLT_PATTERN_FG_COLOR_INDEX 0xA4F7
|
||||
#define BLT_PATTERN_FG_COLOR_BLUE BLT_PATTERN_FG_COLOR_INDEX
|
||||
#define BLT_SOURCE_BG_COLOR 0xA4F8
|
||||
#define BLT_SOURCE_BG_COLOR_TRUE_COLOR BLT_SOURCE_BG_COLOR
|
||||
#define BLT_SOURCE_BG_COLOR_ALPHA BLT_SOURCE_BG_COLOR
|
||||
#define BLT_SOURCE_BG_COLOR_RED 0xA4F9
|
||||
#define BLT_SOURCE_BG_COLOR_HI_COLOR 0xA4FA
|
||||
#define BLT_SOURCE_BG_COLOR_GREEN BLT_SOURCE_BG_COLOR_HI_COLOR
|
||||
#define BLT_SOURCE_BG_COLOR_INDEX 0xA4FB
|
||||
#define BLT_SOURCE_BG_COLOR_BLUE BLT_SOURCE_BG_COLOR_INDEX
|
||||
#define BLT_SOURCE_FG_COLOR 0xA4FC
|
||||
#define BLT_SOURCE_FG_COLOR_TRUE_COLOR BLT_SOURCE_FG_COLOR
|
||||
#define BLT_SOURCE_FG_COLOR_ALPHA BLT_SOURCE_FG_COLOR
|
||||
#define BLT_SOURCE_FG_COLOR_RED 0xA4FD
|
||||
#define BLT_SOURCE_FG_COLOR_HI_COLOR 0xA4FE
|
||||
#define BLT_SOURCE_FG_COLOR_GREEN BLT_SOURCE_FG_COLOR_HI_COLOR
|
||||
#define BLT_SOURCE_FG_COLOR_INDEX 0xA4FF
|
||||
#define BLT_SOURCE_FG_COLOR_BLUE BLT_SOURCE_FG_COLOR_INDEX
|
||||
#define BLT_COMMAND_SET 0xA500
|
||||
#define BLT_WIDTH_HEIGHT 0xA504
|
||||
#define BLT_HEIGHT BLT_WIDTH_HEIGHT
|
||||
#define BLT_WIDTH 0xA506
|
||||
#define BLT_SOURCE_XY 0xA508
|
||||
#define BLT_SOURCE_Y BLT_SOURCE_XY
|
||||
#define BLT_SOURCE_X 0xA50A
|
||||
#define BLT_DESTINATION_XY 0xA50C
|
||||
#define BLT_DESTINATION_Y BLT_DESTINATION_XY
|
||||
#define BLT_DESTINATION_X 0xA50E
|
||||
|
||||
#define L2D_ADDRESS 0xA8D4
|
||||
#define L2D_SOURCE_ADDRESS 0xA8D4
|
||||
#define L2D_DEST_ADDRESS 0xA8D8
|
||||
#define L2D_CLIP_LEFT_RIGHT 0xA8DC
|
||||
#define L2D_CLIP_LEFT L2D_CLIP_LEFT_RIGHT
|
||||
#define L2D_CLIP_RIGHT 0xA8DE
|
||||
#define L2D_CLIP_TOP_BOTTOM 0xA8E0
|
||||
#define L2D_CLIP_BOTTOM L2D_CLIP_TOP_BOTTOM
|
||||
#define L2D_CLIP_TOP 0xA8E2
|
||||
#define L2D_DEST_SOURCE_PITCH 0xA8E4
|
||||
#define L2D_SOURCE_PITCH L2D_DEST_SOURCE_PITCH
|
||||
#define L2D_DEST_PITCH 0xA8E6
|
||||
#define L2D_PAD_0 0xA8E8
|
||||
#define L2D_PATTERN_FG_COLOR_TRUE_COLOR 0xA8F4
|
||||
#define L2D_PATTERN_FG_COLOR_ALPHA L2D_PATTERN_FG_COLOR_TRUECOLOR
|
||||
#define L2D_PATTERN_FG_COLOR_RED 0xA8F5
|
||||
#define L2D_PATTERN_FG_COLOR_HI_COLOR 0xA8F6
|
||||
#define L2D_PATTERN_FG_COLOR_GREEN L2D_PATTERN_FG_COLOR_HICOLOR
|
||||
#define L2D_PATTERN_FG_COLOR_INDEX 0xA8F7
|
||||
#define L2D_PATTERN_FG_COLOR_BLUE L2D_PATTERN_FG_COLOR_INDEX
|
||||
#define L2D_PAD_1 0xA8F8
|
||||
#define L2D_COMMAND_SET 0xA900
|
||||
#define L2D_PAD_2 0xA904
|
||||
#define L2D_END_0_END_1 0xA96C
|
||||
#define L2D_END_1 L2D_END_0_END_1
|
||||
#define L2D_END_0 0xA96E
|
||||
#define L2D_DX 0xA970
|
||||
#define L2D_X_START 0xA974
|
||||
#define L2D_Y_START 0xA978
|
||||
#define L2D_Y_COUNT 0xA97C
|
||||
|
||||
#define P2D_ADDRESS 0xACD4
|
||||
#define P2D_SOURCE_ADDRESS 0xACD4
|
||||
#define P2D_DEST_ADDRESS 0xACD8
|
||||
#define P2D_CLIP_LEFT_RIGHT 0xACDC
|
||||
#define P2D_CLIP_LEFT P2D_CLIP_LEFT_RIGHT
|
||||
#define P2D_CLIP_RIGHT 0xACDE
|
||||
#define P2D_CLIP_TOP_BOTTOM 0xACE0
|
||||
#define P2D_CLIP_BOTTOM P2D_CLIP_TOP_BOTTOM
|
||||
#define P2D_CLIP_TOP 0xACE2
|
||||
#define P2D_DEST_SOURCE_PITCH 0xACE4
|
||||
#define P2D_SOURCE_PITCH P2D_DEST_SOURCE_PITCH
|
||||
#define P2D_DEST_PITCH 0xACE6
|
||||
#define P2D_MONO_PATTERN 0xACE8
|
||||
#define P2D_PATTERN_BG_COLOR_TRUE_COLOR 0xACF0
|
||||
#define P2D_PATTERN_BG_COLOR_ALPHA P2D_PATTERN_BG_COLOR_TRUE_COLOR
|
||||
#define P2D_PATTERN_BG_COLOR_RED 0xACF1
|
||||
#define P2D_PATTERN_BG_COLOR_HI_COLOR 0xACF2
|
||||
#define P2D_PATTERN_BG_COLOR_GREEN P2D_PATTERN_BG_COLOR_HI_COLOR
|
||||
#define P2D_PATTERN_BG_COLOR_INDEX 0xACF3
|
||||
#define P2D_PATTERN_BG_COLOR_BLUE P2D_PATTERN_BG_COLOR_INDEX
|
||||
#define P2D_PATTERN_FG_COLOR_TRUE_COLOR 0xACF4
|
||||
#define P2D_PATTERN_FG_COLOR_ALPHA P2D_PATTERN_FG_COLOR_TRUE_COLOR
|
||||
#define P2D_PATTERN_FG_COLOR_RED 0xACF5
|
||||
#define P2D_PATTERN_FG_COLOR_HI_COLOR 0xACF6
|
||||
#define P2D_PATTERN_FG_COLOR_GREEN P2D_PATTERN_FG_COLOR_HI_COLOR
|
||||
#define P2D_PATTERN_FG_COLOR_INDEX 0xACF7
|
||||
#define P2D_PATTERN_FG_COLOR_BLUE P2D_PATTERN_FG_COLOR_INDEX
|
||||
#define P2D_PAD_1 0xACF8
|
||||
#define P2D_COMMAND_SET 0xAD00
|
||||
#define P2D_PAD_2 0xAD04
|
||||
#define P2D_RIGHT_DX 0xAD68
|
||||
#define P2D_RIGHT_X_START 0xAD6C
|
||||
#define P2D_LEFT_DX 0xAD70
|
||||
#define P2D_LEFT_X_START 0xAD74
|
||||
#define P2D_Y_START 0xAD78
|
||||
#define P2D_Y_COUNT 0xAD7C
|
||||
|
||||
#define CMD_NOP (7 << 27) /* %1111 << 27 */
|
||||
#define CMD_LINE (3 << 27) /* %0011 << 27 */
|
||||
#define CMD_RECT (4 << 27) /* %0010 << 27 */
|
||||
#define CMD_POLYGON (5 << 27) /* %0101 << 27 */
|
||||
#define CMD_BITBLT (0 << 27) /* %0000 << 27 */
|
||||
|
||||
#define CMD_SKIP_TRANSFER_BYTES_1 (1 << 12) /* %01 << 12 */
|
||||
#define CMD_SKIP_TRANSFER_BYTES_2 (2 << 12) /* %10 << 12 */
|
||||
#define CMD_SKIP_TRANSFER_BYTES_3 (3 << 12) /* %11 << 12 */
|
||||
|
||||
#define CMD_TRANSFER_ALIGNMENT_BYTE (0 << 10) /* %00 << 10 */
|
||||
#define CMD_TRANSFER_ALIGNMENT_WORD (1 << 10) /* %01 << 10 */
|
||||
#define CMD_TRANSFER_ALIGNMENT_DOUBLEWORD (2 << 10) /* %10 << 10 */
|
||||
|
||||
#define CMD_CHUNKY (0 << 2) /* %00 << 2 */
|
||||
#define CMD_HI_COLOR (1 << 2) /* %01 << 2 */
|
||||
#define CMD_TRUE_COLOR (2 << 2) /* %10 << 2 */
|
||||
|
||||
#define ROP_FALSE 0x00
|
||||
#define ROP_NOR 0x10
|
||||
#define ROP_ONLYDST 0x20
|
||||
#define ROP_NOTSRC 0x30
|
||||
#define ROP_ONLYSRC 0x40
|
||||
#define ROP_NOTDST 0x50
|
||||
#define ROP_EOR 0x60
|
||||
#define ROP_NAND 0x70
|
||||
#define ROP_AND 0x80
|
||||
#define ROP_NEOR 0x90
|
||||
#define ROP_DST 0xA0
|
||||
#define ROP_NOTONLYSRC 0xB0
|
||||
#define ROP_SRC 0xC0
|
||||
#define ROP_NOTONLYDST 0xD0
|
||||
#define ROP_OR 0xE0
|
||||
#define ROP_TRUE 0xF0
|
||||
|
||||
/* Pass-through */
|
||||
#if 0 /* XXX */
|
||||
#define PASS_ADDRESS 0x
|
||||
#define PASS_ADDRESS_W 0x
|
||||
#endif
|
||||
|
||||
/* Video DAC */
|
||||
#define VDAC_ADDRESS 0x03C8
|
||||
#define VDAC_ADDRESS_W 0x03C8
|
||||
#define VDAC_ADDRESS_R 0x03C7
|
||||
#define VDAC_STATE 0x03C7
|
||||
#define VDAC_DATA 0x03C9
|
||||
#define VDAC_MASK 0x03C6
|
||||
|
||||
|
||||
#define WGfx(ba, idx, val) \
|
||||
do { vgaw(ba, GCT_ADDRESS, idx); vgaw(ba, GCT_ADDRESS_W , val); } while (0)
|
||||
|
||||
#define WSeq(ba, idx, val) \
|
||||
do { vgaw(ba, SEQ_ADDRESS, idx); vgaw(ba, SEQ_ADDRESS_W , val); } while (0)
|
||||
|
||||
#define WCrt(ba, idx, val) \
|
||||
do { vgaw(ba, CRT_ADDRESS, idx); vgaw(ba, CRT_ADDRESS_W , val); } while (0)
|
||||
|
||||
#define WAttr(ba, idx, val) \
|
||||
do { \
|
||||
unsigned char tmp;\
|
||||
tmp = vgar(ba, ACT_ADDRESS_RESET);\
|
||||
vgaw(ba, ACT_ADDRESS_W, idx);\
|
||||
vgaw(ba, ACT_ADDRESS_W, val);\
|
||||
} while (0)
|
||||
|
||||
|
||||
#define SetTextPlane(ba, m) \
|
||||
do { \
|
||||
WGfx(ba, GCT_ID_READ_MAP_SELECT, m & 3 );\
|
||||
WSeq(ba, SEQ_ID_MAP_MASK, (1 << (m & 3)));\
|
||||
} while (0)
|
||||
|
||||
|
||||
/* Gfx engine busy wait */
|
||||
|
||||
static __inline void
|
||||
GfxBusyWait (ba)
|
||||
volatile caddr_t ba;
|
||||
{
|
||||
int test;
|
||||
|
||||
do {
|
||||
test = vgar32(ba, MR_SUBSYSTEM_STATUS_CNTL);
|
||||
asm volatile ("nop");
|
||||
} while (!(test & (1 << 13)));
|
||||
}
|
||||
|
||||
|
||||
static __inline void
|
||||
GfxFifoWait(ba)
|
||||
volatile caddr_t ba;
|
||||
{
|
||||
#if 0 /* XXX */
|
||||
int test;
|
||||
|
||||
do {
|
||||
test = vgar32(ba, MR_SUBSYSTEM_STATUS_CNTL);
|
||||
} while (test & 0x0f);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/* Special wakeup/passthrough registers on graphics boards
|
||||
*
|
||||
* The methods have diverged a bit for each board, so
|
||||
* WPass(P) has been converted into a set of specific
|
||||
* __inline functions.
|
||||
*/
|
||||
|
||||
static __inline unsigned char
|
||||
RAttr(ba, idx)
|
||||
volatile caddr_t ba;
|
||||
short idx;
|
||||
{
|
||||
|
||||
vgaw(ba, ACT_ADDRESS_W, idx);
|
||||
delay(0);
|
||||
return vgar(ba, ACT_ADDRESS_R);
|
||||
}
|
||||
|
||||
static __inline unsigned char
|
||||
RSeq(ba, idx)
|
||||
volatile caddr_t ba;
|
||||
short idx;
|
||||
{
|
||||
vgaw(ba, SEQ_ADDRESS, idx);
|
||||
return vgar(ba, SEQ_ADDRESS_R);
|
||||
}
|
||||
|
||||
static __inline unsigned char
|
||||
RCrt(ba, idx)
|
||||
volatile caddr_t ba;
|
||||
short idx;
|
||||
{
|
||||
vgaw(ba, CRT_ADDRESS, idx);
|
||||
return vgar(ba, CRT_ADDRESS_R);
|
||||
}
|
||||
|
||||
static __inline unsigned char
|
||||
RGfx(ba, idx)
|
||||
volatile caddr_t ba;
|
||||
short idx;
|
||||
{
|
||||
vgaw(ba, GCT_ADDRESS, idx);
|
||||
return vgar(ba, GCT_ADDRESS_R);
|
||||
}
|
||||
|
||||
#endif /* _GRF_CV3DREG_H */
|
||||
|
||||
|
|
@ -0,0 +1,339 @@
|
|||
/* $NetBSD: ite_cv3d.c,v 1.1 1997/10/19 18:55:22 veego Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1995 Michael Teske
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by Christian E. Hopps,
|
||||
* Ezra Story, Kari Mettinen, Markus Wild, Lutz Vieweg
|
||||
* and Michael Teske.
|
||||
* 4. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* This code is based on ite_cl.c and ite_rh.c by
|
||||
* Ezra Story, Kari Mettinen, Markus Wild, Lutz Vieweg.
|
||||
*/
|
||||
|
||||
#include "grfcv3d.h"
|
||||
#if NGRFCV3D > 0
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/conf.h>
|
||||
#include <sys/proc.h>
|
||||
#include <sys/device.h>
|
||||
#include <sys/ioctl.h>
|
||||
#include <sys/tty.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/queue.h>
|
||||
#include <sys/termios.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <dev/cons.h>
|
||||
#include <machine/cpu.h>
|
||||
#include <amiga/dev/itevar.h>
|
||||
#include <amiga/dev/iteioctl.h>
|
||||
#include <amiga/amiga/device.h>
|
||||
#include <amiga/dev/grfioctl.h>
|
||||
#include <amiga/dev/grfvar.h>
|
||||
#include <amiga/dev/grf_cv3dreg.h>
|
||||
|
||||
void cv3d_ite_init __P((struct ite_softc *));
|
||||
void cv3d_ite_deinit __P((struct ite_softc *));
|
||||
static void cv3d_cursor __P((struct ite_softc *, int));
|
||||
static void cv3d_putc __P((struct ite_softc *, int, int, int, int));
|
||||
static void cv3d_clear __P((struct ite_softc *, int, int, int, int));
|
||||
static void cv3d_scroll __P((struct ite_softc *, int, int, int, int));
|
||||
|
||||
/*
|
||||
* called from grf_cv3d to return console priority
|
||||
*/
|
||||
int
|
||||
grfcv3d_cnprobe()
|
||||
{
|
||||
static int done;
|
||||
int rv;
|
||||
|
||||
if (done == 0)
|
||||
#ifdef CV64CONSOLE
|
||||
rv = CN_INTERNAL;
|
||||
#else
|
||||
rv = CN_DEAD;
|
||||
#endif
|
||||
else
|
||||
#ifdef CV64CONSOLE
|
||||
rv = CN_NORMAL;
|
||||
#else
|
||||
rv = CN_DEAD;
|
||||
#endif
|
||||
done = 1;
|
||||
return(rv);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* called from grf_cv3d to init ite portion of
|
||||
* grf_softc struct
|
||||
*/
|
||||
void
|
||||
grfcv3d_iteinit(gp)
|
||||
struct grf_softc *gp;
|
||||
{
|
||||
gp->g_itecursor = cv3d_cursor;
|
||||
gp->g_iteputc = cv3d_putc;
|
||||
gp->g_iteclear = cv3d_clear;
|
||||
gp->g_itescroll = cv3d_scroll;
|
||||
gp->g_iteinit = cv3d_ite_init;
|
||||
gp->g_itedeinit = cv3d_ite_deinit;
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
cv3d_ite_deinit(ip)
|
||||
struct ite_softc *ip;
|
||||
{
|
||||
ip->flags &= ~ITE_INITED;
|
||||
}
|
||||
|
||||
|
||||
static unsigned short cv3d_rowc[MAXCOLS*(MAXROWS+1)];
|
||||
|
||||
/*
|
||||
* Console buffer to avoid the slow reading from gfx mem.
|
||||
*/
|
||||
|
||||
static unsigned short *console_buffer;
|
||||
|
||||
void
|
||||
cv3d_ite_init(ip)
|
||||
register struct ite_softc *ip;
|
||||
{
|
||||
struct grfcv3dtext_mode *md;
|
||||
int i;
|
||||
static char first = 1;
|
||||
volatile unsigned short *fb = (volatile unsigned short *)ip->grf->g_fbkva;
|
||||
unsigned short *buffer;
|
||||
|
||||
|
||||
ip->priv = ip->grf->g_data;
|
||||
md = (struct grfcv3dtext_mode *) ip->grf->g_data;
|
||||
|
||||
ip->cols = md->cols;
|
||||
ip->rows = md->rows;
|
||||
|
||||
/* alloc buffers */
|
||||
|
||||
#if 0 /* XXX malloc seems not to work in early init :( */
|
||||
if (cv3d_rowc)
|
||||
free(cv3d_rowc, M_DEVBUF);
|
||||
|
||||
/* alloc all in one */
|
||||
cv3d_rowc = malloc(sizeof(short) * (ip->rows + 1) * (ip->cols + 2),
|
||||
M_DEVBUF, M_WAITOK);
|
||||
if (!cv3d_rowc)
|
||||
panic("No buffers for ite_cv3d!");
|
||||
#endif
|
||||
|
||||
console_buffer = cv3d_rowc + ip->rows + 1;
|
||||
|
||||
|
||||
for (i = 0; i < ip->rows; i++)
|
||||
cv3d_rowc[i] = i * ip->cols;
|
||||
|
||||
if (first) {
|
||||
for (i = 0; i < ip->rows * ip->cols; i++)
|
||||
console_buffer[i] = 0x2007;
|
||||
first = 0;
|
||||
} else { /* restore console */
|
||||
buffer = console_buffer;
|
||||
for (i = 0; i < ip->rows * ip->cols; i++) {
|
||||
*fb++ = *buffer++;
|
||||
*fb++;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
cv3d_cursor(ip, flag)
|
||||
struct ite_softc *ip;
|
||||
int flag;
|
||||
{
|
||||
volatile caddr_t ba = ip->grf->g_regkva;
|
||||
|
||||
switch (flag) {
|
||||
case DRAW_CURSOR:
|
||||
/*WCrt(ba, CRT_ID_CURSOR_START, & ~0x20); */
|
||||
case MOVE_CURSOR:
|
||||
flag = ip->curx + ip->cury * ip->cols;
|
||||
WCrt(ba, CRT_ID_CURSOR_LOC_LOW, flag & 0xff);
|
||||
WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, flag >> 8);
|
||||
ip->cursorx = ip->curx;
|
||||
ip->cursory = ip->cury;
|
||||
break;
|
||||
case ERASE_CURSOR:
|
||||
/*WCrt(ba, CRT_ID_CURSOR_START, | 0x20); */
|
||||
case START_CURSOROPT:
|
||||
case END_CURSOROPT:
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
cv3d_putc(ip, c, dy, dx, mode)
|
||||
struct ite_softc *ip;
|
||||
int c;
|
||||
int dy;
|
||||
int dx;
|
||||
int mode;
|
||||
{
|
||||
caddr_t fb = ip->grf->g_fbkva;
|
||||
unsigned char attr;
|
||||
unsigned char *cp;
|
||||
|
||||
attr = (unsigned char) ((mode & ATTR_INV) ? (0x70) : (0x07));
|
||||
if (mode & ATTR_UL) attr = 0x01;
|
||||
if (mode & ATTR_BOLD) attr |= 0x08;
|
||||
if (mode & ATTR_BLINK) attr |= 0x80;
|
||||
|
||||
cp = fb + ((cv3d_rowc[dy] + dx) << 2); /* *4 */
|
||||
*cp++ = (unsigned char) c;
|
||||
*cp = (unsigned char) attr;
|
||||
|
||||
cp = (unsigned char *) &console_buffer[cv3d_rowc[dy]+dx];
|
||||
*cp++ = (unsigned char) c;
|
||||
*cp = (unsigned char) attr;
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
cv3d_clear(ip, sy, sx, h, w)
|
||||
struct ite_softc *ip;
|
||||
int sy;
|
||||
int sx;
|
||||
int h;
|
||||
int w;
|
||||
{
|
||||
/* cv3d_clear and cv3d_scroll both rely on ite passing arguments
|
||||
* which describe continuous regions. For a VT200 terminal,
|
||||
* this is safe behavior.
|
||||
*/
|
||||
unsigned short *dst;
|
||||
int len;
|
||||
|
||||
dst = (unsigned short *) (ip->grf->g_fbkva + (((sy * ip->cols) + sx) << 2));
|
||||
|
||||
for (len = w * h; len > 0 ; len--) {
|
||||
*dst = 0x2007;
|
||||
dst +=2;
|
||||
}
|
||||
|
||||
dst = &console_buffer[(sy * ip->cols) + sx];
|
||||
for (len = w * h; len > 0 ; len--) {
|
||||
*dst++ = 0x2007;
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
cv3d_scroll(ip, sy, sx, count, dir)
|
||||
struct ite_softc *ip;
|
||||
int sy;
|
||||
int sx;
|
||||
int count;
|
||||
int dir;
|
||||
{
|
||||
unsigned short *src, *dst, *dst2;
|
||||
int i;
|
||||
int len;
|
||||
|
||||
src = (unsigned short *)(ip->grf->g_fbkva + (cv3d_rowc[sy] << 2));
|
||||
|
||||
switch (dir) {
|
||||
case SCROLL_UP:
|
||||
dst = src - ((cv3d_rowc[count])<<1);
|
||||
|
||||
len = cv3d_rowc[(ip->bottom_margin + 1 - sy)];
|
||||
src = &console_buffer[cv3d_rowc[sy]];
|
||||
|
||||
if (count > sy) { /* boundary checks */
|
||||
dst2 = console_buffer;
|
||||
dst = (unsigned short *)(ip->grf->g_fbkva);
|
||||
len -= cv3d_rowc[(count - sy)];
|
||||
src += cv3d_rowc[(count - sy)];
|
||||
} else
|
||||
dst2 = &console_buffer[cv3d_rowc[(sy-count)]];
|
||||
|
||||
bcopy (src, dst2, len << 1);
|
||||
|
||||
for (i = 0; i < len; i++) {
|
||||
*dst++ = *dst2++;
|
||||
dst++;
|
||||
}
|
||||
break;
|
||||
case SCROLL_DOWN:
|
||||
dst = src + ((cv3d_rowc[count]) << 1);
|
||||
|
||||
len = cv3d_rowc[(ip->bottom_margin + 1 - (sy + count))];
|
||||
src = &console_buffer[cv3d_rowc[sy]];
|
||||
dst2 = &console_buffer[cv3d_rowc[(sy + count)]];
|
||||
|
||||
if (len < 0)
|
||||
return; /* do some boundary check */
|
||||
|
||||
bcopy (src, dst2, len << 1);
|
||||
|
||||
for (i = 0; i < len; i++) {
|
||||
*dst++ = *dst2++;
|
||||
dst++;
|
||||
}
|
||||
break;
|
||||
case SCROLL_RIGHT:
|
||||
dst = src + ((sx+count)<<1);
|
||||
src = &console_buffer[cv3d_rowc[sy] + sx];
|
||||
len = ip->cols - (sx + count);
|
||||
dst2 = &console_buffer[cv3d_rowc[sy] + sx + count];
|
||||
bcopy (src, dst2, len << 1);
|
||||
|
||||
for (i = 0; i < len; i++) {
|
||||
*dst++ = *dst2++;
|
||||
dst++;
|
||||
}
|
||||
break;
|
||||
case SCROLL_LEFT:
|
||||
dst = src + ((sx - count)<<1);
|
||||
src = &console_buffer[cv3d_rowc[sy] + sx];
|
||||
len = ip->cols - sx;
|
||||
dst2 = &console_buffer[cv3d_rowc[sy] + sx - count];
|
||||
bcopy (src, dst2, len << 1);
|
||||
|
||||
for (i = 0; i < len; i++) {
|
||||
*dst++ = *dst2++;
|
||||
dst++;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* NGRFCV3D */
|
||||
Loading…
Reference in New Issue