Add some comments about P/USEG
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.h,v 1.10 2000/08/25 01:04:10 thorpej Exp $ */
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/* $NetBSD: cpu.h,v 1.11 2001/02/02 18:25:04 thorpej Exp $ */
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/*-
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* Copyright (c) 1990 The Regents of the University of California.
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@ -133,15 +133,15 @@ void delay __P((int));
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/*
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* Logical address space of SH3 CPU.
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*/
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#define SH3_P0SEG_BASE 0x00000000
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#define SH3_P0SEG_BASE 0x00000000 /* TLB mapped, also U0SEG */
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#define SH3_P0SEG_END 0x7fffffff
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#define SH3_P1SEG_BASE 0x80000000 /* pa == va */
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#define SH3_P1SEG_END 0x9fffffff
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#define SH3_P2SEG_BASE 0xa0000000 /* pa == va, non-cacheable */
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#define SH3_P2SEG_END 0xbfffffff
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#define SH3_P3SEG_BASE 0xc0000000
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#define SH3_P3SEG_BASE 0xc0000000 /* TLB mapped, supervisor mode */
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#define SH3_P3SEG_END 0xdfffffff
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#define SH3_P4SEG_BASE 0xe0000000
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#define SH3_P4SEG_BASE 0xe0000000 /* peripheral space */
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#define SH3_P4SEG_END 0xffffffff
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#define SH3_PHYS_MASK 0x1fffffff
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