add plmmc(4) glue
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c856dd1c49
@ -1,4 +1,4 @@
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/* $NetBSD: ifpgareg.h,v 1.6 2015/01/26 08:55:41 skrll Exp $ */
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/* $NetBSD: ifpgareg.h,v 1.7 2015/01/27 16:34:34 jmcneill Exp $ */
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/*
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* Copyright (c) 2001 ARM Ltd
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@ -34,6 +34,9 @@
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#define IFPGA_UART_CLK 14745600 /* Uart REFCLK freq */
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#define IFPGA_UART_SIZE 0x24
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#define IFPGA_MMC_CLK 14745600 /* MMC_5 freq */
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#define IFPGA_MMC_SIZE 0x1000
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/*
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* IFPGA registers
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*/
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93
sys/arch/evbarm/ifpga/plmmc_ifpga.c
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93
sys/arch/evbarm/ifpga/plmmc_ifpga.c
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@ -0,0 +1,93 @@
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/* $NetBSD: plmmc_ifpga.c,v 1.1 2015/01/27 16:34:34 jmcneill Exp $ */
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/*-
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* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: plmmc_ifpga.c,v 1.1 2015/01/27 16:34:34 jmcneill Exp $");
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#include <sys/types.h>
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#include <sys/device.h>
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#include <sys/systm.h>
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#include <sys/param.h>
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#include <sys/malloc.h>
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#include <sys/termios.h>
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#include <machine/intr.h>
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#include <sys/bus.h>
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#include <dev/ic/pl181reg.h>
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#include <dev/ic/pl181var.h>
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#include <evbarm/ifpga/ifpgareg.h>
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#include <evbarm/ifpga/ifpgavar.h>
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static int plmmc_ifpga_match(device_t, cfdata_t, void *);
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static void plmmc_ifpga_attach(device_t, device_t, void *);
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static void plmmc_ifpga_attach_i(device_t);
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CFATTACH_DECL_NEW(plmmc_ifpga, sizeof(struct plmmc_softc),
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plmmc_ifpga_match, plmmc_ifpga_attach, NULL, NULL);
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static int
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plmmc_ifpga_match(device_t parent, cfdata_t cf, void *aux)
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{
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return 1;
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}
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static void
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plmmc_ifpga_attach(device_t parent, device_t self, void *aux)
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{
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struct plmmc_softc *sc = device_private(self);
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struct ifpga_attach_args *ifa = aux;
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sc->sc_dev = self;
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sc->sc_clock_freq = IFPGA_MMC_CLK;
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sc->sc_bst = ifa->ifa_iot;
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if (bus_space_map(ifa->ifa_iot, ifa->ifa_addr, IFPGA_MMC_SIZE, 0,
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&sc->sc_bsh)) {
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printf("%s: unable to map device\n", device_xname(sc->sc_dev));
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return;
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}
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aprint_naive("\n");
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aprint_normal("\n");
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#if 0
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sc->sc_ih = ifpga_intr_establish(ifa->ifa_irq, IPL_BIO, plmmc_intr, sc);
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#endif
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config_interrupts(self, plmmc_ifpga_attach_i);
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}
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static void
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plmmc_ifpga_attach_i(device_t self)
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{
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struct plmmc_softc *sc = device_private(self);
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plmmc_init(sc);
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}
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