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Remove the number of TLB entries for different rx39 CPUs - this info 

is in the table in mips_machdep.c now.
This commit is contained in:
simonb 2002-03-05 16:02:48 +00:00
parent c6bcfb2589
commit c5d34b4371
1 changed files with 1 additions and 14 deletions
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15
sys/arch/mips/include/r3900regs.h
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@ -1,4 +1,4 @@
/* $NetBSD: r3900regs.h,v 1.5 2001/12/02 10:37:25 uch Exp $ */ /* $NetBSD: r3900regs.h,v 1.6 2002/03/05 16:02:48 simonb Exp $ */
/*- /*-
* Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
@ -88,19 +88,6 @@
* 3922 ... TLB entry is 96bits wide * 3922 ... TLB entry is 96bits wide
*/ */
/*
* Index register
* 3912 ... index field[8:12] (32 entry)
*/
#define R3900_TLB_NUM_TLB_ENTRIES 32
#define R3920_TLB_NUM_TLB_ENTRIES 64
#undef MIPS1_TLB_NUM_TLB_ENTRIES
#ifdef TX391X
#define MIPS1_TLB_NUM_TLB_ENTRIES R3900_TLB_NUM_TLB_ENTRIES
#elif defined TX392X
#define MIPS1_TLB_NUM_TLB_ENTRIES R3920_TLB_NUM_TLB_ENTRIES
#endif
/* /*
* Config register (R3900 specific) * Config register (R3900 specific)
*/ */