Use fixed pci_intr_handle_t per device number regardless of pin and swiz.
Tested the following multifunction card and devices over ppb(4) on Express5800/230 (JC94): --- uhci0 at pci0 dev 4 function 0: VIA Technologies VT83C572 USB Controller (rev. 0x61) uhci0: interrupting at int C usb0 at uhci0: USB revision 1.0 uhci1 at pci0 dev 4 function 1: VIA Technologies VT83C572 USB Controller (rev. 0x61) uhci1: interrupting at int C usb1 at uhci1: USB revision 1.0 ehci0 at pci0 dev 4 function 2: VIA Technologies VT8237 EHCI USB Controller (rev. 0x63) ehci0: interrupting at int C ehci0: dropped intr workaround enabled ehci0: EHCI version 1.0 ehci0: companion controllers, 2 ports each: uhci0 uhci1 usb2 at ehci0: USB revision 2.0 fwohci0 at pci0 dev 4 function 3: VIA Technologies VT6306 IEEE 1394 Host Controller (rev. 0x46) fwohci0: interrupting at int C fwohci0: OHCI version 1.0 (ROM=1) fwohci0: No. of Isochronous channels is 4. fwohci0: EUI64 00:01:08:00:37:02:79:4f fwohci0: Phy 1394a available S400, 3 ports. fwohci0: Link S400, max_rec 1024 bytes. fwohci0: max_rec 1024 -> 2048 ieee1394if0 at fwohci0: IEEE1394 bus fwip0 at ieee1394if0: IP over IEEE1394 fwohci0: Initiate bus reset vge0 at pci0 dev 4 function 4: VIA VT612X Gigabit Ethernet (rev. 0x11) vge0: interrupting at int C vge0: Ethernet address: 00:01:08:00:b1:71 ciphy0 at vge0 phy 1: Cicada CS8201 10/100/1000TX PHY, rev. 2 ciphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-FDX, auto : --- ppb0 at pci0 dev 4 function 0: Digital Equipment DC21154 PCI-PCI Bridge (rev. 0x05) pci1 at ppb0 bus 1 pci1: i/o space, memory space enabled ex0 at pci1 dev 4 function 0: 3Com 3c980C-TXM 10/100 Ethernet (rev. 0x78) ex0: interrupting at int C ex0: MAC address 00:01:03:ce:74:48 bmtphy0 at ex0 phy 24: Broadcom 3c905C internal PHY, rev. 7 bmtphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto ex1 at pci1 dev 5 function 0: 3Com 3c980C-TXM 10/100 Ethernet (rev. 0x78) ex1: interrupting at int C ex1: MAC address 00:01:03:ce:74:49 bmtphy1 at ex1 phy 24: Broadcom 3c905C internal PHY, rev. 7 bmtphy1: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto :
This commit is contained in:
parent
0df969c624
commit
c5bd6bbaa2
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@ -1,4 +1,4 @@
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/* $NetBSD: necpb.c,v 1.32 2008/07/05 08:46:25 tsutsui Exp $ */
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/* $NetBSD: necpb.c,v 1.33 2010/11/02 16:03:47 tsutsui Exp $ */
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/*-
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* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
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@ -61,7 +61,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: necpb.c,v 1.32 2008/07/05 08:46:25 tsutsui Exp $");
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__KERNEL_RCSID(0, "$NetBSD: necpb.c,v 1.33 2010/11/02 16:03:47 tsutsui Exp $");
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#include "opt_pci.h"
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@ -339,7 +339,6 @@ necpb_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
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pci_chipset_tag_t pc = pa->pa_pc;
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pcitag_t intrtag = pa->pa_intrtag;
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int pin = pa->pa_intrpin;
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int swiz = pa->pa_intrswiz % 4;
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int bus, dev;
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if (pin == 0) {
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@ -363,13 +362,13 @@ necpb_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
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switch (dev) {
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case 3:
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*ihp = (pin - swiz + 2) % 4;
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*ihp = 3;
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break;
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case 4:
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*ihp = (pin - swiz + 1) % 4;
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*ihp = 2;
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break;
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case 5:
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*ihp = (pin - swiz + 0) % 4;
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*ihp = 1;
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break;
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default:
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*ihp = -1;
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