Initial commit of the Connect32 SCSI driver. This driver uses the esc
generic driver. Currently this is only a polling driver.
This commit is contained in:
mark
parent
b4c38ce254
commit
c544086b51
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@ -0,0 +1,452 @@
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/* $NetBSD: cosc.c,v 1.1 1996/10/15 00:08:43 mark Exp $ */
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/*
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* Copyright (c) 1996 Mark Brinicombe
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Mark Brinicombe
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* from: asc.c,v 1.8 1996/06/12 20:46:58 mark Exp
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*/
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/*
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* Driver for the MCS Connect 32 SCSI 2 card with AM53C94 SCSI controller.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <scsi/scsi_all.h>
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#include <scsi/scsiconf.h>
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#include <machine/bootconfig.h>
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#include <machine/io.h>
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#include <machine/irqhandler.h>
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#include <machine/katelib.h>
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#include <arm32/podulebus/podulebus.h>
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#include <arm32/podulebus/escreg.h>
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#include <arm32/podulebus/escvar.h>
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#include <arm32/podulebus/coscreg.h>
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#include <arm32/podulebus/coscvar.h>
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#include <arm32/podulebus/podules.h>
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void coscattach __P((struct device *, struct device *, void *));
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int coscmatch __P((struct device *, void *, void *));
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int cosc_scsicmd __P((struct scsi_xfer *));
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struct scsi_adapter cosc_scsiswitch = {
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cosc_scsicmd, /* Eventually call esc_scsicmd directly */
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esc_minphys,
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0, /* no lun support */
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0, /* no lun support */
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};
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struct scsi_device cosc_scsidev = {
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NULL, /* use default error handler */
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NULL, /* do not have a start function */
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NULL, /* have no async handler */
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NULL, /* Use default done routine */
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};
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struct cfattach cosc_ca = {
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sizeof(struct cosc_softc), coscmatch, coscattach
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};
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struct cfdriver cosc_cd = {
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NULL, "cosc", DV_DULL, NULL, 0
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};
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int cosc_intr __P((struct esc_softc *dev));
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int cosc_setup_dma __P((struct esc_softc *sc, void *ptr, int len,
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int mode));
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int cosc_build_dma_chain __P((struct esc_softc *sc,
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struct esc_dma_chain *chain, void *p, int l));
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int cosc_need_bump __P((struct esc_softc *sc, void *ptr, int len));
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void cosc_led __P((struct esc_softc *sc, int mode));
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#if COSC_POLL > 0
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int cosc_poll = 1;
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#endif
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int
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coscmatch(pdp, match, auxp)
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struct device *pdp;
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void *match, *auxp;
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{
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struct podule_attach_args *pa = (struct podule_attach_args *)auxp;
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/* Look for the card */
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if (matchpodule(pa, MANUFACTURER_MCS, PODULE_MCS_SCSI, -1) != 0)
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return(1);
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/* Old versions of the ROM on this card could have the wrong ID */
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if (matchpodule(pa, MANUFACTURER_ACORN, PODULE_ACORN_SCSI, -1) == 0)
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return(0);
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if (strncmp(pa->pa_podule->description, "MCS", 3) != 0)
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return(0);
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return(1);
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}
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static int dummy[6];
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void
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coscattach(pdp, dp, auxp)
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struct device *pdp, *dp;
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void *auxp;
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{
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struct cosc_softc *sc = (struct cosc_softc *)dp;
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struct podule_attach_args *pa;
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cosc_regmap_p rp = &sc->sc_regmap;
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vu_char *esc;
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pa = (struct podule_attach_args *)auxp;
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if (pa->pa_podule_number == -1)
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panic("Podule has disappeared !");
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sc->sc_podule_number = pa->pa_podule_number;
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sc->sc_podule = pa->pa_podule;
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podules[sc->sc_podule_number].attached = 1;
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if (pa->pa_podule->manufacturer == MANUFACTURER_ACORN
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&& pa->pa_podule->product == PODULE_ACORN_SCSI)
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printf(" Faulty expansion card identity\n");
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sc->sc_iobase = (vu_char *)sc->sc_podule->fast_base;
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/* Select page zero (so we can see the config info) */
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sc->sc_iobase[COSC_PAGE_REGISTER] = 0;
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rp->chipreset = (vu_char *)&dummy[0];
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rp->inten = (vu_char *)&dummy[1];
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rp->status = (vu_char *)&dummy[2];
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rp->term = &sc->sc_iobase[COSC_TERMINATION_CONTROL];
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rp->led = (vu_char *)&dummy[4];
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esc = &sc->sc_iobase[COSC_ESCOFFSET_BASE];
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rp->esc.esc_tc_low = &esc[COSC_ESCOFFSET_TCL];
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rp->esc.esc_tc_mid = &esc[COSC_ESCOFFSET_TCM];
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rp->esc.esc_fifo = &esc[COSC_ESCOFFSET_FIFO];
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rp->esc.esc_command = &esc[COSC_ESCOFFSET_COMMAND];
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rp->esc.esc_dest_id = &esc[COSC_ESCOFFSET_DESTID];
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rp->esc.esc_timeout = &esc[COSC_ESCOFFSET_TIMEOUT];
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rp->esc.esc_syncper = &esc[COSC_ESCOFFSET_PERIOD];
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rp->esc.esc_syncoff = &esc[COSC_ESCOFFSET_OFFSET];
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rp->esc.esc_config1 = &esc[COSC_ESCOFFSET_CONFIG1];
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rp->esc.esc_clkconv = &esc[COSC_ESCOFFSET_CLOCKCONV];
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rp->esc.esc_test = &esc[COSC_ESCOFFSET_TEST];
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rp->esc.esc_config2 = &esc[COSC_ESCOFFSET_CONFIG2];
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rp->esc.esc_config3 = &esc[COSC_ESCOFFSET_CONFIG3];
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rp->esc.esc_config4 = &esc[COSC_ESCOFFSET_CONFIG4];
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rp->esc.esc_tc_high = &esc[COSC_ESCOFFSET_TCH];
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rp->esc.esc_fifo_bot = &esc[COSC_ESCOFFSET_FIFOBOTTOM];
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*rp->esc.esc_command = ESC_CMD_RESET_CHIP;
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delay(1000);
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*rp->esc.esc_command = ESC_CMD_NOP;
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/* See if we recognise the controller */
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switch (*rp->esc.esc_tc_high) {
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case 0x12:
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printf(" AM53CF94");
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break;
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default:
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printf(" Unknown controller (%02x)", *rp->esc.esc_tc_high);
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break;
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}
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/* Set termination power */
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if (sc->sc_iobase[COSC_CONFIG_TERMINATION] & COSC_CONFIG_TERMINATION_ON) {
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printf(" termpwr on");
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sc->sc_iobase[COSC_TERMINATION_CONTROL] = COSC_TERMINATION_ON;
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} else {
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printf(" termpwr off");
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sc->sc_iobase[COSC_TERMINATION_CONTROL] = COSC_TERMINATION_OFF;
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}
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/* Don't know what this is for */
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{
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int byte;
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int loop;
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byte = sc->sc_iobase[COSC_REGISTER_01];
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byte = 0;
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for (loop = 0; loop < 8; ++loop) {
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if (sc->sc_iobase[COSC_REGISTER_00] & 0x01)
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byte |= (1 << loop);
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}
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printf(" byte=%02x", byte);
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}
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/*
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* Control register 4 is an AMD special (not on FAS216)
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*
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* The powerdown and glitch eater facilities could be useful
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* Use the podule configuration for this register
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*/
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sc->sc_softc.sc_config4 = sc->sc_iobase[COSC_CONFIG_CONTROL_REG4];
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sc->sc_softc.sc_esc = (esc_regmap_p)rp;
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/* sc->sc_softc.sc_spec = &sc->sc_specific;*/
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sc->sc_softc.sc_led = cosc_led;
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sc->sc_softc.sc_setup_dma = cosc_setup_dma;
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sc->sc_softc.sc_build_dma_chain = cosc_build_dma_chain;
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sc->sc_softc.sc_need_bump = cosc_need_bump;
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sc->sc_softc.sc_clock_freq = 40; /* Connect32 runs at 40MHz */
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sc->sc_softc.sc_timeout = 250; /* Set default timeout to 250ms */
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sc->sc_softc.sc_config_flags = ESC_NO_DMA;
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sc->sc_softc.sc_host_id = sc->sc_iobase[COSC_CONFIG_CONTROL_REG1] & ESC_DEST_ID_MASK;
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printf(" hostid=%d", sc->sc_softc.sc_host_id);
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#if COSC_POLL > 0
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if (boot_args) {
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char *ptr;
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ptr = strstr(boot_args, "nocoscpoll");
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if (ptr)
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cosc_poll = 0;
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}
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if (cosc_poll)
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printf(" polling");
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#endif
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sc->sc_softc.sc_bump_sz = NBPG;
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sc->sc_softc.sc_bump_pa = 0x0;
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escinitialize((struct esc_softc *)sc);
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sc->sc_softc.sc_link.channel = SCSI_CHANNEL_ONLY_ONE;
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sc->sc_softc.sc_link.adapter_softc = sc;
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sc->sc_softc.sc_link.adapter_target = sc->sc_softc.sc_host_id;
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sc->sc_softc.sc_link.adapter = &cosc_scsiswitch;
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sc->sc_softc.sc_link.device = &cosc_scsidev;
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sc->sc_softc.sc_link.openings = 1;
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/* initialise the card */
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#if 0
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*rp->inten = (COSC_POLL?0:1);
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*rp->led = 0;
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#endif
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sc->sc_softc.sc_ih.ih_func = cosc_intr;
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sc->sc_softc.sc_ih.ih_arg = &sc->sc_softc;
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sc->sc_softc.sc_ih.ih_level = IPL_BIO;
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sc->sc_softc.sc_ih.ih_name = "scsi: cosc";
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sc->sc_softc.sc_ih.ih_maskaddr = sc->sc_podule->irq_addr;
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sc->sc_softc.sc_ih.ih_maskbits = sc->sc_podule->irq_mask;
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#if COSC_POLL > 0
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if (!cosc_poll)
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#endif
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if (irq_claim(IRQ_PODULE, &sc->sc_softc.sc_ih))
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panic("%s: Cannot install IRQ handler\n", dp->dv_xname);
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printf("\n");
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/* attach all scsi units on us */
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config_found(dp, &sc->sc_softc.sc_link, scsiprint);
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}
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/* Turn on/off led */
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void
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cosc_led(sc, mode)
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struct esc_softc *sc;
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int mode;
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{
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cosc_regmap_p rp;
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rp = (cosc_regmap_p)sc->sc_esc;
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if (mode) {
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sc->sc_led_status++;
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} else {
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if (sc->sc_led_status)
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sc->sc_led_status--;
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}
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/* *rp->led = (sc->sc_led_status?1:0);*/
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}
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int
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cosc_intr(dev)
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struct esc_softc *dev;
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{
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cosc_regmap_p rp;
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int quickints;
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rp = (cosc_regmap_p)dev->sc_esc;
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printf("cosc_intr:%08x %02x\n", (u_int)rp->esc.esc_status, *rp->esc.esc_status);
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if (*rp->esc.esc_status & ESC_STAT_INTERRUPT_PENDING) {
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quickints = 16;
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do {
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dev->sc_status = *rp->esc.esc_status;
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dev->sc_interrupt = *rp->esc.esc_interrupt;
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if (dev->sc_interrupt & ESC_INT_RESELECTED) {
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dev->sc_resel[0] = *rp->esc.esc_fifo;
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dev->sc_resel[1] = *rp->esc.esc_fifo;
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}
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escintr(dev);
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} while((*rp->esc.esc_status & ESC_STAT_INTERRUPT_PENDING)
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&& --quickints);
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}
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return(0); /* Pass interrupt on down the chain */
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}
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/* Load transfer address into dma register */
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void
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cosc_set_dma_adr(sc, ptr)
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struct esc_softc *sc;
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void *ptr;
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{
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printf("cosc_set_dma_adr(sc = 0x%08x, ptr = 0x%08x)\n", (u_int)sc, (u_int)ptr);
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return;
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}
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/* Set DMA transfer counter */
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void
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cosc_set_dma_tc(sc, len)
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struct esc_softc *sc;
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unsigned int len;
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{
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printf("cosc_set_dma_tc(sc, len = 0x%08x)", len);
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/* Set the transfer size on the SCSI controller */
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*sc->sc_esc->esc_tc_low = len; len >>= 8;
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*sc->sc_esc->esc_tc_mid = len; len >>= 8;
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*sc->sc_esc->esc_tc_high = len;
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}
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/* Set DMA mode */
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void
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cosc_set_dma_mode(sc, mode)
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struct esc_softc *sc;
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int mode;
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{
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printf("cosc_set_dma_mode(sc, mode = %d)", mode);
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}
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/* Initialize DMA for transfer */
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int
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cosc_setup_dma(sc, ptr, len, mode)
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struct esc_softc *sc;
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void *ptr;
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int len;
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int mode;
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{
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/* printf("cosc_setup_dma(sc, ptr = 0x%08x, len = 0x%08x, mode = 0x%08x)\n", (u_int)ptr, len, mode);*/
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return(0);
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}
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/* Check if address and len is ok for DMA transfer */
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int
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cosc_need_bump(sc, ptr, len)
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struct esc_softc *sc;
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void *ptr;
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int len;
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{
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int p;
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p = (int)ptr & 0x03;
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if (p) {
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p = 4-p;
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if (len < 256)
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p = len;
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}
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return(p);
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}
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/* Interrupt driven routines */
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int
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cosc_build_dma_chain(sc, chain, p, l)
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struct esc_softc *sc;
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struct esc_dma_chain *chain;
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void *p;
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int l;
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{
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printf("cosc_build_dma_chain()\n");
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return(0);
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}
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int
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cosc_scsicmd(xs)
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struct scsi_xfer *xs;
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{
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/* struct scsi_link *sc_link = xs->sc_link;*/
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#if COSC_POLL > 0
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if (cosc_poll)
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xs->flags |= SCSI_POLL;
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#endif
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#if 0
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if (sc_link->lun == 0)
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printf("id=%d lun=%d cmdlen=%d datalen=%d opcode=%02x flags=%08x status=%02x blk=%02x %02x\n",
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sc_link->target, sc_link->lun, xs->cmdlen, xs->datalen, xs->cmd->opcode,
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xs->flags, xs->status, xs->cmd->bytes[0], xs->cmd->bytes[1]);
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#endif
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return(esc_scsicmd(xs));
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}
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@ -0,0 +1,105 @@
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/* $NetBSD: coscreg.h,v 1.1 1996/10/15 00:08:44 mark Exp $ */
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/*
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* Copyright (c) 1996 Mark Brinicombe
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* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by Mark Brinicombe
|
||||
* 4. Neither the name of the University nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _COSCREG_H_
|
||||
#define _COSCREG_H_
|
||||
|
||||
#include <arm32/podulebus/escvar.h>
|
||||
|
||||
typedef volatile unsigned short vu_short;
|
||||
|
||||
typedef struct cosc_regmap {
|
||||
esc_regmap_t esc;
|
||||
vu_char *chipreset;
|
||||
vu_char *inten;
|
||||
vu_char *status;
|
||||
vu_char *term;
|
||||
vu_char *led;
|
||||
} cosc_regmap_t;
|
||||
typedef cosc_regmap_t *cosc_regmap_p;
|
||||
|
||||
/*
|
||||
#define COSC_CONTROL_CHIPRESET
|
||||
#define COSC_CONTROL_INTEN
|
||||
#define COSC_STATUS
|
||||
#define COSC_CONTROL_LED
|
||||
*/
|
||||
|
||||
#define COSC_CONFIG_CONTROL_REG1 0x0ff0
|
||||
#define COSC_CONFIG_CONTROL_REG1_MASK 0x97
|
||||
#define COSC_CONFIG_CONTROL_REG2 0x0ff4
|
||||
#define COSC_CONFIG_CONTROL_REG2_MASK 0x07
|
||||
#define COSC_CONFIG_CONTROL_REG3 0x0ff8
|
||||
#define COSC_CONFIG_CONTROL_REG3_MASK 0x83
|
||||
#define COSC_CONFIG_CONTROL_REG4 0x0ffc
|
||||
#define COSC_CONFIG_CONTROL_REG4_MASK 0xec
|
||||
#define COSC_CONFIG_TERMINATION 0x1000
|
||||
#define COSC_CONFIG_TERMINATION_ON 0x01
|
||||
#define COSC_CONFIG_FIRST_SCANNED 0x1040 /* Used by RiscOS */
|
||||
#define COSC_CONFIG_INC_FURTHER_PARTS 0x1048 /* Used by RiscOS */
|
||||
#define COSC_CONFIG_SYNCH_MODE 0x1050
|
||||
#define COSC_CONFIG_SYNCH_MODE_ON 0x01
|
||||
#define COSC_CONFIG_SHUTDOWN 0x1054 /* Used by RiscOS */
|
||||
#define COSC_CONFIG_SHUTDOWN_SPINDOWN 0x01 /* Used by RiscOS */
|
||||
#define COSC_CONFIG_SHUTDOWN_EJECT 0x02 /* Used by RiscOS */
|
||||
#define COSC_CONFIG_DELAY_REMOVABLE 0x105c /* Used by RiscOS */
|
||||
#define COSC_CONFIG_DELAY_HARDDISC 0x1060 /* Used by RiscOS */
|
||||
#define COSC_CONFIG_DELAY_BOOT 0x1064 /* Used by RiscOS */
|
||||
#define COSC_CONFIG_CDROM 0x1068 /* Used by RiscOS */
|
||||
|
||||
#define COSC_TERMINATION_CONTROL 0x2600
|
||||
#define COSC_TERMINATION_ON 0x00
|
||||
#define COSC_TERMINATION_OFF 0x01
|
||||
#define COSC_REGISTER_00 0x2800
|
||||
#define COSC_REGISTER_01 0x2a00
|
||||
#define COSC_PAGE_REGISTER 0x3000
|
||||
|
||||
#define COSC_ESCOFFSET_BASE 0x3c00
|
||||
#define COSC_ESCOFFSET_TCL 0x0000
|
||||
#define COSC_ESCOFFSET_TCM 0x0004
|
||||
#define COSC_ESCOFFSET_FIFO 0x0008
|
||||
#define COSC_ESCOFFSET_COMMAND 0x000c
|
||||
#define COSC_ESCOFFSET_DESTID 0x0010
|
||||
#define COSC_ESCOFFSET_TIMEOUT 0x0014
|
||||
#define COSC_ESCOFFSET_PERIOD 0x0018
|
||||
#define COSC_ESCOFFSET_OFFSET 0x001c
|
||||
#define COSC_ESCOFFSET_CONFIG1 0x0020
|
||||
#define COSC_ESCOFFSET_CLOCKCONV 0x0024
|
||||
#define COSC_ESCOFFSET_TEST 0x0028
|
||||
#define COSC_ESCOFFSET_CONFIG2 0x002c
|
||||
#define COSC_ESCOFFSET_CONFIG3 0x0030
|
||||
#define COSC_ESCOFFSET_CONFIG4 0x0034
|
||||
#define COSC_ESCOFFSET_TCH 0x0038
|
||||
#define COSC_ESCOFFSET_FIFOBOTTOM 0x003c
|
||||
|
||||
#endif /* _COSCREG_H_ */
|
||||
|
|
@ -0,0 +1,50 @@
|
|||
/* $NetBSD: coscvar.h,v 1.1 1996/10/15 00:08:44 mark Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1996 Mark Brinicombe
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by Mark Brinicombe
|
||||
* for the NetBSD Project.
|
||||
* 4. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _COSCVAR_H_
|
||||
#define _COSCVAR_H_
|
||||
|
||||
#include <arm32/podulebus/escvar.h>
|
||||
#include <arm32/podulebus/coscreg.h>
|
||||
|
||||
#define COSC_POLL 1
|
||||
|
||||
struct cosc_softc {
|
||||
struct esc_softc sc_softc;
|
||||
cosc_regmap_t sc_regmap;
|
||||
vu_char *sc_iobase;
|
||||
podule_t *sc_podule;
|
||||
int sc_podule_number;
|
||||
irqhandler_t sc_ih;
|
||||
};
|
||||
|
||||
#endif /* _COCVAR_H_ */
|
||||
Loading…
Reference in New Issue