Split off the Transmeta Crusoe Longrun code into its own file, that
way identcpu.c and machdep.c are not cluttered with foreign code. The driver is built by default as before, but the sysctl subtree will only be created if longrun is detected and not always as the old code did. This matches what the FreeBSD code does. Ok by christos@.
This commit is contained in:
xtraeme
parent
22e6b6b586
commit
c524510b66
@ -1,4 +1,4 @@
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# $NetBSD: files.i386,v 1.333 2008/02/20 21:43:34 drochner Exp $
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# $NetBSD: files.i386,v 1.334 2008/02/26 18:24:28 xtraeme Exp $
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#
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# new style config file for i386 architecture
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#
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@ -82,6 +82,7 @@ file arch/i386/i386/kgdb_machdep.c kgdb
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file arch/i386/i386/kobj_machdep.c modular
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file arch/i386/i386/machdep.c
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file arch/i386/i386/identcpu.c
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file arch/i386/i386/longrun.c
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file arch/i386/i386/mem.c
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file arch/i386/i386/mtrr_k6.c mtrr
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file arch/i386/i386/process_machdep.c
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@ -1,4 +1,4 @@
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/* $NetBSD: identcpu.c,v 1.87 2008/01/15 16:11:29 ad Exp $ */
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/* $NetBSD: identcpu.c,v 1.88 2008/02/26 18:24:28 xtraeme Exp $ */
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/*-
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* Copyright (c) 1999, 2000, 2001, 2006, 2007 The NetBSD Foundation, Inc.
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@ -37,7 +37,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.87 2008/01/15 16:11:29 ad Exp $");
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__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.88 2008/02/26 18:24:28 xtraeme Exp $");
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#include "opt_enhanced_speedstep.h"
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#include "opt_intel_odcm.h"
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@ -1097,132 +1097,11 @@ amd_family5_setup(struct cpu_info *ci)
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}
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}
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/*
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* Transmeta Crusoe LongRun Support by Tamotsu Hattori.
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* Port from FreeBSD-current(August, 2001) to NetBSD by tshiozak.
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*/
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#define MSR_TMx86_LONGRUN 0x80868010
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#define MSR_TMx86_LONGRUN_FLAGS 0x80868011
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#define LONGRUN_MODE_MASK(x) ((x) & 0x0000007f)
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#define LONGRUN_MODE_RESERVED(x) ((x) & 0xffffff80)
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#define LONGRUN_MODE_WRITE(x, y) (LONGRUN_MODE_RESERVED(x) | \
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LONGRUN_MODE_MASK(y))
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#define LONGRUN_MODE_MINFREQUENCY 0x00
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#define LONGRUN_MODE_ECONOMY 0x01
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#define LONGRUN_MODE_PERFORMANCE 0x02
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#define LONGRUN_MODE_MAXFREQUENCY 0x03
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#define LONGRUN_MODE_UNKNOWN 0x04
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#define LONGRUN_MODE_MAX 0x04
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union msrinfo {
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uint64_t msr;
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uint32_t regs[2];
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};
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uint32_t longrun_modes[LONGRUN_MODE_MAX][3] = {
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/* MSR low, MSR high, flags bit0 */
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{ 0, 0, 0}, /* LONGRUN_MODE_MINFREQUENCY */
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{ 0, 100, 0}, /* LONGRUN_MODE_ECONOMY */
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{ 0, 100, 1}, /* LONGRUN_MODE_PERFORMANCE */
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{ 100, 100, 1}, /* LONGRUN_MODE_MAXFREQUENCY */
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};
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u_int
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tmx86_get_longrun_mode(void)
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{
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u_long eflags;
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union msrinfo msrinfo;
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u_int low, high, flags, mode;
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eflags = x86_read_psl();
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x86_disable_intr();
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msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN);
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low = LONGRUN_MODE_MASK(msrinfo.regs[0]);
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high = LONGRUN_MODE_MASK(msrinfo.regs[1]);
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flags = rdmsr(MSR_TMx86_LONGRUN_FLAGS) & 0x01;
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for (mode = 0; mode < LONGRUN_MODE_MAX; mode++) {
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if (low == longrun_modes[mode][0] &&
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high == longrun_modes[mode][1] &&
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flags == longrun_modes[mode][2]) {
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goto out;
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}
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}
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mode = LONGRUN_MODE_UNKNOWN;
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out:
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x86_write_psl(eflags);
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return (mode);
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}
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static u_int
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tmx86_get_longrun_status(u_int *frequency, u_int *voltage, u_int *percentage)
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{
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u_long eflags;
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u_int descs[4];
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eflags = x86_read_psl();
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x86_disable_intr();
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x86_cpuid(0x80860007, descs);
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*frequency = descs[0];
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*voltage = descs[1];
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*percentage = descs[2];
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x86_write_psl(eflags);
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return (1);
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}
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u_int
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tmx86_set_longrun_mode(u_int mode)
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{
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u_long eflags;
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union msrinfo msrinfo;
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if (mode >= LONGRUN_MODE_UNKNOWN) {
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return (0);
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}
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eflags = x86_read_psl();
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x86_disable_intr();
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/* Write LongRun mode values to Model Specific Register. */
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msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN);
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msrinfo.regs[0] = LONGRUN_MODE_WRITE(msrinfo.regs[0],
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longrun_modes[mode][0]);
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msrinfo.regs[1] = LONGRUN_MODE_WRITE(msrinfo.regs[1],
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longrun_modes[mode][1]);
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wrmsr(MSR_TMx86_LONGRUN, msrinfo.msr);
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/* Write LongRun mode flags to Model Specific Register. */
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msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN_FLAGS);
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msrinfo.regs[0] = (msrinfo.regs[0] & ~0x01) | longrun_modes[mode][2];
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wrmsr(MSR_TMx86_LONGRUN_FLAGS, msrinfo.msr);
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x86_write_psl(eflags);
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return (1);
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}
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u_int crusoe_longrun;
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u_int crusoe_frequency;
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u_int crusoe_voltage;
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u_int crusoe_percentage;
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void
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tmx86_get_longrun_status_all(void)
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{
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tmx86_get_longrun_status(&crusoe_frequency,
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&crusoe_voltage, &crusoe_percentage);
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}
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static void
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transmeta_cpu_info(struct cpu_info *ci)
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{
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u_int descs[4], nreg;
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u_int longrun, frequency, voltage, percentage;
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x86_cpuid(0x80860000, descs);
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nreg = descs[0];
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@ -1259,13 +1138,12 @@ transmeta_cpu_info(struct cpu_info *ci)
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}
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if (nreg >= 0x80860007) {
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crusoe_longrun = tmx86_get_longrun_mode();
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tmx86_get_longrun_status(&crusoe_frequency,
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&crusoe_voltage, &crusoe_percentage);
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longrun = tmx86_get_longrun_mode();
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tmx86_get_longrun_status(&frequency,
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&voltage, &percentage);
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aprint_verbose("%s: LongRun mode: %d <%dMHz %dmV %d%%>\n",
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ci->ci_dev->dv_xname,
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crusoe_longrun, crusoe_frequency, crusoe_voltage,
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crusoe_percentage);
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longrun, frequency, voltage, percentage);
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}
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}
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@ -1276,7 +1154,7 @@ transmeta_cpu_setup(struct cpu_info *ci)
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x86_cpuid(0x80860000, descs);
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if (descs[0] >= 0x80860007)
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tmx86_has_longrun = 1;
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tmx86_init_longrun();
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}
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void
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249
sys/arch/i386/i386/longrun.c
Normal file
249
sys/arch/i386/i386/longrun.c
Normal file
@ -0,0 +1,249 @@
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/* $NetBSD: longrun.c,v 1.1 2008/02/26 18:24:28 xtraeme Exp $ */
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/*-
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* Copyright (c) 2001 Tamotsu Hattori.
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* Copyright (c) 2001 Mitsuru IWASAKI.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: longrun.c,v 1.1 2008/02/26 18:24:28 xtraeme Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/types.h>
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#include <sys/sysctl.h>
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#include <machine/specialreg.h>
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#include <machine/cpu.h>
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/*
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* Transmeta Crusoe LongRun Support by Tamotsu Hattori.
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* Port from FreeBSD-current(August, 2001) to NetBSD by tshiozak.
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*/
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#define MSR_TMx86_LONGRUN 0x80868010
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#define MSR_TMx86_LONGRUN_FLAGS 0x80868011
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#define LONGRUN_MODE_MASK(x) ((x) & 0x0000007f)
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#define LONGRUN_MODE_RESERVED(x) ((x) & 0xffffff80)
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#define LONGRUN_MODE_WRITE(x, y) (LONGRUN_MODE_RESERVED(x) | \
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LONGRUN_MODE_MASK(y))
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#define LONGRUN_MODE_MINFREQUENCY 0x00
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#define LONGRUN_MODE_ECONOMY 0x01
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#define LONGRUN_MODE_PERFORMANCE 0x02
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#define LONGRUN_MODE_MAXFREQUENCY 0x03
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#define LONGRUN_MODE_UNKNOWN 0x04
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#define LONGRUN_MODE_MAX 0x04
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union msrinfo {
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uint64_t msr;
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uint32_t regs[2];
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};
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static u_int crusoe_longrun = 0;
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static u_int crusoe_frequency = 0;
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static u_int crusoe_voltage = 0;
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static u_int crusoe_percentage = 0;
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static const uint32_t longrun_modes[LONGRUN_MODE_MAX][3] = {
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/* MSR low, MSR high, flags bit0 */
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{ 0, 0, 0}, /* LONGRUN_MODE_MINFREQUENCY */
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{ 0, 100, 0}, /* LONGRUN_MODE_ECONOMY */
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{ 0, 100, 1}, /* LONGRUN_MODE_PERFORMANCE */
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{ 100, 100, 1}, /* LONGRUN_MODE_MAXFREQUENCY */
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};
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static u_int tmx86_set_longrun_mode(u_int);
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static void tmx86_get_longrun_status_all(void);
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static int sysctl_machdep_tm_longrun(SYSCTLFN_PROTO);
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void
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tmx86_init_longrun(void)
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{
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/* create the sysctl machdep.tm_longrun_* nodes */
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sysctl_createv(NULL, 0, NULL, NULL,
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CTLFLAG_PERMANENT,
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CTLTYPE_NODE, "machdep", NULL,
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NULL, 0, NULL, 0,
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CTL_MACHDEP, CTL_EOL);
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sysctl_createv(NULL, 0, NULL, NULL,
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CTLFLAG_PERMANENT|CTLFLAG_READWRITE,
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CTLTYPE_INT, "tm_longrun_mode", NULL,
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sysctl_machdep_tm_longrun, 0, NULL, 0,
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CTL_MACHDEP, CPU_TMLR_MODE, CTL_EOL);
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sysctl_createv(NULL, 0, NULL, NULL,
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CTLFLAG_PERMANENT,
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CTLTYPE_INT, "tm_longrun_frequency", NULL,
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sysctl_machdep_tm_longrun, 0, NULL, 0,
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CTL_MACHDEP, CPU_TMLR_FREQUENCY, CTL_EOL);
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sysctl_createv(NULL, 0, NULL, NULL,
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CTLFLAG_PERMANENT,
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CTLTYPE_INT, "tm_longrun_voltage", NULL,
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sysctl_machdep_tm_longrun, 0, NULL, 0,
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CTL_MACHDEP, CPU_TMLR_VOLTAGE, CTL_EOL);
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sysctl_createv(NULL, 0, NULL, NULL,
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CTLFLAG_PERMANENT,
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CTLTYPE_INT, "tm_longrun_percentage", NULL,
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sysctl_machdep_tm_longrun, 0, NULL, 0,
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CTL_MACHDEP, CPU_TMLR_PERCENTAGE, CTL_EOL);
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}
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u_int
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tmx86_get_longrun_mode(void)
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{
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u_long eflags;
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union msrinfo msrinfo;
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u_int low, high, flags, mode;
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eflags = x86_read_psl();
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x86_disable_intr();
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msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN);
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low = LONGRUN_MODE_MASK(msrinfo.regs[0]);
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high = LONGRUN_MODE_MASK(msrinfo.regs[1]);
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flags = rdmsr(MSR_TMx86_LONGRUN_FLAGS) & 0x01;
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for (mode = 0; mode < LONGRUN_MODE_MAX; mode++) {
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if (low == longrun_modes[mode][0] &&
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high == longrun_modes[mode][1] &&
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flags == longrun_modes[mode][2]) {
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goto out;
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}
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}
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mode = LONGRUN_MODE_UNKNOWN;
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out:
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x86_write_psl(eflags);
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return mode;
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}
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void
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tmx86_get_longrun_status(u_int *frequency, u_int *voltage, u_int *percentage)
|
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{
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u_long eflags;
|
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u_int descs[4];
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|
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eflags = x86_read_psl();
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x86_disable_intr();
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x86_cpuid(0x80860007, descs);
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*frequency = descs[0];
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*voltage = descs[1];
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*percentage = descs[2];
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x86_write_psl(eflags);
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}
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static u_int
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tmx86_set_longrun_mode(u_int mode)
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{
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u_long eflags;
|
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union msrinfo msrinfo;
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|
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if (mode >= LONGRUN_MODE_UNKNOWN)
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return 0;
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|
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eflags = x86_read_psl();
|
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x86_disable_intr();
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|
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/* Write LongRun mode values to Model Specific Register. */
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msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN);
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msrinfo.regs[0] = LONGRUN_MODE_WRITE(msrinfo.regs[0],
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longrun_modes[mode][0]);
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msrinfo.regs[1] = LONGRUN_MODE_WRITE(msrinfo.regs[1],
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longrun_modes[mode][1]);
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wrmsr(MSR_TMx86_LONGRUN, msrinfo.msr);
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/* Write LongRun mode flags to Model Specific Register. */
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msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN_FLAGS);
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msrinfo.regs[0] = (msrinfo.regs[0] & ~0x01) | longrun_modes[mode][2];
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wrmsr(MSR_TMx86_LONGRUN_FLAGS, msrinfo.msr);
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x86_write_psl(eflags);
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return 1;
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}
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static void
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tmx86_get_longrun_status_all(void)
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{
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tmx86_get_longrun_status(&crusoe_frequency,
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&crusoe_voltage, &crusoe_percentage);
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}
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/*
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* sysctl helper routine for machdep.tm* nodes.
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*/
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static int
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sysctl_machdep_tm_longrun(SYSCTLFN_ARGS)
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{
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struct sysctlnode node;
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int io, error;
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node = *rnode;
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node.sysctl_data = &io;
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switch (rnode->sysctl_num) {
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case CPU_TMLR_MODE:
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io = (int)(crusoe_longrun = tmx86_get_longrun_mode());
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break;
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case CPU_TMLR_FREQUENCY:
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tmx86_get_longrun_status_all();
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io = crusoe_frequency;
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break;
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case CPU_TMLR_VOLTAGE:
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tmx86_get_longrun_status_all();
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io = crusoe_voltage;
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break;
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case CPU_TMLR_PERCENTAGE:
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tmx86_get_longrun_status_all();
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io = crusoe_percentage;
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break;
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default:
|
||||
return EOPNOTSUPP;
|
||||
}
|
||||
|
||||
error = sysctl_lookup(SYSCTLFN_CALL(&node));
|
||||
if (error || newp == NULL)
|
||||
return error;
|
||||
|
||||
if (rnode->sysctl_num == CPU_TMLR_MODE) {
|
||||
if (tmx86_set_longrun_mode(io))
|
||||
crusoe_longrun = (u_int)io;
|
||||
else
|
||||
return EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: machdep.c,v 1.626 2008/02/12 17:52:18 joerg Exp $ */
|
||||
/* $NetBSD: machdep.c,v 1.627 2008/02/26 18:24:28 xtraeme Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 1996, 1997, 1998, 2000, 2004, 2006, 2008 The NetBSD Foundation, Inc.
|
||||
@ -72,7 +72,7 @@
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.626 2008/02/12 17:52:18 joerg Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.627 2008/02/26 18:24:28 xtraeme Exp $");
|
||||
|
||||
#include "opt_beep.h"
|
||||
#include "opt_compat_ibcs2.h"
|
||||
@ -262,8 +262,6 @@ int i386_use_fxsave;
|
||||
int i386_has_sse;
|
||||
int i386_has_sse2;
|
||||
|
||||
int tmx86_has_longrun;
|
||||
|
||||
vaddr_t msgbuf_vaddr;
|
||||
struct {
|
||||
paddr_t paddr;
|
||||
@ -617,55 +615,6 @@ cpu_init_tss(struct cpu_info *ci)
|
||||
}
|
||||
#endif /* XEN */
|
||||
|
||||
/*
|
||||
* sysctl helper routine for machdep.tm* nodes.
|
||||
*/
|
||||
static int
|
||||
sysctl_machdep_tm_longrun(SYSCTLFN_ARGS)
|
||||
{
|
||||
struct sysctlnode node;
|
||||
int io, error;
|
||||
|
||||
if (!tmx86_has_longrun)
|
||||
return (EOPNOTSUPP);
|
||||
|
||||
node = *rnode;
|
||||
node.sysctl_data = &io;
|
||||
|
||||
switch (rnode->sysctl_num) {
|
||||
case CPU_TMLR_MODE:
|
||||
io = (int)(crusoe_longrun = tmx86_get_longrun_mode());
|
||||
break;
|
||||
case CPU_TMLR_FREQUENCY:
|
||||
tmx86_get_longrun_status_all();
|
||||
io = crusoe_frequency;
|
||||
break;
|
||||
case CPU_TMLR_VOLTAGE:
|
||||
tmx86_get_longrun_status_all();
|
||||
io = crusoe_voltage;
|
||||
break;
|
||||
case CPU_TMLR_PERCENTAGE:
|
||||
tmx86_get_longrun_status_all();
|
||||
io = crusoe_percentage;
|
||||
break;
|
||||
default:
|
||||
return (EOPNOTSUPP);
|
||||
}
|
||||
|
||||
error = sysctl_lookup(SYSCTLFN_CALL(&node));
|
||||
if (error || newp == NULL)
|
||||
return (error);
|
||||
|
||||
if (rnode->sysctl_num == CPU_TMLR_MODE) {
|
||||
if (tmx86_set_longrun_mode(io))
|
||||
crusoe_longrun = (u_int)io;
|
||||
else
|
||||
return (EINVAL);
|
||||
}
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
/*
|
||||
* sysctl helper routine for machdep.booted_kernel
|
||||
*/
|
||||
@ -766,26 +715,6 @@ SYSCTL_SETUP(sysctl_machdep_setup, "sysctl machdep subtree setup")
|
||||
CTLTYPE_STRING, "cpu_brand", NULL,
|
||||
NULL, 0, &cpu_brand_string, 0,
|
||||
CTL_MACHDEP, CTL_CREATE, CTL_EOL);
|
||||
sysctl_createv(clog, 0, NULL, NULL,
|
||||
CTLFLAG_PERMANENT|CTLFLAG_READWRITE,
|
||||
CTLTYPE_INT, "tm_longrun_mode", NULL,
|
||||
sysctl_machdep_tm_longrun, 0, NULL, 0,
|
||||
CTL_MACHDEP, CPU_TMLR_MODE, CTL_EOL);
|
||||
sysctl_createv(clog, 0, NULL, NULL,
|
||||
CTLFLAG_PERMANENT,
|
||||
CTLTYPE_INT, "tm_longrun_frequency", NULL,
|
||||
sysctl_machdep_tm_longrun, 0, NULL, 0,
|
||||
CTL_MACHDEP, CPU_TMLR_FREQUENCY, CTL_EOL);
|
||||
sysctl_createv(clog, 0, NULL, NULL,
|
||||
CTLFLAG_PERMANENT,
|
||||
CTLTYPE_INT, "tm_longrun_voltage", NULL,
|
||||
sysctl_machdep_tm_longrun, 0, NULL, 0,
|
||||
CTL_MACHDEP, CPU_TMLR_VOLTAGE, CTL_EOL);
|
||||
sysctl_createv(clog, 0, NULL, NULL,
|
||||
CTLFLAG_PERMANENT,
|
||||
CTLTYPE_INT, "tm_longrun_percentage", NULL,
|
||||
sysctl_machdep_tm_longrun, 0, NULL, 0,
|
||||
CTL_MACHDEP, CPU_TMLR_PERCENTAGE, CTL_EOL);
|
||||
sysctl_createv(clog, 0, NULL, NULL,
|
||||
CTLFLAG_PERMANENT|CTLFLAG_READWRITE,
|
||||
CTLTYPE_INT, "sparse_dump", NULL,
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: cpu.h,v 1.161 2008/02/10 14:37:41 ad Exp $ */
|
||||
/* $NetBSD: cpu.h,v 1.162 2008/02/26 18:24:28 xtraeme Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 1990 The Regents of the University of California.
|
||||
@ -383,15 +383,13 @@ void dumpconf(void);
|
||||
void cpu_reset(void);
|
||||
void i386_proc0_tss_ldt_init(void);
|
||||
|
||||
extern int tmx86_has_longrun;
|
||||
extern u_int crusoe_longrun;
|
||||
extern u_int crusoe_frequency;
|
||||
extern u_int crusoe_voltage;
|
||||
extern u_int crusoe_percentage;
|
||||
extern u_int tmx86_set_longrun_mode(u_int);
|
||||
void tmx86_get_longrun_status_all(void);
|
||||
u_int tmx86_get_longrun_mode(void);
|
||||
void identifycpu(struct cpu_info *);
|
||||
/* longrun.c */
|
||||
u_int tmx86_get_longrun_mode(void);
|
||||
void tmx86_get_longrun_status(u_int *, u_int *, u_int *);
|
||||
void tmx86_init_longrun(void);
|
||||
|
||||
/* identcpu.c */
|
||||
void identifycpu(struct cpu_info *);
|
||||
|
||||
/* vm_machdep.c */
|
||||
void cpu_proc_fork(struct proc *, struct proc *);
|
||||
@ -479,7 +477,7 @@ void x86_bus_space_mallocok(void);
|
||||
* 3: maximum frequency
|
||||
*/
|
||||
#define CPU_TMLR_FREQUENCY 12 /* int: current frequency */
|
||||
#define CPU_TMLR_VOLTAGE 13 /* int: curret voltage */
|
||||
#define CPU_TMLR_VOLTAGE 13 /* int: current voltage */
|
||||
#define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */
|
||||
#define CPU_MAXID 15 /* number of valid machdep ids */
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user