rename round() to fpu_round() to avoid a name conflict with
the "round" assembly function in FPSP when building with ELF.
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7b76ca8254
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c5030d24f4
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@ -1,4 +1,4 @@
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/* $NetBSD: fpu_emulate.h,v 1.7 2000/09/22 19:47:58 is Exp $ */
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/* $NetBSD: fpu_emulate.h,v 1.8 2001/02/18 20:05:58 chs Exp $ */
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/*
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* Copyright (c) 1995 Gordon Ross
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@ -270,7 +270,7 @@ int fpu_shr __P((struct fpn * fp, int shr));
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/*
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* Round a number according to the round mode in FPCR
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*/
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int round __P((register struct fpemu *fe, register struct fpn *fp));
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int fpu_round __P((register struct fpemu *fe, register struct fpn *fp));
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/* type conversion */
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void fpu_explode __P((struct fpemu *fe, struct fpn *fp, int t, u_int *src));
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@ -1,4 +1,4 @@
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/* $NetBSD: fpu_implode.c,v 1.4 1999/05/30 20:17:48 briggs Exp $ */
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/* $NetBSD: fpu_implode.c,v 1.5 2001/02/18 20:05:58 chs Exp $ */
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/*
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* Copyright (c) 1992, 1993
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@ -77,7 +77,7 @@ static u_int fpu_ftox __P((struct fpemu *fe, struct fpn *fp, u_int *));
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* responsibility to fix this if necessary.
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*/
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int
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round(register struct fpemu *fe, register struct fpn *fp)
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fpu_round(register struct fpemu *fe, register struct fpn *fp)
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{
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register u_int m0, m1, m2;
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register int gr, s;
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@ -207,7 +207,7 @@ fpu_ftoi(fe, fp)
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* into last mantissa word (this will not exceed 0xffffffff),
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* shifting any guard and round bits out into the sticky
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* bit. Then ``round'' towards zero, i.e., just set an
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* inexact exception if sticky is set (see round()).
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* inexact exception if sticky is set (see fpu_round()).
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* If the result is > 0x80000000, or is positive and equals
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* 0x80000000, overflow; otherwise the last fraction word
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* is the result.
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@ -218,7 +218,7 @@ fpu_ftoi(fe, fp)
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if (fpu_shr(fp, FP_NMANT - 1 - FP_NG - exp) != 0)
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/* m68881/2 do not underflow when
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converting to integer */;
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round(fe, fp);
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fpu_round(fe, fp);
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i = fp->fp_mant[2];
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if (i >= ((u_int)0x80000000 + sign))
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break;
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@ -288,7 +288,7 @@ fpu_ftos(fe, fp)
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fe->fe_fpsr |= FPSR_UNFL;
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/* -NG for g,r; -SNG_FRACBITS-exp for fraction */
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(void) fpu_shr(fp, FP_NMANT - FP_NG - SNG_FRACBITS - exp);
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if (round(fe, fp) && fp->fp_mant[2] == SNG_EXP(1))
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if (fpu_round(fe, fp) && fp->fp_mant[2] == SNG_EXP(1))
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return (sign | SNG_EXP(1) | 0);
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if (fe->fe_fpsr & FPSR_INEX2)
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fe->fe_fpsr |= FPSR_UNFL
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@ -301,7 +301,7 @@ fpu_ftos(fe, fp)
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if ((fp->fp_mant[2] & SNG_EXP(1 << FP_NG)) == 0)
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panic("fpu_ftos");
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#endif
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if (round(fe, fp) && fp->fp_mant[2] == SNG_EXP(2))
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if (fpu_round(fe, fp) && fp->fp_mant[2] == SNG_EXP(2))
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exp++;
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if (exp >= SNG_EXP_INFNAN) {
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/* overflow to inf or to max single */
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@ -351,7 +351,7 @@ fpu_ftod(fe, fp, res)
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if ((exp = fp->fp_exp + DBL_EXP_BIAS) <= 0) {
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fe->fe_fpsr |= FPSR_UNFL;
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(void) fpu_shr(fp, FP_NMANT - FP_NG - DBL_FRACBITS - exp);
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if (round(fe, fp) && fp->fp_mant[1] == DBL_EXP(1)) {
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if (fpu_round(fe, fp) && fp->fp_mant[1] == DBL_EXP(1)) {
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res[1] = 0;
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return (sign | DBL_EXP(1) | 0);
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}
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@ -362,7 +362,7 @@ fpu_ftod(fe, fp, res)
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goto done;
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}
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(void) fpu_shr(fp, FP_NMANT - FP_NG - 1 - DBL_FRACBITS);
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if (round(fe, fp) && fp->fp_mant[1] == DBL_EXP(2))
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if (fpu_round(fe, fp) && fp->fp_mant[1] == DBL_EXP(2))
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exp++;
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if (exp >= DBL_EXP_INFNAN) {
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fe->fe_fpsr |= FPSR_OPERR | FPSR_INEX2 | FPSR_OVFL;
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@ -423,7 +423,7 @@ fpu_ftox(fe, fp, res)
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/* I'm not sure about this <=... exp==0 doesn't mean
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it's a denormal in extended format */
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(void) fpu_shr(fp, FP_NMANT - FP_NG - EXT_FRACBITS - exp);
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if (round(fe, fp) && fp->fp_mant[1] == EXT_EXPLICIT1) {
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if (fpu_round(fe, fp) && fp->fp_mant[1] == EXT_EXPLICIT1) {
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res[1] = res[2] = 0;
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return (sign | EXT_EXP(1) | 0);
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}
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@ -436,7 +436,7 @@ fpu_ftox(fe, fp, res)
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#if (FP_NMANT - FP_NG - EXT_FRACBITS) > 0
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(void) fpu_shr(fp, FP_NMANT - FP_NG - EXT_FRACBITS);
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#endif
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if (round(fe, fp) && fp->fp_mant[0] == EXT_EXPLICIT2)
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if (fpu_round(fe, fp) && fp->fp_mant[0] == EXT_EXPLICIT2)
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exp++;
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if (exp >= EXT_EXP_INFNAN) {
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fe->fe_fpsr |= FPSR_OPERR | FPSR_INEX2 | FPSR_OVFL;
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@ -1,4 +1,4 @@
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/* $NetBSD: fpu_int.c,v 1.3 2000/09/22 19:47:59 is Exp $ */
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/* $NetBSD: fpu_int.c,v 1.4 2001/02/18 20:05:58 chs Exp $ */
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/*
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* Copyright (c) 1995 Ken Nakata
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fpu_shr(x, rsh - FP_NG); /* shift to the right */
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if (round(fe, x) == 1 /* rounded up */ &&
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if (fpu_round(fe, x) == 1 /* rounded up */ &&
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x->fp_mant[2 - (FP_NMANT-rsh)/32] & (1 << ((FP_NMANT-rsh)%32))
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/* x >= 2.0 */) {
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rsh--; /* reduce shift count by 1 */
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