diff --git a/sys/arch/sun3/dev/dma.c b/sys/arch/sun3/dev/dma.c index edc335efa8cc..24c8f33930f9 100644 --- a/sys/arch/sun3/dev/dma.c +++ b/sys/arch/sun3/dev/dma.c @@ -1,4 +1,4 @@ -/* $NetBSD: dma.c,v 1.3 1997/03/15 18:11:00 is Exp $ */ +/* $NetBSD: dma.c,v 1.4 1997/03/20 16:01:38 gwr Exp $ */ /* * Copyright (c) 1994 Paul Kranenburg. All rights reserved. @@ -48,33 +48,15 @@ #include #include +#include +#include + #include #include -#include -#include - -void dmaattach __P((struct device *, struct device *, void *)); -void dma_reset __P((struct dma_softc *)); -void dma_enintr __P((struct dma_softc *)); -int dma_isintr __P((struct dma_softc *)); -int espdmaintr __P((struct dma_softc *)); -int dma_setup __P((struct dma_softc *, caddr_t *, size_t *, - int, size_t *)); -void dma_go __P((struct dma_softc *)); - -#if 0 -struct cfattach dma_ca = { - sizeof(struct dma_softc), dmamatch, dmaattach -}; - -struct cfdriver dma_cd = { - NULL, "dma", DV_DULL -}; -#endif /* 0 */ /* * Pseudo-attach function. Called from the esp driver during its - * attach function. + * attach function. This needs to be silent. */ void dmaattach(parent, self, aux) @@ -99,8 +81,25 @@ dmaattach(parent, self, aux) * Sun3x works ok (so far) without it. */ - printf(": rev "); sc->sc_rev = sc->sc_regs->csr & D_DEV_ID; + +#if 0 + /* indirect functions */ + sc->intr = espdmaintr; + sc->enintr = dma_enintr; + sc->isintr = dma_isintr; + sc->reset = dma_reset; + sc->setup = dma_setup; + sc->go = dma_go; +#endif +} + +void +dma_print_rev(sc) + struct dma_softc *sc; +{ + + printf("espdma: rev "); switch (sc->sc_rev) { case DMAREV_0: printf("0"); @@ -121,16 +120,9 @@ dmaattach(parent, self, aux) printf("unknown (0x%x)", sc->sc_rev); } printf("\n"); - - /* indirect functions */ - sc->intr = espdmaintr; - sc->enintr = dma_enintr; - sc->isintr = dma_isintr; - sc->reset = dma_reset; - sc->setup = dma_setup; - sc->go = dma_go; } + #define DMAWAIT(SC, COND, MSG, DONTPANIC) do if (COND) { \ int count = 500000; \ while ((COND) && --count > 0) DELAY(1); \ @@ -178,8 +170,6 @@ dma_reset(sc) /*DMAWAIT1(sc); why was this here? */ DMACSR(sc) &= ~D_RESET; /* de-assert reset line */ DMACSR(sc) |= D_INT_EN; /* enable interrupts */ - if (sc->sc_rev > DMAREV_1) /* XXX - needed in 3x? */ - DMACSR(sc) |= D_FASTER; sc->sc_active = 0; /* and of course we aren't */ } @@ -223,7 +213,7 @@ dma_setup(sc, addr, len, datain, dmasize) sc->sc_dmaaddr = addr; sc->sc_dmalen = len; - ESP_DMA(("%s: start %d@%p,%d\n", sc->sc_dev.dv_xname, + NCR_DMA(("%s: start %d@%p,%d\n", sc->sc_dev.dv_xname, *sc->sc_dmalen, *sc->sc_dmaaddr, datain ? 1 : 0)); /* @@ -234,7 +224,7 @@ dma_setup(sc, addr, len, datain, dmasize) *dmasize = sc->sc_dmasize = min(*dmasize, DMAMAX((size_t) *sc->sc_dmaaddr)); - ESP_DMA(("dma_setup: dmasize = %d\n", sc->sc_dmasize)); + NCR_DMA(("dma_setup: dmasize = %d\n", sc->sc_dmasize)); /* Program the DMA address */ if (sc->sc_dmasize) { @@ -243,7 +233,7 @@ dma_setup(sc, addr, len, datain, dmasize) */ sc->sc_dvmaaddr = *sc->sc_dmaaddr; sc->sc_dvmakaddr = dvma_mapin(sc->sc_dvmaaddr, - sc->sc_dmasize, 0); + sc->sc_dmasize, 0); if (sc->sc_dvmakaddr == NULL) panic("dma: cannot allocate DVMA address"); sc->sc_dmasaddr = dvma_kvtopa(sc->sc_dvmakaddr, BUS_OBIO); @@ -292,14 +282,15 @@ int espdmaintr(sc) struct dma_softc *sc; { + struct ncr53c9x_softc *nsc = sc->sc_esp; char bits[64]; int trans, resid; u_long csr; csr = DMACSR(sc); - ESP_DMA(("%s: intr: addr %x, csr %s\n", sc->sc_dev.dv_xname, - DMADDR(sc), bitmask_snprintf(csr, DMACSRBITS, bits, - sizeof(bits)))); + NCR_DMA(("%s: intr: addr %x, csr %s\n", + sc->sc_dev.dv_xname, DMADDR(sc), + bitmask_snprintf(csr, DMACSRBITS, bits, sizeof(bits)))); if (csr & D_ERR_PEND) { DMACSR(sc) &= ~D_EN_DMA; /* Stop DMA */ @@ -321,11 +312,11 @@ espdmaintr(sc) if (sc->sc_dmasize == 0) { /* A "Transfer Pad" operation completed */ - ESP_DMA(("dmaintr: discarded %d bytes (tcl=%d, tcm=%d)\n", - ESP_READ_REG(sc->sc_esp, ESP_TCL) | - (ESP_READ_REG(sc->sc_esp, ESP_TCM) << 8), - ESP_READ_REG(sc->sc_esp, ESP_TCL), - ESP_READ_REG(sc->sc_esp, ESP_TCM))); + NCR_DMA(("dmaintr: discarded %d bytes (tcl=%d, tcm=%d)\n", + NCR_READ_REG(nsc, NCR_TCL) | + (NCR_READ_REG(nsc, NCR_TCM) << 8), + NCR_READ_REG(nsc, NCR_TCL), + NCR_READ_REG(nsc, NCR_TCM))); return 0; } @@ -337,24 +328,24 @@ espdmaintr(sc) * bytes are clocked into the FIFO. */ if (!(csr & D_WRITE) && - (resid = (ESP_READ_REG(sc->sc_esp, ESP_FFLAG) & ESPFIFO_FF)) != 0) { - ESP_DMA(("dmaintr: empty esp FIFO of %d ", resid)); - ESPCMD(sc->sc_esp, ESPCMD_FLUSH); + (resid = (NCR_READ_REG(nsc, NCR_FFLAG) & NCRFIFO_FF)) != 0) { + NCR_DMA(("dmaintr: empty esp FIFO of %d ", resid)); + NCRCMD(nsc, NCRCMD_FLUSH); } - if ((sc->sc_esp->sc_espstat & ESPSTAT_TC) == 0) { + if ((nsc->sc_espstat & NCRSTAT_TC) == 0) { /* * `Terminal count' is off, so read the residue * out of the ESP counter registers. */ - resid += ( ESP_READ_REG(sc->sc_esp, ESP_TCL) | - (ESP_READ_REG(sc->sc_esp, ESP_TCM) << 8) | - ((sc->sc_esp->sc_cfg2 & ESPCFG2_FE) - ? (ESP_READ_REG(sc->sc_esp, ESP_TCH) << 16) + resid += (NCR_READ_REG(nsc, NCR_TCL) | + (NCR_READ_REG(nsc, NCR_TCM) << 8) | + ((nsc->sc_cfg2 & NCRCFG2_FE) + ? (NCR_READ_REG(nsc, NCR_TCH) << 16) : 0)); if (resid == 0 && sc->sc_dmasize == 65536 && - (sc->sc_esp->sc_cfg2 & ESPCFG2_FE) == 0) + (nsc->sc_cfg2 & NCRCFG2_FE) == 0) /* A transfer of 64K is encoded as `TCL=TCM=0' */ resid = 65536; } @@ -366,11 +357,11 @@ espdmaintr(sc) trans = sc->sc_dmasize; } - ESP_DMA(("dmaintr: tcl=%d, tcm=%d, tch=%d; trans=%d, resid=%d\n", - ESP_READ_REG(sc->sc_esp, ESP_TCL), - ESP_READ_REG(sc->sc_esp, ESP_TCM), - (sc->sc_esp->sc_cfg2 & ESPCFG2_FE) - ? ESP_READ_REG(sc->sc_esp, ESP_TCH) : 0, + NCR_DMA(("dmaintr: tcl=%d, tcm=%d, tch=%d; trans=%d, resid=%d\n", + NCR_READ_REG(nsc, NCR_TCL), + NCR_READ_REG(nsc, NCR_TCM), + (nsc->sc_cfg2 & NCRCFG2_FE) + ? NCR_READ_REG(nsc, NCR_TCH) : 0, trans, resid)); #ifdef SUN3X_470_EVENTUALLY @@ -386,7 +377,7 @@ espdmaintr(sc) #if 0 /* this is not normal operation just yet */ if (*sc->sc_dmalen == 0 || - sc->sc_esp->sc_phase != sc->sc_esp->sc_prevphase) + nsc->sc_phase != nsc->sc_prevphase) return 0; /* and again */ diff --git a/sys/arch/sun3/dev/dmavar.h b/sys/arch/sun3/dev/dmavar.h index ca7e766eba03..079a8d71d3ee 100644 --- a/sys/arch/sun3/dev/dmavar.h +++ b/sys/arch/sun3/dev/dmavar.h @@ -1,4 +1,4 @@ -/* $NetBSD: dmavar.h,v 1.2 1997/03/15 18:11:02 is Exp $ */ +/* $NetBSD: dmavar.h,v 1.3 1997/03/20 16:01:39 gwr Exp $ */ /* * Copyright (c) 1994 Peter Galbavy. All rights reserved. @@ -30,7 +30,7 @@ struct dma_softc { struct device sc_dev; /* us as a device */ - struct esp_softc *sc_esp; /* my scsi */ + struct ncr53c9x_softc *sc_esp; /* my scsi */ struct dma_regs *sc_regs; /* the registers */ int sc_active; /* DMA active ? */ u_int sc_rev; /* revision */ @@ -41,25 +41,27 @@ struct dma_softc { size_t sc_dmasize; caddr_t *sc_dmaaddr; size_t *sc_dmalen; +#if 0 void (*reset)(struct dma_softc *); /* reset routine */ void (*enintr)(struct dma_softc *); /* enable interrupts */ int (*isintr)(struct dma_softc *); /* interrupt ? */ int (*intr)(struct dma_softc *); /* interrupt ! */ int (*setup)(struct dma_softc *, caddr_t *, size_t *, int, size_t *); void (*go)(struct dma_softc *); +#endif }; #define DMACSR(sc) (sc->sc_regs->csr) #define DMADDR(sc) (sc->sc_regs->addr) #define DMACNT(sc) (sc->sc_regs->bcnt) -/* DMA engine functions */ -#define DMA_ENINTR(r) (((r)->enintr)(r)) -#define DMA_ISINTR(r) (((r)->isintr)(r)) -#define DMA_RESET(r) (((r)->reset)(r)) -#define DMA_INTR(r) (((r)->intr)(r)) -#define DMA_ISACTIVE(r) ((r)->sc_active) -#define DMA_SETUP(a, b, c, d, e) (((a)->setup)(a, b, c, d, e)) -#define DMA_GO(r) (((r)->go)(r)) - void dmaattach __P((struct device *, struct device *, void *)); +void dma_print_rev __P((struct dma_softc *)); + +void dma_reset __P((struct dma_softc *)); +void dma_enintr __P((struct dma_softc *)); +int dma_isintr __P((struct dma_softc *)); +int dma_setup __P((struct dma_softc *, caddr_t *, size_t *, int, size_t *)); +void dma_go __P((struct dma_softc *)); + +int espdmaintr __P((struct dma_softc *)); diff --git a/sys/arch/sun3/dev/esp.c b/sys/arch/sun3/dev/esp.c index ef9be4532527..7e589b611988 100644 --- a/sys/arch/sun3/dev/esp.c +++ b/sys/arch/sun3/dev/esp.c @@ -1,39 +1,12 @@ -/* $NetBSD: esp.c,v 1.2 1997/03/15 18:11:03 is Exp $ */ +/* $NetBSD: esp.c,v 1.3 1997/03/20 16:01:40 gwr Exp $ */ -/* - * Copyright (c) 1996 Charles M. Hannum. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Charles M. Hannum. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Copyright (c) 1994 Peter Galbavy - * Copyright (c) 1995 Paul Kranenburg +/*- + * Copyright (c) 1997 The NetBSD Foundation, Inc. * All rights reserved. * + * This code is derived from software contributed to The NetBSD Foundation + * by Jeremy Cooper and Gordon W. Ross + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -44,29 +17,28 @@ * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: - * This product includes software developed by Peter Galbavy - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /* - * Based on aic6360 by Jarle Greipsland - * - * Acknowledgements: Many of the algorithms used in this driver are - * inspired by the work of Julian Elischer (julian@tfs.com) and - * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million! + * "Front end" glue for the ncr53c9x chip, formerly known as the + * Emulex SCSI Processor (ESP) which is what we actually have. */ #include @@ -87,46 +59,24 @@ #include #include + +#include +#include + #include #include -#include -#include #define ESP_REG_SIZE (12*4) #define ESP_DMA_OFF 0x1000 -int esp_debug = 0; /*ESP_SHOWPHASE|ESP_SHOWMISC|ESP_SHOWTRAC|ESP_SHOWCMDS;*/ +struct esp_softc { + struct ncr53c9x_softc sc_ncr53c9x; /* glue to MI code */ + volatile u_char *sc_reg; /* the registers */ + struct dma_softc *sc_dma; /* pointer to my dma */ +}; -/*static*/ void espattach __P((struct device *, struct device *, void *)); -/*static*/ int espmatch __P((struct device *, struct cfdata *, void *)); -/*static*/ u_int esp_adapter_info __P((struct esp_softc *)); -/*static*/ void espreadregs __P((struct esp_softc *)); -/*static*/ void esp_select __P((struct esp_softc *, struct esp_ecb *)); -/*static*/ int esp_reselect __P((struct esp_softc *, int)); -/*static*/ void esp_scsi_reset __P((struct esp_softc *)); -/*static*/ void esp_reset __P((struct esp_softc *)); -/*static*/ void esp_init __P((struct esp_softc *, int)); -/*static*/ int esp_scsi_cmd __P((struct scsi_xfer *)); -/*static*/ int esp_poll __P((struct esp_softc *, struct scsi_xfer *, int)); -/*static*/ void esp_sched __P((struct esp_softc *)); -/*static*/ void esp_done __P((struct esp_softc *, struct esp_ecb *)); -/*static*/ void esp_msgin __P((struct esp_softc *)); -/*static*/ void esp_msgout __P((struct esp_softc *)); -/*static*/ int espintr __P((struct esp_softc *)); -/*static*/ void esp_timeout __P((void *arg)); -/*static*/ void esp_abort __P((struct esp_softc *, struct esp_ecb *)); -/*static*/ void esp_dequeue __P((struct esp_softc *, struct esp_ecb *)); -void esp_sense __P((struct esp_softc *, struct esp_ecb *)); -void esp_free_ecb __P((struct esp_softc *, struct esp_ecb *, int)); -struct esp_ecb *esp_get_ecb __P((struct esp_softc *, int)); -static inline int esp_stp2cpb __P((struct esp_softc *, int)); -static inline int esp_cpb2stp __P((struct esp_softc *, int)); -static inline void esp_setsync __P((struct esp_softc *, struct esp_tinfo *)); - -/* - * This section is machine-dependent - * (autoconf data and match/attach functions) - */ +static int espmatch __P((struct device *, struct cfdata *, void *)); +static void espattach __P((struct device *, struct device *, void *)); struct cfattach esp_ca = { sizeof(struct esp_softc), espmatch, espattach @@ -137,7 +87,7 @@ struct cfdriver esp_cd = { }; struct scsi_adapter esp_switch = { - esp_scsi_cmd, + ncr53c9x_scsi_cmd, minphys, /* no max at this level; handled by DMA code */ NULL, NULL, @@ -150,7 +100,34 @@ struct scsi_device esp_dev = { NULL, /* Use default 'done' routine */ }; -int +/* + * Functions and the switch for the MI code. + */ +u_char esp_read_reg __P((struct ncr53c9x_softc *, int)); +void esp_write_reg __P((struct ncr53c9x_softc *, int, u_char)); +int esp_dma_isintr __P((struct ncr53c9x_softc *)); +void esp_dma_reset __P((struct ncr53c9x_softc *)); +int esp_dma_intr __P((struct ncr53c9x_softc *)); +int esp_dma_setup __P((struct ncr53c9x_softc *, caddr_t *, + size_t *, int, size_t *)); +void esp_dma_go __P((struct ncr53c9x_softc *)); +void esp_dma_stop __P((struct ncr53c9x_softc *)); +int esp_dma_isactive __P((struct ncr53c9x_softc *)); + +static struct ncr53c9x_glue esp_glue = { + esp_read_reg, + esp_write_reg, + esp_dma_isintr, + esp_dma_reset, + esp_dma_intr, + esp_dma_setup, + esp_dma_go, + esp_dma_stop, + esp_dma_isactive, + NULL, /* gl_clear_latched_intr */ +}; + +static int espmatch(parent, cf, aux) struct device *parent; struct cfdata *cf; @@ -169,7 +146,7 @@ espmatch(parent, cf, aux) * Check for the esp registers. */ if (bus_peek(ca->ca_bustype, - ca->ca_paddr + (ESP_STAT * 4), 1) == -1) + ca->ca_paddr + (NCR_STAT * 4), 1) == -1) return (0); /* If default ipl, fill it in. */ @@ -181,91 +158,112 @@ espmatch(parent, cf, aux) /* * Attach this instance, and then all the sub-devices + * + * In the SPARC port, the dma code used by the esp driver looks like + * a separate driver, matched and attached by either the esp driver + * or the bus attach function. However it's not completely separate + * in that the sparc esp driver has to go look in dma_cd.cd_devs to + * get the softc for the dma driver, and shares its softc, etc. + * + * The dma module could exist as a separate autoconfig entity, but + * that really does not buy us anything, so why bother with that? + * In the current sun3x port, the dma chip is treated as just an + * extension of the esp driver because that is easier, and the esp + * driver is the only one that uses the dma module. */ -void +static void espattach(parent, self, aux) struct device *parent, *self; void *aux; { register struct confargs *ca = aux; - struct esp_softc *sc = (void *)self; + struct esp_softc *esc = (void *)self; + struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x; /* - * Map in the registers. + * Set up glue for MI code early; we use some of it here. */ - sc->sc_reg = (volatile u_char *) + sc->sc_glue = &esp_glue; + + /* + * Map in the ESP registers. + */ + esc->sc_reg = (volatile u_char *) bus_mapin(ca->ca_bustype, ca->ca_paddr, NBPG); + /* Other settings */ sc->sc_id = 7; sc->sc_freq = 20; /* The 3/80 esp runs at 20 Mhz */ /* - * It is necessary to try to load the 2nd config register here, - * to find out what rev the esp chip is, otherwise esp_reset - * will not set up the defaults correctly. + * Hook up the DMA driver. + * XXX - Would rather do this later, after the common + * attach function is done printing its line so the DMA + * module can print its revision, but the common attach + * code needs this done first... + * XXX - Move printf back to MD code? */ - sc->sc_cfg1 = sc->sc_id | ESPCFG1_PARENB; - sc->sc_cfg2 = ESPCFG2_SCSI2 | ESPCFG2_RPE; - sc->sc_cfg3 = ESPCFG3_CDB; - ESP_WRITE_REG(sc, ESP_CFG2, sc->sc_cfg2); - - if ((ESP_READ_REG(sc, ESP_CFG2) & ~ESPCFG2_RSVD) != (ESPCFG2_SCSI2 | ESPCFG2_RPE)) { - printf(": ESP100"); - sc->sc_rev = ESP100; - } else { - sc->sc_cfg2 = ESPCFG2_SCSI2; - ESP_WRITE_REG(sc, ESP_CFG2, sc->sc_cfg2); - sc->sc_cfg3 = 0; - ESP_WRITE_REG(sc, ESP_CFG3, sc->sc_cfg3); - sc->sc_cfg3 = (ESPCFG3_CDB | ESPCFG3_FCLK); - ESP_WRITE_REG(sc, ESP_CFG3, sc->sc_cfg3); - if (ESP_READ_REG(sc, ESP_CFG3) != (ESPCFG3_CDB | ESPCFG3_FCLK)) { - printf(": ESP100A"); - sc->sc_rev = ESP100A; - } else { - /* ESPCFG2_FE enables > 64K transfers */ - sc->sc_cfg2 |= ESPCFG2_FE; - sc->sc_cfg3 = 0; - ESP_WRITE_REG(sc, ESP_CFG3, sc->sc_cfg3); - printf(": ESP200"); - sc->sc_rev = ESP200; - } - } - printf(" %dMhz, target %d\n", sc->sc_freq, sc->sc_id); + esc->sc_dma = malloc(sizeof(struct dma_softc), M_DEVBUF, M_NOWAIT); + if (esc->sc_dma == 0) + panic("espattach: malloc dma_softc"); + bzero(esc->sc_dma, sizeof(struct dma_softc)); + esc->sc_dma->sc_esp = sc; /* Point back to us */ + esc->sc_dma->sc_regs = (struct dma_regs *) + (esc->sc_reg + ESP_DMA_OFF); /* - * In the SPARC port, the dma code used by the esp driver looks like - * a separate driver, matched and attached by either the esp driver - * or the bus attach function. However it's not completely separate - * in that the sparc esp driver has to go look in dma_cd.cd_devs to - * get the softc for the dma driver, and shares its softc, etc. - * - * In the current sun3x port, the dma chip is treated as just an - * extension of the esp driver because that is easier, and the esp - * driver is the only one that uses the dma module. - * - * The dma module could exist as a separate autoconfig entity, but - * that really does not buy us anything, so why bother with that? - * We can just simulate an attach call here for compatibility with - * the sparc dma.c module. + * Simulate an attach call here for compatibility with + * the sparc dma.c module. It does not print anything. */ - sc->sc_dma = malloc(sizeof(struct dma_softc), M_DEVBUF, M_NOWAIT); - if (sc->sc_dma == 0) - panic("espattach: malloc dma_softc"); - bzero(sc->sc_dma, sizeof(struct dma_softc)); + dmaattach(self, (struct device *) esc->sc_dma, NULL); - sc->sc_dma->sc_esp = sc; /* Point back to us */ - sc->sc_dma->sc_regs = (struct dma_regs *) - (sc->sc_reg + ESP_DMA_OFF); + /* + * XXX More of this should be in ncr53c9x_attach(), but + * XXX should we really poke around the chip that much in + * XXX the MI code? Think about this more... + */ - /* Simulate the autoconfig messages... */ - printf("%s: dma", sc->sc_dev.dv_xname); - /* This will print ": rev ..." */ - dmaattach(self, (struct device *) sc->sc_dma, NULL); + /* + * It is necessary to try to load the 2nd config register here, + * to find out what rev the esp chip is, else the ncr53c9x_reset + * will not set up the defaults correctly. + */ + sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB; + sc->sc_cfg2 = NCRCFG2_SCSI2 | NCRCFG2_RPE; + sc->sc_cfg3 = NCRCFG3_CDB; + NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); + + if ((NCR_READ_REG(sc, NCR_CFG2) & ~NCRCFG2_RSVD) != + (NCRCFG2_SCSI2 | NCRCFG2_RPE)) { + sc->sc_rev = NCR_VARIANT_ESP100; + } else { + sc->sc_cfg2 = NCRCFG2_SCSI2; + NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); + sc->sc_cfg3 = 0; + NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); + sc->sc_cfg3 = (NCRCFG3_CDB | NCRCFG3_FCLK); + NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); + if (NCR_READ_REG(sc, NCR_CFG3) != + (NCRCFG3_CDB | NCRCFG3_FCLK)) { + sc->sc_rev = NCR_VARIANT_ESP100A; + } else { + /* NCRCFG2_FE enables > 64K transfers */ + sc->sc_cfg2 |= NCRCFG2_FE; + sc->sc_cfg3 = 0; + NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); + sc->sc_rev = NCR_VARIANT_ESP200; + } + } + + /* + * XXX minsync and maxxfer _should_ be set up in MI code, + * XXX but it appears to have some dependency on what sort + * XXX of DMA we're hooked up to, etc. + */ /* * This is the value used to start sync negotiations - * Note that the ESP register "SYNCTP" is programmed + * Note that the NCR register "SYNCTP" is programmed * in "clocks per byte", and has a minimum value of 4. * The SCSI period used in negotiation is one-fourth * of the time (in nanoseconds) needed to transfer one byte. @@ -280,1739 +278,123 @@ espattach(parent, self, aux) * in config register 3... */ switch (sc->sc_rev) { - case ESP100: - sc->sc_maxxfer = 64 * 1024; + case NCR_VARIANT_ESP100: + sc->sc_maxxfer = 64 * 1024; sc->sc_minsync = 0; /* No synch on old chip? */ break; - case ESP100A: + + case NCR_VARIANT_ESP100A: sc->sc_maxxfer = 64 * 1024; - sc->sc_minsync = esp_cpb2stp(sc, 5); /* Min clocks/byte is 5 */ + /* Min clocks/byte is 5 */ + sc->sc_minsync = ncr53c9x_cpb2stp(sc, 5); break; - case ESP200: + + case NCR_VARIANT_ESP200: sc->sc_maxxfer = 16 * 1024 * 1024; /* XXX - do actually set FAST* bits */ + break; } - sc->sc_ccf = FREQTOCCF(sc->sc_freq); - - /* The value *must not* be == 1. Make it 2 */ - if (sc->sc_ccf == 1) - sc->sc_ccf = 2; - - /* - * The recommended timeout is 250ms. This register is loaded - * with a value calculated as follows, from the docs: - * - * (timout period) x (CLK frequency) - * reg = ------------------------------------- - * 8192 x (Clock Conversion Factor) - * - * Since CCF has a linear relation to CLK, this generally computes - * to the constant of 153. - */ - sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf); - - /* CCF register only has 3 bits; 0 is actually 8 */ - sc->sc_ccf &= 7; - - /* Reset state & bus */ - sc->sc_state = 0; - esp_init(sc, 1); - /* and the interuppts */ - isr_add_autovect((isr_func_t) espintr, (void *) sc, ca->ca_intpri); + isr_add_autovect((void*)ncr53c9x_intr, sc, ca->ca_intpri); evcnt_attach(&sc->sc_dev, "intr", &sc->sc_intrcnt); - /* - * fill in the prototype scsi_link. - */ - sc->sc_link.channel = SCSI_CHANNEL_ONLY_ONE; - sc->sc_link.adapter_softc = sc; - sc->sc_link.adapter_target = sc->sc_id; - sc->sc_link.adapter = &esp_switch; - sc->sc_link.device = &esp_dev; - sc->sc_link.openings = 2; - sc->sc_link.max_target = 7; - - /* - * Now try to attach all the sub-devices - */ - config_found(self, &sc->sc_link, scsiprint); + /* Do the common parts of attachment. */ + ncr53c9x_attach(sc, &esp_switch, &esp_dev); } -/* - * End of machine-dependent section - */ /* - * This is the generic esp reset function. It does not reset the SCSI bus, - * only this controllers, but kills any on-going commands, and also stops - * and resets the DMA. - * - * After reset, registers are loaded with the defaults from the attach - * routine above. + * Glue functions. */ -void -esp_reset(sc) - struct esp_softc *sc; + +u_char +esp_read_reg(sc, reg) + struct ncr53c9x_softc *sc; + int reg; { + struct esp_softc *esc = (struct esp_softc *)sc; - /* reset DMA first */ - DMA_RESET(sc->sc_dma); - - /* reset SCSI chip */ - ESPCMD(sc, ESPCMD_RSTCHIP); - ESPCMD(sc, ESPCMD_NOP); - DELAY(500); - - /* do these backwards, and fall through */ - switch (sc->sc_rev) { - case ESP200: - ESP_WRITE_REG(sc, ESP_CFG3, sc->sc_cfg3); - case ESP100A: - ESP_WRITE_REG(sc, ESP_CFG2, sc->sc_cfg2); - case ESP100: - ESP_WRITE_REG(sc, ESP_CFG1, sc->sc_cfg1); - ESP_WRITE_REG(sc, ESP_CCF, sc->sc_ccf); - ESP_WRITE_REG(sc, ESP_SYNCOFF, 0); - ESP_WRITE_REG(sc, ESP_TIMEOUT, sc->sc_timeout); - break; - default: - printf("%s: unknown revision code, assuming ESP100\n", - sc->sc_dev.dv_xname); - ESP_WRITE_REG(sc, ESP_CFG1, sc->sc_cfg1); - ESP_WRITE_REG(sc, ESP_CCF, sc->sc_ccf); - ESP_WRITE_REG(sc, ESP_SYNCOFF, 0); - ESP_WRITE_REG(sc, ESP_TIMEOUT, sc->sc_timeout); - } -} - -/* - * Reset the SCSI bus, but not the chip - */ -void -esp_scsi_reset(sc) - struct esp_softc *sc; -{ - /* stop DMA first, as the chip will return to Bus Free phase */ - DMACSR(sc->sc_dma) &= ~D_EN_DMA; - - printf("esp: resetting SCSI bus\n"); - ESPCMD(sc, ESPCMD_RSTSCSI); -} - -/* - * Initialize esp state machine - */ -void -esp_init(sc, doreset) - struct esp_softc *sc; - int doreset; -{ - struct esp_ecb *ecb; - int r; - - ESP_TRACE(("[ESP_INIT(%d)] ", doreset)); - - if (sc->sc_state == 0) { - /* First time through; initialize. */ - TAILQ_INIT(&sc->ready_list); - TAILQ_INIT(&sc->nexus_list); - TAILQ_INIT(&sc->free_list); - sc->sc_nexus = NULL; - ecb = sc->sc_ecb; - bzero(ecb, sizeof(sc->sc_ecb)); - for (r = 0; r < sizeof(sc->sc_ecb) / sizeof(*ecb); r++) { - TAILQ_INSERT_TAIL(&sc->free_list, ecb, chain); - ecb++; - } - bzero(sc->sc_tinfo, sizeof(sc->sc_tinfo)); - } else { - /* Cancel any active commands. */ - sc->sc_state = ESP_CLEANING; - if ((ecb = sc->sc_nexus) != NULL) { - ecb->xs->error = XS_DRIVER_STUFFUP; - untimeout(esp_timeout, ecb); - esp_done(sc, ecb); - } - while ((ecb = sc->nexus_list.tqh_first) != NULL) { - ecb->xs->error = XS_DRIVER_STUFFUP; - untimeout(esp_timeout, ecb); - esp_done(sc, ecb); - } - } - - /* - * reset the chip to a known state - */ - esp_reset(sc); - - sc->sc_phase = sc->sc_prevphase = INVALID_PHASE; - for (r = 0; r < 8; r++) { - struct esp_tinfo *ti = &sc->sc_tinfo[r]; -/* XXX - config flags per target: low bits: no reselect; high bits: no synch */ - int fl = sc->sc_dev.dv_cfdata->cf_flags; - - ti->flags = ((sc->sc_minsync && !(fl & (1<<(r+8)))) - ? T_NEGOTIATE : 0) | - ((fl & (1<period = sc->sc_minsync; - ti->offset = 0; - } - - if (doreset) { - sc->sc_state = ESP_SBR; - ESPCMD(sc, ESPCMD_RSTSCSI); - } else { - sc->sc_state = ESP_IDLE; - } -} - -/* - * Read the ESP registers, and save their contents for later use. - * ESP_STAT, ESP_STEP & ESP_INTR are mostly zeroed out when reading - * ESP_INTR - so make sure it is the last read. - * - * I think that (from reading the docs) most bits in these registers - * only make sense when he DMA CSR has an interrupt showing. Call only - * if an interrupt is pending. - */ -void -espreadregs(sc) - struct esp_softc *sc; -{ - - sc->sc_espstat = ESP_READ_REG(sc, ESP_STAT); - /* Only the stepo bits are of interest */ - sc->sc_espstep = ESP_READ_REG(sc, ESP_STEP) & ESPSTEP_MASK; - sc->sc_espintr = ESP_READ_REG(sc, ESP_INTR); - - /* - * Determine the SCSI bus phase, return either a real SCSI bus phase - * or some pseudo phase we use to detect certain exceptions. - */ - - sc->sc_phase = (sc->sc_espintr & ESPINTR_DIS) - ? /* Disconnected */ BUSFREE_PHASE - : sc->sc_espstat & ESPSTAT_PHASE; - - ESP_MISC(("regs[intr=%02x,stat=%02x,step=%02x] ", - sc->sc_espintr, sc->sc_espstat, sc->sc_espstep)); -} - -/* - * Convert chip register Clock Per Byte value to Synchronous Transfer Period. - */ -static inline int -esp_cpb2stp(sc, cpb) - struct esp_softc *sc; - int cpb; -{ - return ((250 * cpb) / sc->sc_freq); -} - -/* - * Convert Synchronous Transfer Period to chip register Clock Per Byte value. - */ -static inline int -esp_stp2cpb(sc, period) - struct esp_softc *sc; - int period; -{ - int v; - v = (sc->sc_freq * period) / 250; - if (esp_cpb2stp(sc, v) < period) - /* Correct round-down error */ - v++; - return v; -} - -static inline void -esp_setsync(sc, ti) - struct esp_softc *sc; - struct esp_tinfo *ti; -{ - - if (ti->flags & T_SYNCMODE) { - ESP_WRITE_REG(sc, ESP_SYNCOFF, ti->offset); - ESP_WRITE_REG(sc, ESP_SYNCTP, esp_stp2cpb(sc, ti->period)); - } else { - ESP_WRITE_REG(sc, ESP_SYNCOFF, 0); - ESP_WRITE_REG(sc, ESP_SYNCTP, 0); - } -} - -/* - * Send a command to a target, set the driver state to ESP_SELECTING - * and let the caller take care of the rest. - * - * Keeping this as a function allows me to say that this may be done - * by DMA instead of programmed I/O soon. - */ -void -esp_select(sc, ecb) - struct esp_softc *sc; - struct esp_ecb *ecb; -{ - struct scsi_link *sc_link = ecb->xs->sc_link; - int target = sc_link->target; - struct esp_tinfo *ti = &sc->sc_tinfo[target]; - u_char *cmd; - int clen; - - ESP_TRACE(("[esp_select(t%d,l%d,cmd:%x)] ", sc_link->target, sc_link->lun, ecb->cmd.opcode)); - - /* new state ESP_SELECTING */ - sc->sc_state = ESP_SELECTING; - - ESPCMD(sc, ESPCMD_FLUSH); - - /* - * The docs say the target register is never reset, and I - * can't think of a better place to set it - */ - ESP_WRITE_REG(sc, ESP_SELID, target); - esp_setsync(sc, ti); - - /* - * Who am I. This is where we tell the target that we are - * happy for it to disconnect etc. - */ - ESP_WRITE_REG(sc, ESP_FIFO, - MSG_IDENTIFY(sc_link->lun, (ti->flags & T_RSELECTOFF)?0:1)); - - if (ti->flags & T_NEGOTIATE) { - /* Arbitrate, select and stop after IDENTIFY message */ - ESPCMD(sc, ESPCMD_SELATNS); - return; - } - - /* Now the command into the FIFO */ - cmd = (u_char *)&ecb->cmd; - clen = ecb->clen; - while (clen--) - ESP_WRITE_REG(sc, ESP_FIFO, *cmd++); - - /* And get the targets attention */ - ESPCMD(sc, ESPCMD_SELATN); + return (esc->sc_reg[reg * 4]); } void -esp_free_ecb(sc, ecb, flags) - struct esp_softc *sc; - struct esp_ecb *ecb; - int flags; +esp_write_reg(sc, reg, val) + struct ncr53c9x_softc *sc; + int reg; + u_char val; { - int s; + struct esp_softc *esc = (struct esp_softc *)sc; + u_char v = val; - s = splbio(); - - ecb->flags = 0; - TAILQ_INSERT_HEAD(&sc->free_list, ecb, chain); - - /* - * If there were none, wake anybody waiting for one to come free, - * starting with queued entries. - */ - if (ecb->chain.tqe_next == 0) - wakeup(&sc->free_list); - - splx(s); + esc->sc_reg[reg * 4] = v; } -struct esp_ecb * -esp_get_ecb(sc, flags) - struct esp_softc *sc; - int flags; -{ - struct esp_ecb *ecb; - int s; - - s = splbio(); - - while ((ecb = sc->free_list.tqh_first) == NULL && - (flags & SCSI_NOSLEEP) == 0) - tsleep(&sc->free_list, PRIBIO, "especb", 0); - if (ecb) { - TAILQ_REMOVE(&sc->free_list, ecb, chain); - ecb->flags |= ECB_ALLOC; - } - - splx(s); - return ecb; -} - -/* - * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS - */ - -/* - * Start a SCSI-command - * This function is called by the higher level SCSI-driver to queue/run - * SCSI-commands. - */ -int -esp_scsi_cmd(xs) - struct scsi_xfer *xs; -{ - struct scsi_link *sc_link = xs->sc_link; - struct esp_softc *sc = sc_link->adapter_softc; - struct esp_ecb *ecb; - int s, flags; - - ESP_TRACE(("[esp_scsi_cmd] ")); - ESP_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, - sc_link->target)); - - flags = xs->flags; - if ((ecb = esp_get_ecb(sc, flags)) == NULL) { - xs->error = XS_DRIVER_STUFFUP; - return TRY_AGAIN_LATER; - } - - /* Initialize ecb */ - ecb->xs = xs; - ecb->timeout = xs->timeout; - - if (xs->flags & SCSI_RESET) { - ecb->flags |= ECB_RESET; - ecb->clen = 0; - ecb->dleft = 0; - } else { - bcopy(xs->cmd, &ecb->cmd, xs->cmdlen); - ecb->clen = xs->cmdlen; - ecb->daddr = xs->data; - ecb->dleft = xs->datalen; - } - ecb->stat = 0; - - s = splbio(); - - TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain); - if (sc->sc_state == ESP_IDLE) - esp_sched(sc); - - splx(s); - - if ((flags & SCSI_POLL) == 0) - return SUCCESSFULLY_QUEUED; - - /* Not allowed to use interrupts, use polling instead */ - if (esp_poll(sc, xs, ecb->timeout)) { - esp_timeout(ecb); - if (esp_poll(sc, xs, ecb->timeout)) - esp_timeout(ecb); - } - return COMPLETE; -} - -/* - * Used when interrupt driven I/O isn't allowed, e.g. during boot. - */ -int -esp_poll(sc, xs, count) - struct esp_softc *sc; - struct scsi_xfer *xs; - int count; -{ - - ESP_TRACE(("[esp_poll] ")); - while (count) { - if (DMA_ISINTR(sc->sc_dma)) { - espintr(sc); - } -#if alternatively - if (ESP_READ_REG(sc, ESP_STAT) & ESPSTAT_INT) - espintr(sc); -#endif - if ((xs->flags & ITSDONE) != 0) - return 0; - if (sc->sc_state == ESP_IDLE) { - ESP_TRACE(("[esp_poll: rescheduling] ")); - esp_sched(sc); - } - DELAY(1000); - count--; - } - return 1; -} - - -/* - * LOW LEVEL SCSI UTILITIES - */ - -/* - * Schedule a scsi operation. This has now been pulled out of the interrupt - * handler so that we may call it from esp_scsi_cmd and esp_done. This may - * save us an unecessary interrupt just to get things going. Should only be - * called when state == ESP_IDLE and at bio pl. - */ -void -esp_sched(sc) - struct esp_softc *sc; -{ - struct esp_ecb *ecb; - struct scsi_link *sc_link; - struct esp_tinfo *ti; - - ESP_TRACE(("[esp_sched] ")); - if (sc->sc_state != ESP_IDLE) - panic("esp_sched: not IDLE (state=%d)", sc->sc_state); - - /* - * Find first ecb in ready queue that is for a target/lunit - * combinations that is not busy. - */ - for (ecb = sc->ready_list.tqh_first; ecb; ecb = ecb->chain.tqe_next) { - sc_link = ecb->xs->sc_link; - ti = &sc->sc_tinfo[sc_link->target]; - if ((ti->lubusy & (1 << sc_link->lun)) == 0) { - TAILQ_REMOVE(&sc->ready_list, ecb, chain); - sc->sc_nexus = ecb; - esp_select(sc, ecb); - break; - } else - ESP_MISC(("%d:%d busy\n", - sc_link->target, sc_link->lun)); - } -} - -void -esp_sense(sc, ecb) - struct esp_softc *sc; - struct esp_ecb *ecb; -{ - struct scsi_xfer *xs = ecb->xs; - struct scsi_link *sc_link = xs->sc_link; - struct esp_tinfo *ti = &sc->sc_tinfo[sc_link->target]; - struct scsi_sense *ss = (void *)&ecb->cmd; - - ESP_MISC(("requesting sense ")); - /* Next, setup a request sense command block */ - bzero(ss, sizeof(*ss)); - ss->opcode = REQUEST_SENSE; - ss->byte2 = sc_link->lun << 5; - ss->length = sizeof(struct scsi_sense_data); - ecb->clen = sizeof(*ss); - ecb->daddr = (char *)&xs->sense; - ecb->dleft = sizeof(struct scsi_sense_data); - ecb->flags |= ECB_SENSE; - ti->senses++; - if (ecb->flags & ECB_NEXUS) - ti->lubusy &= ~(1 << sc_link->lun); - if (ecb == sc->sc_nexus) { - esp_select(sc, ecb); - } else { - esp_dequeue(sc, ecb); - TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); - if (sc->sc_state == ESP_IDLE) - esp_sched(sc); - } -} - -/* - * POST PROCESSING OF SCSI_CMD (usually current) - */ -void -esp_done(sc, ecb) - struct esp_softc *sc; - struct esp_ecb *ecb; -{ - struct scsi_xfer *xs = ecb->xs; - struct scsi_link *sc_link = xs->sc_link; - struct esp_tinfo *ti = &sc->sc_tinfo[sc_link->target]; - - ESP_TRACE(("[esp_done(error:%x)] ", xs->error)); - - /* - * Now, if we've come here with no error code, i.e. we've kept the - * initial XS_NOERROR, and the status code signals that we should - * check sense, we'll need to set up a request sense cmd block and - * push the command back into the ready queue *before* any other - * commands for this target/lunit, else we lose the sense info. - * We don't support chk sense conditions for the request sense cmd. - */ - if (xs->error == XS_NOERROR) { - if ((ecb->flags & ECB_ABORT) != 0) { - xs->error = XS_DRIVER_STUFFUP; - } else if ((ecb->flags & ECB_SENSE) != 0) { - xs->error = XS_SENSE; - } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) { - /* First, save the return values */ - xs->resid = ecb->dleft; - xs->status = ecb->stat; - esp_sense(sc, ecb); - return; - } else { - xs->resid = ecb->dleft; - } - } - - xs->flags |= ITSDONE; - -#ifdef ESP_DEBUG - if (esp_debug & ESP_SHOWMISC) { - if (xs->resid != 0) - printf("resid=%d ", xs->resid); - if (xs->error == XS_SENSE) - printf("sense=0x%02x\n", xs->sense.error_code); - else - printf("error=%d\n", xs->error); - } -#endif - - /* - * Remove the ECB from whatever queue it's on. - */ - if (ecb->flags & ECB_NEXUS) - ti->lubusy &= ~(1 << sc_link->lun); - if (ecb == sc->sc_nexus) { - sc->sc_nexus = NULL; - sc->sc_state = ESP_IDLE; - esp_sched(sc); - } else - esp_dequeue(sc, ecb); - - esp_free_ecb(sc, ecb, xs->flags); - ti->cmds++; - scsi_done(xs); -} - -void -esp_dequeue(sc, ecb) - struct esp_softc *sc; - struct esp_ecb *ecb; -{ - - if (ecb->flags & ECB_NEXUS) { - TAILQ_REMOVE(&sc->nexus_list, ecb, chain); - } else { - TAILQ_REMOVE(&sc->ready_list, ecb, chain); - } -} - -/* - * INTERRUPT/PROTOCOL ENGINE - */ - -/* - * Schedule an outgoing message by prioritizing it, and asserting - * attention on the bus. We can only do this when we are the initiator - * else there will be an illegal command interrupt. - */ -#define esp_sched_msgout(m) \ - do { \ - ESP_MISC(("esp_sched_msgout %d ", m)); \ - ESPCMD(sc, ESPCMD_SETATN); \ - sc->sc_flags |= ESP_ATN; \ - sc->sc_msgpriq |= (m); \ - } while (0) - int -esp_reselect(sc, message) - struct esp_softc *sc; - int message; +esp_dma_isintr(sc) + struct ncr53c9x_softc *sc; { - u_char selid, target, lun; - struct esp_ecb *ecb; - struct scsi_link *sc_link; - struct esp_tinfo *ti; + struct esp_softc *esc = (struct esp_softc *)sc; - /* - * The SCSI chip made a snapshot of the data bus while the reselection - * was being negotiated. This enables us to determine which target did - * the reselect. - */ - selid = sc->sc_selid & ~(1 << sc->sc_id); - if (selid & (selid - 1)) { - printf("%s: reselect with invalid selid %02x; sending DEVICE RESET\n", - sc->sc_dev.dv_xname, selid); - goto reset; - } - - /* - * Search wait queue for disconnected cmd - * The list should be short, so I haven't bothered with - * any more sophisticated structures than a simple - * singly linked list. - */ - target = ffs(selid) - 1; - lun = message & 0x07; - for (ecb = sc->nexus_list.tqh_first; ecb != NULL; - ecb = ecb->chain.tqe_next) { - sc_link = ecb->xs->sc_link; - if (sc_link->target == target && sc_link->lun == lun) - break; - } - if (ecb == NULL) { - printf("%s: reselect from target %d lun %d with no nexus; sending ABORT\n", - sc->sc_dev.dv_xname, target, lun); - goto abort; - } - - /* Make this nexus active again. */ - TAILQ_REMOVE(&sc->nexus_list, ecb, chain); - sc->sc_state = ESP_CONNECTED; - sc->sc_nexus = ecb; - ti = &sc->sc_tinfo[target]; - ti->lubusy |= (1 << lun); - esp_setsync(sc, ti); - - if (ecb->flags & ECB_RESET) - esp_sched_msgout(SEND_DEV_RESET); - else if (ecb->flags & ECB_ABORT) - esp_sched_msgout(SEND_ABORT); - - /* Do an implicit RESTORE POINTERS. */ - sc->sc_dp = ecb->daddr; - sc->sc_dleft = ecb->dleft; - - return (0); - -reset: - esp_sched_msgout(SEND_DEV_RESET); - return (1); - -abort: - esp_sched_msgout(SEND_ABORT); - return (1); + return (dma_isintr(esc->sc_dma)); } -#define IS1BYTEMSG(m) (((m) != 1 && (m) < 0x20) || (m) & 0x80) -#define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20) -#define ISEXTMSG(m) ((m) == 1) - -/* - * Get an incoming message as initiator. - * - * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a - * byte in the FIFO - */ void -esp_msgin(sc) - register struct esp_softc *sc; +esp_dma_reset(sc) + struct ncr53c9x_softc *sc; { - register int v; + struct esp_softc *esc = (struct esp_softc *)sc; - ESP_TRACE(("[esp_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen)); - - if ((ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) == 0) { - printf("%s: msgin: no msg byte available\n", - sc->sc_dev.dv_xname); - return; - } - - /* - * Prepare for a new message. A message should (according - * to the SCSI standard) be transmitted in one single - * MESSAGE_IN_PHASE. If we have been in some other phase, - * then this is a new message. - */ - if (sc->sc_prevphase != MESSAGE_IN_PHASE) { - sc->sc_flags &= ~ESP_DROP_MSGI; - sc->sc_imlen = 0; - } - - v = ESP_READ_REG(sc, ESP_FIFO); - ESP_MISC(("", v)); - -#if 0 - if (sc->sc_state == ESP_RESELECTED && sc->sc_imlen == 0) { - /* - * Which target is reselecting us? (The ID bit really) - */ - sc->sc_selid = v; - ESP_MISC(("selid=0x%2x ", sc->sc_selid)); - return; - } -#endif - - sc->sc_imess[sc->sc_imlen] = v; - - /* - * If we're going to reject the message, don't bother storing - * the incoming bytes. But still, we need to ACK them. - */ - - if ((sc->sc_flags & ESP_DROP_MSGI)) { - ESPCMD(sc, ESPCMD_MSGOK); - printf("", - sc->sc_imess[sc->sc_imlen]); - return; - } - - if (sc->sc_imlen >= ESP_MAX_MSG_LEN) { - esp_sched_msgout(SEND_REJECT); - sc->sc_flags |= ESP_DROP_MSGI; - } else { - sc->sc_imlen++; - /* - * This testing is suboptimal, but most - * messages will be of the one byte variety, so - * it should not effect performance - * significantly. - */ - if (sc->sc_imlen == 1 && IS1BYTEMSG(sc->sc_imess[0])) - goto gotit; - if (sc->sc_imlen == 2 && IS2BYTEMSG(sc->sc_imess[0])) - goto gotit; - if (sc->sc_imlen >= 3 && ISEXTMSG(sc->sc_imess[0]) && - sc->sc_imlen == sc->sc_imess[1] + 2) - goto gotit; - } - /* Ack what we have so far */ - ESPCMD(sc, ESPCMD_MSGOK); - return; - -gotit: - ESP_MSGS(("gotmsg(%x)", sc->sc_imess[0])); - /* - * Now we should have a complete message (1 byte, 2 byte - * and moderately long extended messages). We only handle - * extended messages which total length is shorter than - * ESP_MAX_MSG_LEN. Longer messages will be amputated. - */ - switch (sc->sc_state) { - struct esp_ecb *ecb; - struct esp_tinfo *ti; - - case ESP_CONNECTED: - ecb = sc->sc_nexus; - ti = &sc->sc_tinfo[ecb->xs->sc_link->target]; - - switch (sc->sc_imess[0]) { - case MSG_CMDCOMPLETE: - ESP_MSGS(("cmdcomplete ")); - if (sc->sc_dleft < 0) { - struct scsi_link *sc_link = ecb->xs->sc_link; - printf("%s: %ld extra bytes from %d:%d\n", - sc->sc_dev.dv_xname, -(long)sc->sc_dleft, - sc_link->target, sc_link->lun); - sc->sc_dleft = 0; - } - ecb->xs->resid = ecb->dleft = sc->sc_dleft; - sc->sc_state = ESP_CMDCOMPLETE; - break; - - case MSG_MESSAGE_REJECT: - if (esp_debug & ESP_SHOWMSGS) - printf("%s: our msg rejected by target\n", - sc->sc_dev.dv_xname); - switch (sc->sc_msgout) { - case SEND_SDTR: - sc->sc_flags &= ~ESP_SYNCHNEGO; - ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); - esp_setsync(sc, ti); - break; - case SEND_INIT_DET_ERR: - goto abort; - } - break; - - case MSG_NOOP: - ESP_MSGS(("noop ")); - break; - - case MSG_DISCONNECT: - ESP_MSGS(("disconnect ")); - ti->dconns++; - sc->sc_state = ESP_DISCONNECT; - if ((ecb->xs->sc_link->quirks & SDEV_AUTOSAVE) == 0) - break; - /*FALLTHROUGH*/ - - case MSG_SAVEDATAPOINTER: - ESP_MSGS(("save datapointer ")); - ecb->daddr = sc->sc_dp; - ecb->dleft = sc->sc_dleft; - break; - - case MSG_RESTOREPOINTERS: - ESP_MSGS(("restore datapointer ")); - sc->sc_dp = ecb->daddr; - sc->sc_dleft = ecb->dleft; - break; - - case MSG_EXTENDED: - ESP_MSGS(("extended(%x) ", sc->sc_imess[2])); - switch (sc->sc_imess[2]) { - case MSG_EXT_SDTR: - ESP_MSGS(("SDTR period %d, offset %d ", - sc->sc_imess[3], sc->sc_imess[4])); - if (sc->sc_imess[1] != 3) - goto reject; - ti->period = sc->sc_imess[3]; - ti->offset = sc->sc_imess[4]; - ti->flags &= ~T_NEGOTIATE; - if (sc->sc_minsync == 0 || - ti->offset == 0 || - ti->period > 124) { - printf("%s:%d: async\n", "esp", - ecb->xs->sc_link->target); - if ((sc->sc_flags&ESP_SYNCHNEGO) == 0) { - /* target initiated negotiation */ - ti->offset = 0; - ti->flags &= ~T_SYNCMODE; - esp_sched_msgout(SEND_SDTR); - } else { - /* we are async */ - ti->flags &= ~T_SYNCMODE; - } - } else { - int r = 250/ti->period; - int s = (100*250)/ti->period - 100*r; - int p; - - p = esp_stp2cpb(sc, ti->period); - ti->period = esp_cpb2stp(sc, p); -#ifdef ESP_DEBUG - sc_print_addr(ecb->xs->sc_link); - printf("max sync rate %d.%02dMb/s\n", - r, s); -#endif - if ((sc->sc_flags&ESP_SYNCHNEGO) == 0) { - /* target initiated negotiation */ - if (ti->period < sc->sc_minsync) - ti->period = sc->sc_minsync; - if (ti->offset > 15) - ti->offset = 15; - ti->flags &= ~T_SYNCMODE; - esp_sched_msgout(SEND_SDTR); - } else { - /* we are sync */ - ti->flags |= T_SYNCMODE; - } - } - sc->sc_flags &= ~ESP_SYNCHNEGO; - esp_setsync(sc, ti); - break; - - default: - printf("%s: unrecognized MESSAGE EXTENDED; sending REJECT\n", - sc->sc_dev.dv_xname); - goto reject; - } - break; - - default: - ESP_MSGS(("ident ")); - printf("%s: unrecognized MESSAGE; sending REJECT\n", - sc->sc_dev.dv_xname); - reject: - esp_sched_msgout(SEND_REJECT); - break; - } - break; - - case ESP_RESELECTED: - if (!MSG_ISIDENTIFY(sc->sc_imess[0])) { - printf("%s: reselect without IDENTIFY; sending DEVICE RESET\n", - sc->sc_dev.dv_xname); - goto reset; - } - - (void) esp_reselect(sc, sc->sc_imess[0]); - break; - - default: - printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", - sc->sc_dev.dv_xname); - reset: - esp_sched_msgout(SEND_DEV_RESET); - break; - - abort: - esp_sched_msgout(SEND_ABORT); - break; - } - - /* Ack last message byte */ - ESPCMD(sc, ESPCMD_MSGOK); - - /* Done, reset message pointer. */ - sc->sc_flags &= ~ESP_DROP_MSGI; - sc->sc_imlen = 0; + dma_reset(esc->sc_dma); } - -/* - * Send the highest priority, scheduled message - */ -void -esp_msgout(sc) - register struct esp_softc *sc; -{ - struct esp_tinfo *ti; - struct esp_ecb *ecb; - size_t size; - - ESP_TRACE(("[esp_msgout(priq:%x, prevphase:%x)]", sc->sc_msgpriq, sc->sc_prevphase)); - - if (sc->sc_flags & ESP_ATN) { - if (sc->sc_prevphase != MESSAGE_OUT_PHASE) { - new: - ESPCMD(sc, ESPCMD_FLUSH); - DELAY(1); - sc->sc_msgoutq = 0; - sc->sc_omlen = 0; - } - } else { - if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { - esp_sched_msgout(sc->sc_msgoutq); - goto new; - } else { - printf("esp at line %d: unexpected MESSAGE OUT phase\n", __LINE__); - } - } - - if (sc->sc_omlen == 0) { - /* Pick up highest priority message */ - sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq; - sc->sc_msgoutq |= sc->sc_msgout; - sc->sc_msgpriq &= ~sc->sc_msgout; - sc->sc_omlen = 1; /* "Default" message len */ - switch (sc->sc_msgout) { - case SEND_SDTR: - ecb = sc->sc_nexus; - ti = &sc->sc_tinfo[ecb->xs->sc_link->target]; - sc->sc_omess[0] = MSG_EXTENDED; - sc->sc_omess[1] = 3; - sc->sc_omess[2] = MSG_EXT_SDTR; - sc->sc_omess[3] = ti->period; - sc->sc_omess[4] = ti->offset; - sc->sc_omlen = 5; - if ((sc->sc_flags & ESP_SYNCHNEGO) == 0) { - ti->flags |= T_SYNCMODE; - esp_setsync(sc, ti); - } - break; - case SEND_IDENTIFY: - if (sc->sc_state != ESP_CONNECTED) { - printf("esp at line %d: no nexus\n", __LINE__); - } - ecb = sc->sc_nexus; - sc->sc_omess[0] = MSG_IDENTIFY(ecb->xs->sc_link->lun,0); - break; - case SEND_DEV_RESET: - sc->sc_flags |= ESP_ABORTING; - sc->sc_omess[0] = MSG_BUS_DEV_RESET; - ecb = sc->sc_nexus; - ti = &sc->sc_tinfo[ecb->xs->sc_link->target]; - ti->flags &= ~T_SYNCMODE; - ti->flags |= T_NEGOTIATE; - break; - case SEND_PARITY_ERROR: - sc->sc_omess[0] = MSG_PARITY_ERROR; - break; - case SEND_ABORT: - sc->sc_flags |= ESP_ABORTING; - sc->sc_omess[0] = MSG_ABORT; - break; - case SEND_INIT_DET_ERR: - sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; - break; - case SEND_REJECT: - sc->sc_omess[0] = MSG_MESSAGE_REJECT; - break; - default: - ESPCMD(sc, ESPCMD_RSTATN); - sc->sc_flags &= ~ESP_ATN; - sc->sc_omess[0] = MSG_NOOP; - break; - } - sc->sc_omp = sc->sc_omess; - } - -#if 1 - /* (re)send the message */ - size = min(sc->sc_omlen, sc->sc_maxxfer); - DMA_SETUP(sc->sc_dma, &sc->sc_omp, &sc->sc_omlen, 0, &size); - /* Program the SCSI counter */ - ESP_WRITE_REG(sc, ESP_TCL, size); - ESP_WRITE_REG(sc, ESP_TCM, size >> 8); - if (sc->sc_cfg2 & ESPCFG2_FE) { - ESP_WRITE_REG(sc, ESP_TCH, size >> 16); - } - /* load the count in */ - ESPCMD(sc, ESPCMD_NOP|ESPCMD_DMA); - ESPCMD(sc, ESPCMD_TRANS|ESPCMD_DMA); - DMA_GO(sc->sc_dma); -#else - { int i; - for (i = 0; i < sc->sc_omlen; i++) - ESP_WRITE_REG(sc, FIFO, sc->sc_omess[i]); - ESPCMD(sc, ESPCMD_TRANS); - sc->sc_omlen = 0; - } -#endif -} - -/* - * This is the most critical part of the driver, and has to know - * how to deal with *all* error conditions and phases from the SCSI - * bus. If there are no errors and the DMA was active, then call the - * DMA pseudo-interrupt handler. If this returns 1, then that was it - * and we can return from here without further processing. - * - * Most of this needs verifying. - */ int -espintr(sc) - register struct esp_softc *sc; +esp_dma_intr(sc) + struct ncr53c9x_softc *sc; { - register struct esp_ecb *ecb; - register struct scsi_link *sc_link; - struct esp_tinfo *ti; - int loop; - size_t size; + struct esp_softc *esc = (struct esp_softc *)sc; - ESP_TRACE(("[espintr]")); + return (espdmaintr(esc->sc_dma)); +} - /* - * I have made some (maybe seriously flawed) assumptions here, - * but basic testing (uncomment the printf() below), show that - * certainly something happens when this loop is here. - * - * The idea is that many of the SCSI operations take very little - * time, and going away and getting interrupted is too high an - * overhead to pay. For example, selecting, sending a message - * and command and then doing some work can be done in one "pass". - * - * The DELAY is not variable because I do not understand that the - * DELAY loop should be fixed-time regardless of CPU speed, but - * I am *assuming* that the faster SCSI processors get things done - * quicker (sending a command byte etc), and so there is no - * need to be too slow. - * - * This is a heuristic. It is 2 when at 20Mhz, 2 at 25Mhz and 1 - * at 40Mhz. This needs testing. - */ - for (loop = 0; 1;loop++, DELAY(50/sc->sc_freq)) { - /* a feeling of deja-vu */ - if (!DMA_ISINTR(sc->sc_dma)) - return (loop != 0); -#if 0 - if (loop) - printf("*"); -#endif +int +esp_dma_setup(sc, addr, len, datain, dmasize) + struct ncr53c9x_softc *sc; + caddr_t *addr; + size_t *len; + int datain; + size_t *dmasize; +{ + struct esp_softc *esc = (struct esp_softc *)sc; - /* and what do the registers say... */ - espreadregs(sc); - - sc->sc_intrcnt.ev_count++; - - /* - * At the moment, only a SCSI Bus Reset or Illegal - * Command are classed as errors. A disconnect is a - * valid condition, and we let the code check is the - * "ESP_BUSFREE_OK" flag was set before declaring it - * and error. - * - * Also, the status register tells us about "Gross - * Errors" and "Parity errors". Only the Gross Error - * is really bad, and the parity errors are dealt - * with later - * - * TODO - * If there are too many parity error, go to slow - * cable mode ? - */ - - /* SCSI Reset */ - if (sc->sc_espintr & ESPINTR_SBR) { - if (ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) { - ESPCMD(sc, ESPCMD_FLUSH); - DELAY(1); - } - if (sc->sc_state != ESP_SBR) { - printf("%s: SCSI bus reset\n", - sc->sc_dev.dv_xname); - esp_init(sc, 0); /* Restart everything */ - return 1; - } -#if 0 - /*XXX*/ printf("\n", - sc->sc_espintr, sc->sc_espstat, - sc->sc_espstep); -#endif - if (sc->sc_nexus) - panic("%s: nexus in reset state", - sc->sc_dev.dv_xname); - goto sched; - } - - ecb = sc->sc_nexus; - -#define ESPINTR_ERR (ESPINTR_SBR|ESPINTR_ILL) - if (sc->sc_espintr & ESPINTR_ERR || - sc->sc_espstat & ESPSTAT_GE) { - - if (sc->sc_espstat & ESPSTAT_GE) { - /* no target ? */ - if (ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) { - ESPCMD(sc, ESPCMD_FLUSH); - DELAY(1); - } - if (sc->sc_state == ESP_CONNECTED || - sc->sc_state == ESP_SELECTING) { - ecb->xs->error = XS_DRIVER_STUFFUP; - esp_done(sc, ecb); - } - return 1; - } - - if (sc->sc_espintr & ESPINTR_ILL) { - /* illegal command, out of sync ? */ - printf("%s: illegal command: 0x%x (state %d, phase %x, prevphase %x)\n", - sc->sc_dev.dv_xname, sc->sc_lastcmd, - sc->sc_state, sc->sc_phase, - sc->sc_prevphase); - if (ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) { - ESPCMD(sc, ESPCMD_FLUSH); - DELAY(1); - } - esp_init(sc, 0); /* Restart everything */ - return 1; - } - } - - /* - * Call if DMA is active. - * - * If DMA_INTR returns true, then maybe go 'round the loop - * again in case there is no more DMA queued, but a phase - * change is expected. - */ - if (DMA_ISACTIVE(sc->sc_dma)) { - int r = DMA_INTR(sc->sc_dma); - if (r == -1) { - printf("%s: DMA error; resetting\n", - sc->sc_dev.dv_xname); - esp_init(sc, 1); - } - /* If DMA active here, then go back to work... */ - if (DMA_ISACTIVE(sc->sc_dma)) - return 1; - - if (sc->sc_dleft == 0 && - (sc->sc_espstat & ESPSTAT_TC) == 0) - printf("%s: !TC [intr %x, stat %x, step %d]" - " prevphase %x, resid %x\n", - sc->sc_dev.dv_xname, - sc->sc_espintr, - sc->sc_espstat, - sc->sc_espstep, - sc->sc_prevphase, - ecb?ecb->dleft:-1); - } - -#if 0 /* Unreliable on some ESP revisions? */ - if ((sc->sc_espstat & ESPSTAT_INT) == 0) { - printf("%s: spurious interrupt\n", sc->sc_dev.dv_xname); - return 1; - } -#endif - - /* - * check for less serious errors - */ - if (sc->sc_espstat & ESPSTAT_PE) { - printf("%s: SCSI bus parity error\n", - sc->sc_dev.dv_xname); - if (sc->sc_prevphase == MESSAGE_IN_PHASE) - esp_sched_msgout(SEND_PARITY_ERROR); - else - esp_sched_msgout(SEND_INIT_DET_ERR); - } - - if (sc->sc_espintr & ESPINTR_DIS) { - ESP_MISC(("", - sc->sc_espintr,sc->sc_espstat,sc->sc_espstep)); - if (ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) { - ESPCMD(sc, ESPCMD_FLUSH); - DELAY(1); - } - /* - * This command must (apparently) be issued within - * 250mS of a disconnect. So here you are... - */ - ESPCMD(sc, ESPCMD_ENSEL); - switch (sc->sc_state) { - case ESP_RESELECTED: - goto sched; - - case ESP_SELECTING: - ecb->xs->error = XS_SELTIMEOUT; - goto finish; - - case ESP_CONNECTED: - if ((sc->sc_flags & ESP_SYNCHNEGO)) { -#ifdef ESP_DEBUG - if (ecb) - sc_print_addr(ecb->xs->sc_link); - printf("sync nego not completed!\n"); -#endif - ti = &sc->sc_tinfo[ecb->xs->sc_link->target]; - sc->sc_flags &= ~ESP_SYNCHNEGO; - ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); - } - - /* it may be OK to disconnect */ - if ((sc->sc_flags & ESP_ABORTING) == 0) { - /* - * Section 5.1.1 of the SCSI 2 spec - * suggests issuing a REQUEST SENSE - * following an unexpected disconnect. - * Some devices go into a contingent - * allegiance condition when - * disconnecting, and this is necessary - * to clean up their state. - */ - printf("%s: unexpected disconnect; ", - sc->sc_dev.dv_xname); - if (ecb->flags & ECB_SENSE) { - printf("resetting\n"); - goto reset; - } - printf("sending REQUEST SENSE\n"); - esp_sense(sc, ecb); - goto out; - } - - ecb->xs->error = XS_DRIVER_STUFFUP; - goto finish; - - case ESP_DISCONNECT: - TAILQ_INSERT_HEAD(&sc->nexus_list, ecb, chain); - sc->sc_nexus = NULL; - goto sched; - - case ESP_CMDCOMPLETE: - goto finish; - } - } - - switch (sc->sc_state) { - - case ESP_SBR: - printf("%s: waiting for SCSI Bus Reset to happen\n", - sc->sc_dev.dv_xname); - return 1; - - case ESP_RESELECTED: - /* - * we must be continuing a message ? - */ - if (sc->sc_phase != MESSAGE_IN_PHASE) { - printf("%s: target didn't identify\n", - sc->sc_dev.dv_xname); - esp_init(sc, 1); - return 1; - } -printf("<>"); -#if XXXX - esp_msgin(sc); - if (sc->sc_state != ESP_CONNECTED) { - /* IDENTIFY fail?! */ - printf("%s: identify failed\n", - sc->sc_dev.dv_xname); - esp_init(sc, 1); - return 1; - } -#endif - break; - - case ESP_IDLE: -if (sc->sc_flags & ESP_ICCS) printf("[[esp: BUMMER]]"); - case ESP_SELECTING: - sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0; - sc->sc_flags = 0; - - if (sc->sc_espintr & ESPINTR_RESEL) { - /* - * If we're trying to select a - * target ourselves, push our command - * back into the ready list. - */ - if (sc->sc_state == ESP_SELECTING) { - ESP_MISC(("backoff selector ")); - sc_link = sc->sc_nexus->xs->sc_link; - ti = &sc->sc_tinfo[sc_link->target]; - TAILQ_INSERT_HEAD(&sc->ready_list, - sc->sc_nexus, chain); - ecb = sc->sc_nexus = NULL; - } - sc->sc_state = ESP_RESELECTED; - if (sc->sc_phase != MESSAGE_IN_PHASE) { - /* - * Things are seriously fucked up. - * Pull the brakes, i.e. reset - */ - printf("%s: target didn't identify\n", - sc->sc_dev.dv_xname); - esp_init(sc, 1); - return 1; - } - if ((ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) != 2) { - printf("%s: RESELECT: %d bytes in FIFO!\n", - sc->sc_dev.dv_xname, - ESP_READ_REG(sc, ESP_FFLAG) & - ESPFIFO_FF); - esp_init(sc, 1); - return 1; - } - sc->sc_selid = ESP_READ_REG(sc, ESP_FIFO); - ESP_MISC(("selid=0x%2x ", sc->sc_selid)); - esp_msgin(sc); /* Handle identify message */ - if (sc->sc_state != ESP_CONNECTED) { - /* IDENTIFY fail?! */ - printf("%s: identify failed\n", - sc->sc_dev.dv_xname); - esp_init(sc, 1); - return 1; - } - continue; /* ie. next phase expected soon */ - } - -#define ESPINTR_DONE (ESPINTR_FC|ESPINTR_BS) - if ((sc->sc_espintr & ESPINTR_DONE) == ESPINTR_DONE) { - ecb = sc->sc_nexus; - if (!ecb) - panic("esp: not nexus at sc->sc_nexus"); - - sc_link = ecb->xs->sc_link; - ti = &sc->sc_tinfo[sc_link->target]; - - switch (sc->sc_espstep) { - case 0: - printf("%s: select timeout/no disconnect\n", - sc->sc_dev.dv_xname); - ecb->xs->error = XS_SELTIMEOUT; - goto finish; - case 1: - if ((ti->flags & T_NEGOTIATE) == 0) { - printf("%s: step 1 & !NEG\n", - sc->sc_dev.dv_xname); - goto reset; - } - if (sc->sc_phase != MESSAGE_OUT_PHASE) { - printf("%s: !MSGOUT\n", - sc->sc_dev.dv_xname); - goto reset; - } - /* Start negotiating */ - ti->period = sc->sc_minsync; - ti->offset = 15; - sc->sc_flags |= ESP_SYNCHNEGO; - esp_sched_msgout(SEND_SDTR); - break; - case 3: - /* - * Grr, this is supposed to mean - * "target left command phase - * prematurely". It seems to happen - * regularly when sync mode is on. - * Look at FIFO to see if command - * went out. - * (Timing problems?) - */ - if ((ESP_READ_REG(sc, ESP_FFLAG)&ESPFIFO_FF) == 0) { - /* Hope for the best.. */ - break; - } - printf("(%s:%d:%d): selection failed;" - " %d left in FIFO " - "[intr %x, stat %x, step %d]\n", - sc->sc_dev.dv_xname, - sc_link->target, - sc_link->lun, - ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF, - sc->sc_espintr, sc->sc_espstat, - sc->sc_espstep); - ESPCMD(sc, ESPCMD_FLUSH); - esp_sched_msgout(SEND_ABORT); - return 1; - case 2: - /* Select stuck at Command Phase */ - ESPCMD(sc, ESPCMD_FLUSH); - case 4: - /* So far, everything went fine */ - break; - } -#if 0 - if (ecb->xs->flags & SCSI_RESET) - esp_sched_msgout(SEND_DEV_RESET); - else if (ti->flags & T_NEGOTIATE) - esp_sched_msgout( - SEND_IDENTIFY | SEND_SDTR); - else - esp_sched_msgout(SEND_IDENTIFY); -#endif - - ecb->flags |= ECB_NEXUS; - ti->lubusy |= (1 << sc_link->lun); - - sc->sc_prevphase = INVALID_PHASE; /* ?? */ - /* Do an implicit RESTORE POINTERS. */ - sc->sc_dp = ecb->daddr; - sc->sc_dleft = ecb->dleft; - - /* On our first connection, schedule a timeout. */ - if ((ecb->xs->flags & SCSI_POLL) == 0) - timeout(esp_timeout, ecb, (ecb->timeout * hz) / 1000); - - sc->sc_state = ESP_CONNECTED; - break; - } else { - printf("%s: unexpected status after select" - ": [intr %x, stat %x, step %x]\n", - sc->sc_dev.dv_xname, - sc->sc_espintr, sc->sc_espstat, - sc->sc_espstep); - ESPCMD(sc, ESPCMD_FLUSH); - DELAY(1); - goto reset; - } - if (sc->sc_state == ESP_IDLE) { - printf("%s: stray interrupt\n", sc->sc_dev.dv_xname); - return 0; - } - break; - - case ESP_CONNECTED: - if (sc->sc_flags & ESP_ICCS) { - u_char msg; - - sc->sc_flags &= ~ESP_ICCS; - - if (!(sc->sc_espintr & ESPINTR_DONE)) { - printf("%s: ICCS: " - ": [intr %x, stat %x, step %x]\n", - sc->sc_dev.dv_xname, - sc->sc_espintr, sc->sc_espstat, - sc->sc_espstep); - } - if ((ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) != 2) { - int i = (ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) - 2; - while (i--) - (void) ESP_READ_REG(sc, ESP_FIFO); - } - ecb->stat = ESP_READ_REG(sc, ESP_FIFO); - msg = ESP_READ_REG(sc, ESP_FIFO); - ESP_PHASE(("", ecb->stat, msg)); - if (msg == MSG_CMDCOMPLETE) { - ecb->xs->resid = ecb->dleft = sc->sc_dleft; - sc->sc_state = ESP_CMDCOMPLETE; - } else - printf("%s: STATUS_PHASE: msg %d\n", - sc->sc_dev.dv_xname, msg); - ESPCMD(sc, ESPCMD_MSGOK); - continue; /* ie. wait for disconnect */ - } - break; - default: - panic("%s: invalid state: %d", - sc->sc_dev.dv_xname, - sc->sc_state); - } - - /* - * Driver is now in state ESP_CONNECTED, i.e. we - * have a current command working the SCSI bus. - */ - if (sc->sc_state != ESP_CONNECTED || ecb == NULL) { - panic("esp no nexus"); - } - - switch (sc->sc_phase) { - case MESSAGE_OUT_PHASE: - ESP_PHASE(("MESSAGE_OUT_PHASE ")); - esp_msgout(sc); - sc->sc_prevphase = MESSAGE_OUT_PHASE; - break; - case MESSAGE_IN_PHASE: - ESP_PHASE(("MESSAGE_IN_PHASE ")); - if (sc->sc_espintr & ESPINTR_BS) { - ESPCMD(sc, ESPCMD_FLUSH); - sc->sc_flags |= ESP_WAITI; - ESPCMD(sc, ESPCMD_TRANS); - } else if (sc->sc_espintr & ESPINTR_FC) { - if ((sc->sc_flags & ESP_WAITI) == 0) { - printf("%s: MSGIN: unexpected FC bit: " - "[intr %x, stat %x, step %x]\n", - sc->sc_dev.dv_xname, - sc->sc_espintr, sc->sc_espstat, - sc->sc_espstep); - } - sc->sc_flags &= ~ESP_WAITI; - esp_msgin(sc); - } else { - printf("%s: MSGIN: weird bits: " - "[intr %x, stat %x, step %x]\n", - sc->sc_dev.dv_xname, - sc->sc_espintr, sc->sc_espstat, - sc->sc_espstep); - } - sc->sc_prevphase = MESSAGE_IN_PHASE; - break; - case COMMAND_PHASE: { - /* well, this means send the command again */ - u_char *cmd = (u_char *)&ecb->cmd; - int i; - - ESP_PHASE(("COMMAND_PHASE 0x%02x (%d) ", - ecb->cmd.opcode, ecb->clen)); - if (ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) { - ESPCMD(sc, ESPCMD_FLUSH); - DELAY(1); - } - /* Now the command into the FIFO */ - for (i = 0; i < ecb->clen; i++) - ESP_WRITE_REG(sc, ESP_FIFO, *cmd++); - ESPCMD(sc, ESPCMD_TRANS); - sc->sc_prevphase = COMMAND_PHASE; - } - break; - case DATA_OUT_PHASE: - ESP_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft)); - ESPCMD(sc, ESPCMD_FLUSH); - size = min(sc->sc_dleft, sc->sc_maxxfer); - DMA_SETUP(sc->sc_dma, &sc->sc_dp, &sc->sc_dleft, - 0, &size); - sc->sc_prevphase = DATA_OUT_PHASE; - goto setup_xfer; - case DATA_IN_PHASE: - ESP_PHASE(("DATA_IN_PHASE ")); - if (sc->sc_rev == ESP100) - ESPCMD(sc, ESPCMD_FLUSH); - size = min(sc->sc_dleft, sc->sc_maxxfer); - DMA_SETUP(sc->sc_dma, &sc->sc_dp, &sc->sc_dleft, - 1, &size); - sc->sc_prevphase = DATA_IN_PHASE; - setup_xfer: - /* Program the SCSI counter */ - ESP_WRITE_REG(sc, ESP_TCL, size); - ESP_WRITE_REG(sc, ESP_TCM, size >> 8); - if (sc->sc_cfg2 & ESPCFG2_FE) { - ESP_WRITE_REG(sc, ESP_TCH, size >> 16); - } - /* load the count in */ - ESPCMD(sc, ESPCMD_NOP|ESPCMD_DMA); - - /* - * Note that if `size' is 0, we've already transceived - * all the bytes we want but we're still in DATA PHASE. - * Apparently, the device needs padding. Also, a - * transfer size of 0 means "maximum" to the chip - * DMA logic. - */ - ESPCMD(sc, - (size==0?ESPCMD_TRPAD:ESPCMD_TRANS)|ESPCMD_DMA); - DMA_GO(sc->sc_dma); - return 1; - case STATUS_PHASE: - ESP_PHASE(("STATUS_PHASE ")); - sc->sc_flags |= ESP_ICCS; - ESPCMD(sc, ESPCMD_ICCS); - sc->sc_prevphase = STATUS_PHASE; - break; - case INVALID_PHASE: - break; - default: - printf("%s: unexpected bus phase; resetting\n", - sc->sc_dev.dv_xname); - goto reset; - } - } - panic("esp: should not get here.."); - -reset: - esp_init(sc, 1); - return 1; - -finish: - untimeout(esp_timeout, ecb); - esp_done(sc, ecb); - goto out; - -sched: - sc->sc_state = ESP_IDLE; - esp_sched(sc); - goto out; - -out: - return 1; + return (dma_setup(esc->sc_dma, addr, len, datain, dmasize)); } void -esp_abort(sc, ecb) - struct esp_softc *sc; - struct esp_ecb *ecb; +esp_dma_go(sc) + struct ncr53c9x_softc *sc; { + struct esp_softc *esc = (struct esp_softc *)sc; - /* 2 secs for the abort */ - ecb->timeout = ESP_ABORT_TIMEOUT; - ecb->flags |= ECB_ABORT; - - if (ecb == sc->sc_nexus) { - /* - * If we're still selecting, the message will be scheduled - * after selection is complete. - */ - if (sc->sc_state == ESP_CONNECTED) - esp_sched_msgout(SEND_ABORT); - - /* - * Reschedule timeout. First, cancel a queued timeout (if any) - * in case someone decides to call esp_abort() from elsewhere. - */ - untimeout(esp_timeout, ecb); - timeout(esp_timeout, ecb, (ecb->timeout * hz) / 1000); - } else { - esp_dequeue(sc, ecb); - TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); - if (sc->sc_state == ESP_IDLE) - esp_sched(sc); - } + /* Start DMA */ + DMACSR(esc->sc_dma) |= D_EN_DMA; + esc->sc_dma->sc_active = 1; } void -esp_timeout(arg) - void *arg; +esp_dma_stop(sc) + struct ncr53c9x_softc *sc; { - struct esp_ecb *ecb = arg; - struct scsi_xfer *xs = ecb->xs; - struct scsi_link *sc_link = xs->sc_link; - struct esp_softc *sc = sc_link->adapter_softc; - int s; + struct esp_softc *esc = (struct esp_softc *)sc; - sc_print_addr(sc_link); - printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], " - "", - sc->sc_dev.dv_xname, - ecb, ecb->flags, ecb->dleft, ecb->stat, - sc->sc_state, sc->sc_nexus, sc->sc_phase, sc->sc_prevphase, - (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout, - DMA_ISACTIVE(sc->sc_dma) ? "DMA active" : ""); -#if ESP_DEBUG > 0 - printf("TRACE: %s.", ecb->trace); -#endif - - s = splbio(); - - if (ecb->flags & ECB_ABORT) { - /* abort timed out */ - printf(" AGAIN\n"); - esp_init(sc, 1); - } else { - /* abort the operation that has timed out */ - printf("\n"); - xs->error = XS_TIMEOUT; - esp_abort(sc, ecb); - } - - splx(s); + DMACSR(esc->sc_dma) &= ~D_EN_DMA; +} + +int +esp_dma_isactive(sc) + struct ncr53c9x_softc *sc; +{ + struct esp_softc *esc = (struct esp_softc *)sc; + + return (esc->sc_dma->sc_active); } diff --git a/sys/arch/sun3x/conf/files.sun3x b/sys/arch/sun3x/conf/files.sun3x index a133d144ffa0..8b4302307e39 100644 --- a/sys/arch/sun3x/conf/files.sun3x +++ b/sys/arch/sun3x/conf/files.sun3x @@ -1,4 +1,4 @@ -# $NetBSD: files.sun3x,v 1.14 1997/03/17 19:46:53 gwr Exp $ +# $NetBSD: files.sun3x,v 1.15 1997/03/20 16:01:36 gwr Exp $ # # sun3x-specific configuration info @@ -106,7 +106,7 @@ device iommu attach iommu at obio file arch/sun3x/sun3x/iommu.c iommu -device esp: scsi +device esp: scsi, ncr53c9x attach esp at obio file arch/sun3x/dev/esp.c esp file arch/sun3x/dev/dma.c esp diff --git a/sys/arch/sun3x/dev/dma.c b/sys/arch/sun3x/dev/dma.c index edc335efa8cc..24c8f33930f9 100644 --- a/sys/arch/sun3x/dev/dma.c +++ b/sys/arch/sun3x/dev/dma.c @@ -1,4 +1,4 @@ -/* $NetBSD: dma.c,v 1.3 1997/03/15 18:11:00 is Exp $ */ +/* $NetBSD: dma.c,v 1.4 1997/03/20 16:01:38 gwr Exp $ */ /* * Copyright (c) 1994 Paul Kranenburg. All rights reserved. @@ -48,33 +48,15 @@ #include #include +#include +#include + #include #include -#include -#include - -void dmaattach __P((struct device *, struct device *, void *)); -void dma_reset __P((struct dma_softc *)); -void dma_enintr __P((struct dma_softc *)); -int dma_isintr __P((struct dma_softc *)); -int espdmaintr __P((struct dma_softc *)); -int dma_setup __P((struct dma_softc *, caddr_t *, size_t *, - int, size_t *)); -void dma_go __P((struct dma_softc *)); - -#if 0 -struct cfattach dma_ca = { - sizeof(struct dma_softc), dmamatch, dmaattach -}; - -struct cfdriver dma_cd = { - NULL, "dma", DV_DULL -}; -#endif /* 0 */ /* * Pseudo-attach function. Called from the esp driver during its - * attach function. + * attach function. This needs to be silent. */ void dmaattach(parent, self, aux) @@ -99,8 +81,25 @@ dmaattach(parent, self, aux) * Sun3x works ok (so far) without it. */ - printf(": rev "); sc->sc_rev = sc->sc_regs->csr & D_DEV_ID; + +#if 0 + /* indirect functions */ + sc->intr = espdmaintr; + sc->enintr = dma_enintr; + sc->isintr = dma_isintr; + sc->reset = dma_reset; + sc->setup = dma_setup; + sc->go = dma_go; +#endif +} + +void +dma_print_rev(sc) + struct dma_softc *sc; +{ + + printf("espdma: rev "); switch (sc->sc_rev) { case DMAREV_0: printf("0"); @@ -121,16 +120,9 @@ dmaattach(parent, self, aux) printf("unknown (0x%x)", sc->sc_rev); } printf("\n"); - - /* indirect functions */ - sc->intr = espdmaintr; - sc->enintr = dma_enintr; - sc->isintr = dma_isintr; - sc->reset = dma_reset; - sc->setup = dma_setup; - sc->go = dma_go; } + #define DMAWAIT(SC, COND, MSG, DONTPANIC) do if (COND) { \ int count = 500000; \ while ((COND) && --count > 0) DELAY(1); \ @@ -178,8 +170,6 @@ dma_reset(sc) /*DMAWAIT1(sc); why was this here? */ DMACSR(sc) &= ~D_RESET; /* de-assert reset line */ DMACSR(sc) |= D_INT_EN; /* enable interrupts */ - if (sc->sc_rev > DMAREV_1) /* XXX - needed in 3x? */ - DMACSR(sc) |= D_FASTER; sc->sc_active = 0; /* and of course we aren't */ } @@ -223,7 +213,7 @@ dma_setup(sc, addr, len, datain, dmasize) sc->sc_dmaaddr = addr; sc->sc_dmalen = len; - ESP_DMA(("%s: start %d@%p,%d\n", sc->sc_dev.dv_xname, + NCR_DMA(("%s: start %d@%p,%d\n", sc->sc_dev.dv_xname, *sc->sc_dmalen, *sc->sc_dmaaddr, datain ? 1 : 0)); /* @@ -234,7 +224,7 @@ dma_setup(sc, addr, len, datain, dmasize) *dmasize = sc->sc_dmasize = min(*dmasize, DMAMAX((size_t) *sc->sc_dmaaddr)); - ESP_DMA(("dma_setup: dmasize = %d\n", sc->sc_dmasize)); + NCR_DMA(("dma_setup: dmasize = %d\n", sc->sc_dmasize)); /* Program the DMA address */ if (sc->sc_dmasize) { @@ -243,7 +233,7 @@ dma_setup(sc, addr, len, datain, dmasize) */ sc->sc_dvmaaddr = *sc->sc_dmaaddr; sc->sc_dvmakaddr = dvma_mapin(sc->sc_dvmaaddr, - sc->sc_dmasize, 0); + sc->sc_dmasize, 0); if (sc->sc_dvmakaddr == NULL) panic("dma: cannot allocate DVMA address"); sc->sc_dmasaddr = dvma_kvtopa(sc->sc_dvmakaddr, BUS_OBIO); @@ -292,14 +282,15 @@ int espdmaintr(sc) struct dma_softc *sc; { + struct ncr53c9x_softc *nsc = sc->sc_esp; char bits[64]; int trans, resid; u_long csr; csr = DMACSR(sc); - ESP_DMA(("%s: intr: addr %x, csr %s\n", sc->sc_dev.dv_xname, - DMADDR(sc), bitmask_snprintf(csr, DMACSRBITS, bits, - sizeof(bits)))); + NCR_DMA(("%s: intr: addr %x, csr %s\n", + sc->sc_dev.dv_xname, DMADDR(sc), + bitmask_snprintf(csr, DMACSRBITS, bits, sizeof(bits)))); if (csr & D_ERR_PEND) { DMACSR(sc) &= ~D_EN_DMA; /* Stop DMA */ @@ -321,11 +312,11 @@ espdmaintr(sc) if (sc->sc_dmasize == 0) { /* A "Transfer Pad" operation completed */ - ESP_DMA(("dmaintr: discarded %d bytes (tcl=%d, tcm=%d)\n", - ESP_READ_REG(sc->sc_esp, ESP_TCL) | - (ESP_READ_REG(sc->sc_esp, ESP_TCM) << 8), - ESP_READ_REG(sc->sc_esp, ESP_TCL), - ESP_READ_REG(sc->sc_esp, ESP_TCM))); + NCR_DMA(("dmaintr: discarded %d bytes (tcl=%d, tcm=%d)\n", + NCR_READ_REG(nsc, NCR_TCL) | + (NCR_READ_REG(nsc, NCR_TCM) << 8), + NCR_READ_REG(nsc, NCR_TCL), + NCR_READ_REG(nsc, NCR_TCM))); return 0; } @@ -337,24 +328,24 @@ espdmaintr(sc) * bytes are clocked into the FIFO. */ if (!(csr & D_WRITE) && - (resid = (ESP_READ_REG(sc->sc_esp, ESP_FFLAG) & ESPFIFO_FF)) != 0) { - ESP_DMA(("dmaintr: empty esp FIFO of %d ", resid)); - ESPCMD(sc->sc_esp, ESPCMD_FLUSH); + (resid = (NCR_READ_REG(nsc, NCR_FFLAG) & NCRFIFO_FF)) != 0) { + NCR_DMA(("dmaintr: empty esp FIFO of %d ", resid)); + NCRCMD(nsc, NCRCMD_FLUSH); } - if ((sc->sc_esp->sc_espstat & ESPSTAT_TC) == 0) { + if ((nsc->sc_espstat & NCRSTAT_TC) == 0) { /* * `Terminal count' is off, so read the residue * out of the ESP counter registers. */ - resid += ( ESP_READ_REG(sc->sc_esp, ESP_TCL) | - (ESP_READ_REG(sc->sc_esp, ESP_TCM) << 8) | - ((sc->sc_esp->sc_cfg2 & ESPCFG2_FE) - ? (ESP_READ_REG(sc->sc_esp, ESP_TCH) << 16) + resid += (NCR_READ_REG(nsc, NCR_TCL) | + (NCR_READ_REG(nsc, NCR_TCM) << 8) | + ((nsc->sc_cfg2 & NCRCFG2_FE) + ? (NCR_READ_REG(nsc, NCR_TCH) << 16) : 0)); if (resid == 0 && sc->sc_dmasize == 65536 && - (sc->sc_esp->sc_cfg2 & ESPCFG2_FE) == 0) + (nsc->sc_cfg2 & NCRCFG2_FE) == 0) /* A transfer of 64K is encoded as `TCL=TCM=0' */ resid = 65536; } @@ -366,11 +357,11 @@ espdmaintr(sc) trans = sc->sc_dmasize; } - ESP_DMA(("dmaintr: tcl=%d, tcm=%d, tch=%d; trans=%d, resid=%d\n", - ESP_READ_REG(sc->sc_esp, ESP_TCL), - ESP_READ_REG(sc->sc_esp, ESP_TCM), - (sc->sc_esp->sc_cfg2 & ESPCFG2_FE) - ? ESP_READ_REG(sc->sc_esp, ESP_TCH) : 0, + NCR_DMA(("dmaintr: tcl=%d, tcm=%d, tch=%d; trans=%d, resid=%d\n", + NCR_READ_REG(nsc, NCR_TCL), + NCR_READ_REG(nsc, NCR_TCM), + (nsc->sc_cfg2 & NCRCFG2_FE) + ? NCR_READ_REG(nsc, NCR_TCH) : 0, trans, resid)); #ifdef SUN3X_470_EVENTUALLY @@ -386,7 +377,7 @@ espdmaintr(sc) #if 0 /* this is not normal operation just yet */ if (*sc->sc_dmalen == 0 || - sc->sc_esp->sc_phase != sc->sc_esp->sc_prevphase) + nsc->sc_phase != nsc->sc_prevphase) return 0; /* and again */ diff --git a/sys/arch/sun3x/dev/dmavar.h b/sys/arch/sun3x/dev/dmavar.h index ca7e766eba03..079a8d71d3ee 100644 --- a/sys/arch/sun3x/dev/dmavar.h +++ b/sys/arch/sun3x/dev/dmavar.h @@ -1,4 +1,4 @@ -/* $NetBSD: dmavar.h,v 1.2 1997/03/15 18:11:02 is Exp $ */ +/* $NetBSD: dmavar.h,v 1.3 1997/03/20 16:01:39 gwr Exp $ */ /* * Copyright (c) 1994 Peter Galbavy. All rights reserved. @@ -30,7 +30,7 @@ struct dma_softc { struct device sc_dev; /* us as a device */ - struct esp_softc *sc_esp; /* my scsi */ + struct ncr53c9x_softc *sc_esp; /* my scsi */ struct dma_regs *sc_regs; /* the registers */ int sc_active; /* DMA active ? */ u_int sc_rev; /* revision */ @@ -41,25 +41,27 @@ struct dma_softc { size_t sc_dmasize; caddr_t *sc_dmaaddr; size_t *sc_dmalen; +#if 0 void (*reset)(struct dma_softc *); /* reset routine */ void (*enintr)(struct dma_softc *); /* enable interrupts */ int (*isintr)(struct dma_softc *); /* interrupt ? */ int (*intr)(struct dma_softc *); /* interrupt ! */ int (*setup)(struct dma_softc *, caddr_t *, size_t *, int, size_t *); void (*go)(struct dma_softc *); +#endif }; #define DMACSR(sc) (sc->sc_regs->csr) #define DMADDR(sc) (sc->sc_regs->addr) #define DMACNT(sc) (sc->sc_regs->bcnt) -/* DMA engine functions */ -#define DMA_ENINTR(r) (((r)->enintr)(r)) -#define DMA_ISINTR(r) (((r)->isintr)(r)) -#define DMA_RESET(r) (((r)->reset)(r)) -#define DMA_INTR(r) (((r)->intr)(r)) -#define DMA_ISACTIVE(r) ((r)->sc_active) -#define DMA_SETUP(a, b, c, d, e) (((a)->setup)(a, b, c, d, e)) -#define DMA_GO(r) (((r)->go)(r)) - void dmaattach __P((struct device *, struct device *, void *)); +void dma_print_rev __P((struct dma_softc *)); + +void dma_reset __P((struct dma_softc *)); +void dma_enintr __P((struct dma_softc *)); +int dma_isintr __P((struct dma_softc *)); +int dma_setup __P((struct dma_softc *, caddr_t *, size_t *, int, size_t *)); +void dma_go __P((struct dma_softc *)); + +int espdmaintr __P((struct dma_softc *)); diff --git a/sys/arch/sun3x/dev/esp.c b/sys/arch/sun3x/dev/esp.c index ef9be4532527..7e589b611988 100644 --- a/sys/arch/sun3x/dev/esp.c +++ b/sys/arch/sun3x/dev/esp.c @@ -1,39 +1,12 @@ -/* $NetBSD: esp.c,v 1.2 1997/03/15 18:11:03 is Exp $ */ +/* $NetBSD: esp.c,v 1.3 1997/03/20 16:01:40 gwr Exp $ */ -/* - * Copyright (c) 1996 Charles M. Hannum. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Charles M. Hannum. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Copyright (c) 1994 Peter Galbavy - * Copyright (c) 1995 Paul Kranenburg +/*- + * Copyright (c) 1997 The NetBSD Foundation, Inc. * All rights reserved. * + * This code is derived from software contributed to The NetBSD Foundation + * by Jeremy Cooper and Gordon W. Ross + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -44,29 +17,28 @@ * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: - * This product includes software developed by Peter Galbavy - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /* - * Based on aic6360 by Jarle Greipsland - * - * Acknowledgements: Many of the algorithms used in this driver are - * inspired by the work of Julian Elischer (julian@tfs.com) and - * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million! + * "Front end" glue for the ncr53c9x chip, formerly known as the + * Emulex SCSI Processor (ESP) which is what we actually have. */ #include @@ -87,46 +59,24 @@ #include #include + +#include +#include + #include #include -#include -#include #define ESP_REG_SIZE (12*4) #define ESP_DMA_OFF 0x1000 -int esp_debug = 0; /*ESP_SHOWPHASE|ESP_SHOWMISC|ESP_SHOWTRAC|ESP_SHOWCMDS;*/ +struct esp_softc { + struct ncr53c9x_softc sc_ncr53c9x; /* glue to MI code */ + volatile u_char *sc_reg; /* the registers */ + struct dma_softc *sc_dma; /* pointer to my dma */ +}; -/*static*/ void espattach __P((struct device *, struct device *, void *)); -/*static*/ int espmatch __P((struct device *, struct cfdata *, void *)); -/*static*/ u_int esp_adapter_info __P((struct esp_softc *)); -/*static*/ void espreadregs __P((struct esp_softc *)); -/*static*/ void esp_select __P((struct esp_softc *, struct esp_ecb *)); -/*static*/ int esp_reselect __P((struct esp_softc *, int)); -/*static*/ void esp_scsi_reset __P((struct esp_softc *)); -/*static*/ void esp_reset __P((struct esp_softc *)); -/*static*/ void esp_init __P((struct esp_softc *, int)); -/*static*/ int esp_scsi_cmd __P((struct scsi_xfer *)); -/*static*/ int esp_poll __P((struct esp_softc *, struct scsi_xfer *, int)); -/*static*/ void esp_sched __P((struct esp_softc *)); -/*static*/ void esp_done __P((struct esp_softc *, struct esp_ecb *)); -/*static*/ void esp_msgin __P((struct esp_softc *)); -/*static*/ void esp_msgout __P((struct esp_softc *)); -/*static*/ int espintr __P((struct esp_softc *)); -/*static*/ void esp_timeout __P((void *arg)); -/*static*/ void esp_abort __P((struct esp_softc *, struct esp_ecb *)); -/*static*/ void esp_dequeue __P((struct esp_softc *, struct esp_ecb *)); -void esp_sense __P((struct esp_softc *, struct esp_ecb *)); -void esp_free_ecb __P((struct esp_softc *, struct esp_ecb *, int)); -struct esp_ecb *esp_get_ecb __P((struct esp_softc *, int)); -static inline int esp_stp2cpb __P((struct esp_softc *, int)); -static inline int esp_cpb2stp __P((struct esp_softc *, int)); -static inline void esp_setsync __P((struct esp_softc *, struct esp_tinfo *)); - -/* - * This section is machine-dependent - * (autoconf data and match/attach functions) - */ +static int espmatch __P((struct device *, struct cfdata *, void *)); +static void espattach __P((struct device *, struct device *, void *)); struct cfattach esp_ca = { sizeof(struct esp_softc), espmatch, espattach @@ -137,7 +87,7 @@ struct cfdriver esp_cd = { }; struct scsi_adapter esp_switch = { - esp_scsi_cmd, + ncr53c9x_scsi_cmd, minphys, /* no max at this level; handled by DMA code */ NULL, NULL, @@ -150,7 +100,34 @@ struct scsi_device esp_dev = { NULL, /* Use default 'done' routine */ }; -int +/* + * Functions and the switch for the MI code. + */ +u_char esp_read_reg __P((struct ncr53c9x_softc *, int)); +void esp_write_reg __P((struct ncr53c9x_softc *, int, u_char)); +int esp_dma_isintr __P((struct ncr53c9x_softc *)); +void esp_dma_reset __P((struct ncr53c9x_softc *)); +int esp_dma_intr __P((struct ncr53c9x_softc *)); +int esp_dma_setup __P((struct ncr53c9x_softc *, caddr_t *, + size_t *, int, size_t *)); +void esp_dma_go __P((struct ncr53c9x_softc *)); +void esp_dma_stop __P((struct ncr53c9x_softc *)); +int esp_dma_isactive __P((struct ncr53c9x_softc *)); + +static struct ncr53c9x_glue esp_glue = { + esp_read_reg, + esp_write_reg, + esp_dma_isintr, + esp_dma_reset, + esp_dma_intr, + esp_dma_setup, + esp_dma_go, + esp_dma_stop, + esp_dma_isactive, + NULL, /* gl_clear_latched_intr */ +}; + +static int espmatch(parent, cf, aux) struct device *parent; struct cfdata *cf; @@ -169,7 +146,7 @@ espmatch(parent, cf, aux) * Check for the esp registers. */ if (bus_peek(ca->ca_bustype, - ca->ca_paddr + (ESP_STAT * 4), 1) == -1) + ca->ca_paddr + (NCR_STAT * 4), 1) == -1) return (0); /* If default ipl, fill it in. */ @@ -181,91 +158,112 @@ espmatch(parent, cf, aux) /* * Attach this instance, and then all the sub-devices + * + * In the SPARC port, the dma code used by the esp driver looks like + * a separate driver, matched and attached by either the esp driver + * or the bus attach function. However it's not completely separate + * in that the sparc esp driver has to go look in dma_cd.cd_devs to + * get the softc for the dma driver, and shares its softc, etc. + * + * The dma module could exist as a separate autoconfig entity, but + * that really does not buy us anything, so why bother with that? + * In the current sun3x port, the dma chip is treated as just an + * extension of the esp driver because that is easier, and the esp + * driver is the only one that uses the dma module. */ -void +static void espattach(parent, self, aux) struct device *parent, *self; void *aux; { register struct confargs *ca = aux; - struct esp_softc *sc = (void *)self; + struct esp_softc *esc = (void *)self; + struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x; /* - * Map in the registers. + * Set up glue for MI code early; we use some of it here. */ - sc->sc_reg = (volatile u_char *) + sc->sc_glue = &esp_glue; + + /* + * Map in the ESP registers. + */ + esc->sc_reg = (volatile u_char *) bus_mapin(ca->ca_bustype, ca->ca_paddr, NBPG); + /* Other settings */ sc->sc_id = 7; sc->sc_freq = 20; /* The 3/80 esp runs at 20 Mhz */ /* - * It is necessary to try to load the 2nd config register here, - * to find out what rev the esp chip is, otherwise esp_reset - * will not set up the defaults correctly. + * Hook up the DMA driver. + * XXX - Would rather do this later, after the common + * attach function is done printing its line so the DMA + * module can print its revision, but the common attach + * code needs this done first... + * XXX - Move printf back to MD code? */ - sc->sc_cfg1 = sc->sc_id | ESPCFG1_PARENB; - sc->sc_cfg2 = ESPCFG2_SCSI2 | ESPCFG2_RPE; - sc->sc_cfg3 = ESPCFG3_CDB; - ESP_WRITE_REG(sc, ESP_CFG2, sc->sc_cfg2); - - if ((ESP_READ_REG(sc, ESP_CFG2) & ~ESPCFG2_RSVD) != (ESPCFG2_SCSI2 | ESPCFG2_RPE)) { - printf(": ESP100"); - sc->sc_rev = ESP100; - } else { - sc->sc_cfg2 = ESPCFG2_SCSI2; - ESP_WRITE_REG(sc, ESP_CFG2, sc->sc_cfg2); - sc->sc_cfg3 = 0; - ESP_WRITE_REG(sc, ESP_CFG3, sc->sc_cfg3); - sc->sc_cfg3 = (ESPCFG3_CDB | ESPCFG3_FCLK); - ESP_WRITE_REG(sc, ESP_CFG3, sc->sc_cfg3); - if (ESP_READ_REG(sc, ESP_CFG3) != (ESPCFG3_CDB | ESPCFG3_FCLK)) { - printf(": ESP100A"); - sc->sc_rev = ESP100A; - } else { - /* ESPCFG2_FE enables > 64K transfers */ - sc->sc_cfg2 |= ESPCFG2_FE; - sc->sc_cfg3 = 0; - ESP_WRITE_REG(sc, ESP_CFG3, sc->sc_cfg3); - printf(": ESP200"); - sc->sc_rev = ESP200; - } - } - printf(" %dMhz, target %d\n", sc->sc_freq, sc->sc_id); + esc->sc_dma = malloc(sizeof(struct dma_softc), M_DEVBUF, M_NOWAIT); + if (esc->sc_dma == 0) + panic("espattach: malloc dma_softc"); + bzero(esc->sc_dma, sizeof(struct dma_softc)); + esc->sc_dma->sc_esp = sc; /* Point back to us */ + esc->sc_dma->sc_regs = (struct dma_regs *) + (esc->sc_reg + ESP_DMA_OFF); /* - * In the SPARC port, the dma code used by the esp driver looks like - * a separate driver, matched and attached by either the esp driver - * or the bus attach function. However it's not completely separate - * in that the sparc esp driver has to go look in dma_cd.cd_devs to - * get the softc for the dma driver, and shares its softc, etc. - * - * In the current sun3x port, the dma chip is treated as just an - * extension of the esp driver because that is easier, and the esp - * driver is the only one that uses the dma module. - * - * The dma module could exist as a separate autoconfig entity, but - * that really does not buy us anything, so why bother with that? - * We can just simulate an attach call here for compatibility with - * the sparc dma.c module. + * Simulate an attach call here for compatibility with + * the sparc dma.c module. It does not print anything. */ - sc->sc_dma = malloc(sizeof(struct dma_softc), M_DEVBUF, M_NOWAIT); - if (sc->sc_dma == 0) - panic("espattach: malloc dma_softc"); - bzero(sc->sc_dma, sizeof(struct dma_softc)); + dmaattach(self, (struct device *) esc->sc_dma, NULL); - sc->sc_dma->sc_esp = sc; /* Point back to us */ - sc->sc_dma->sc_regs = (struct dma_regs *) - (sc->sc_reg + ESP_DMA_OFF); + /* + * XXX More of this should be in ncr53c9x_attach(), but + * XXX should we really poke around the chip that much in + * XXX the MI code? Think about this more... + */ - /* Simulate the autoconfig messages... */ - printf("%s: dma", sc->sc_dev.dv_xname); - /* This will print ": rev ..." */ - dmaattach(self, (struct device *) sc->sc_dma, NULL); + /* + * It is necessary to try to load the 2nd config register here, + * to find out what rev the esp chip is, else the ncr53c9x_reset + * will not set up the defaults correctly. + */ + sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB; + sc->sc_cfg2 = NCRCFG2_SCSI2 | NCRCFG2_RPE; + sc->sc_cfg3 = NCRCFG3_CDB; + NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); + + if ((NCR_READ_REG(sc, NCR_CFG2) & ~NCRCFG2_RSVD) != + (NCRCFG2_SCSI2 | NCRCFG2_RPE)) { + sc->sc_rev = NCR_VARIANT_ESP100; + } else { + sc->sc_cfg2 = NCRCFG2_SCSI2; + NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); + sc->sc_cfg3 = 0; + NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); + sc->sc_cfg3 = (NCRCFG3_CDB | NCRCFG3_FCLK); + NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); + if (NCR_READ_REG(sc, NCR_CFG3) != + (NCRCFG3_CDB | NCRCFG3_FCLK)) { + sc->sc_rev = NCR_VARIANT_ESP100A; + } else { + /* NCRCFG2_FE enables > 64K transfers */ + sc->sc_cfg2 |= NCRCFG2_FE; + sc->sc_cfg3 = 0; + NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); + sc->sc_rev = NCR_VARIANT_ESP200; + } + } + + /* + * XXX minsync and maxxfer _should_ be set up in MI code, + * XXX but it appears to have some dependency on what sort + * XXX of DMA we're hooked up to, etc. + */ /* * This is the value used to start sync negotiations - * Note that the ESP register "SYNCTP" is programmed + * Note that the NCR register "SYNCTP" is programmed * in "clocks per byte", and has a minimum value of 4. * The SCSI period used in negotiation is one-fourth * of the time (in nanoseconds) needed to transfer one byte. @@ -280,1739 +278,123 @@ espattach(parent, self, aux) * in config register 3... */ switch (sc->sc_rev) { - case ESP100: - sc->sc_maxxfer = 64 * 1024; + case NCR_VARIANT_ESP100: + sc->sc_maxxfer = 64 * 1024; sc->sc_minsync = 0; /* No synch on old chip? */ break; - case ESP100A: + + case NCR_VARIANT_ESP100A: sc->sc_maxxfer = 64 * 1024; - sc->sc_minsync = esp_cpb2stp(sc, 5); /* Min clocks/byte is 5 */ + /* Min clocks/byte is 5 */ + sc->sc_minsync = ncr53c9x_cpb2stp(sc, 5); break; - case ESP200: + + case NCR_VARIANT_ESP200: sc->sc_maxxfer = 16 * 1024 * 1024; /* XXX - do actually set FAST* bits */ + break; } - sc->sc_ccf = FREQTOCCF(sc->sc_freq); - - /* The value *must not* be == 1. Make it 2 */ - if (sc->sc_ccf == 1) - sc->sc_ccf = 2; - - /* - * The recommended timeout is 250ms. This register is loaded - * with a value calculated as follows, from the docs: - * - * (timout period) x (CLK frequency) - * reg = ------------------------------------- - * 8192 x (Clock Conversion Factor) - * - * Since CCF has a linear relation to CLK, this generally computes - * to the constant of 153. - */ - sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf); - - /* CCF register only has 3 bits; 0 is actually 8 */ - sc->sc_ccf &= 7; - - /* Reset state & bus */ - sc->sc_state = 0; - esp_init(sc, 1); - /* and the interuppts */ - isr_add_autovect((isr_func_t) espintr, (void *) sc, ca->ca_intpri); + isr_add_autovect((void*)ncr53c9x_intr, sc, ca->ca_intpri); evcnt_attach(&sc->sc_dev, "intr", &sc->sc_intrcnt); - /* - * fill in the prototype scsi_link. - */ - sc->sc_link.channel = SCSI_CHANNEL_ONLY_ONE; - sc->sc_link.adapter_softc = sc; - sc->sc_link.adapter_target = sc->sc_id; - sc->sc_link.adapter = &esp_switch; - sc->sc_link.device = &esp_dev; - sc->sc_link.openings = 2; - sc->sc_link.max_target = 7; - - /* - * Now try to attach all the sub-devices - */ - config_found(self, &sc->sc_link, scsiprint); + /* Do the common parts of attachment. */ + ncr53c9x_attach(sc, &esp_switch, &esp_dev); } -/* - * End of machine-dependent section - */ /* - * This is the generic esp reset function. It does not reset the SCSI bus, - * only this controllers, but kills any on-going commands, and also stops - * and resets the DMA. - * - * After reset, registers are loaded with the defaults from the attach - * routine above. + * Glue functions. */ -void -esp_reset(sc) - struct esp_softc *sc; + +u_char +esp_read_reg(sc, reg) + struct ncr53c9x_softc *sc; + int reg; { + struct esp_softc *esc = (struct esp_softc *)sc; - /* reset DMA first */ - DMA_RESET(sc->sc_dma); - - /* reset SCSI chip */ - ESPCMD(sc, ESPCMD_RSTCHIP); - ESPCMD(sc, ESPCMD_NOP); - DELAY(500); - - /* do these backwards, and fall through */ - switch (sc->sc_rev) { - case ESP200: - ESP_WRITE_REG(sc, ESP_CFG3, sc->sc_cfg3); - case ESP100A: - ESP_WRITE_REG(sc, ESP_CFG2, sc->sc_cfg2); - case ESP100: - ESP_WRITE_REG(sc, ESP_CFG1, sc->sc_cfg1); - ESP_WRITE_REG(sc, ESP_CCF, sc->sc_ccf); - ESP_WRITE_REG(sc, ESP_SYNCOFF, 0); - ESP_WRITE_REG(sc, ESP_TIMEOUT, sc->sc_timeout); - break; - default: - printf("%s: unknown revision code, assuming ESP100\n", - sc->sc_dev.dv_xname); - ESP_WRITE_REG(sc, ESP_CFG1, sc->sc_cfg1); - ESP_WRITE_REG(sc, ESP_CCF, sc->sc_ccf); - ESP_WRITE_REG(sc, ESP_SYNCOFF, 0); - ESP_WRITE_REG(sc, ESP_TIMEOUT, sc->sc_timeout); - } -} - -/* - * Reset the SCSI bus, but not the chip - */ -void -esp_scsi_reset(sc) - struct esp_softc *sc; -{ - /* stop DMA first, as the chip will return to Bus Free phase */ - DMACSR(sc->sc_dma) &= ~D_EN_DMA; - - printf("esp: resetting SCSI bus\n"); - ESPCMD(sc, ESPCMD_RSTSCSI); -} - -/* - * Initialize esp state machine - */ -void -esp_init(sc, doreset) - struct esp_softc *sc; - int doreset; -{ - struct esp_ecb *ecb; - int r; - - ESP_TRACE(("[ESP_INIT(%d)] ", doreset)); - - if (sc->sc_state == 0) { - /* First time through; initialize. */ - TAILQ_INIT(&sc->ready_list); - TAILQ_INIT(&sc->nexus_list); - TAILQ_INIT(&sc->free_list); - sc->sc_nexus = NULL; - ecb = sc->sc_ecb; - bzero(ecb, sizeof(sc->sc_ecb)); - for (r = 0; r < sizeof(sc->sc_ecb) / sizeof(*ecb); r++) { - TAILQ_INSERT_TAIL(&sc->free_list, ecb, chain); - ecb++; - } - bzero(sc->sc_tinfo, sizeof(sc->sc_tinfo)); - } else { - /* Cancel any active commands. */ - sc->sc_state = ESP_CLEANING; - if ((ecb = sc->sc_nexus) != NULL) { - ecb->xs->error = XS_DRIVER_STUFFUP; - untimeout(esp_timeout, ecb); - esp_done(sc, ecb); - } - while ((ecb = sc->nexus_list.tqh_first) != NULL) { - ecb->xs->error = XS_DRIVER_STUFFUP; - untimeout(esp_timeout, ecb); - esp_done(sc, ecb); - } - } - - /* - * reset the chip to a known state - */ - esp_reset(sc); - - sc->sc_phase = sc->sc_prevphase = INVALID_PHASE; - for (r = 0; r < 8; r++) { - struct esp_tinfo *ti = &sc->sc_tinfo[r]; -/* XXX - config flags per target: low bits: no reselect; high bits: no synch */ - int fl = sc->sc_dev.dv_cfdata->cf_flags; - - ti->flags = ((sc->sc_minsync && !(fl & (1<<(r+8)))) - ? T_NEGOTIATE : 0) | - ((fl & (1<period = sc->sc_minsync; - ti->offset = 0; - } - - if (doreset) { - sc->sc_state = ESP_SBR; - ESPCMD(sc, ESPCMD_RSTSCSI); - } else { - sc->sc_state = ESP_IDLE; - } -} - -/* - * Read the ESP registers, and save their contents for later use. - * ESP_STAT, ESP_STEP & ESP_INTR are mostly zeroed out when reading - * ESP_INTR - so make sure it is the last read. - * - * I think that (from reading the docs) most bits in these registers - * only make sense when he DMA CSR has an interrupt showing. Call only - * if an interrupt is pending. - */ -void -espreadregs(sc) - struct esp_softc *sc; -{ - - sc->sc_espstat = ESP_READ_REG(sc, ESP_STAT); - /* Only the stepo bits are of interest */ - sc->sc_espstep = ESP_READ_REG(sc, ESP_STEP) & ESPSTEP_MASK; - sc->sc_espintr = ESP_READ_REG(sc, ESP_INTR); - - /* - * Determine the SCSI bus phase, return either a real SCSI bus phase - * or some pseudo phase we use to detect certain exceptions. - */ - - sc->sc_phase = (sc->sc_espintr & ESPINTR_DIS) - ? /* Disconnected */ BUSFREE_PHASE - : sc->sc_espstat & ESPSTAT_PHASE; - - ESP_MISC(("regs[intr=%02x,stat=%02x,step=%02x] ", - sc->sc_espintr, sc->sc_espstat, sc->sc_espstep)); -} - -/* - * Convert chip register Clock Per Byte value to Synchronous Transfer Period. - */ -static inline int -esp_cpb2stp(sc, cpb) - struct esp_softc *sc; - int cpb; -{ - return ((250 * cpb) / sc->sc_freq); -} - -/* - * Convert Synchronous Transfer Period to chip register Clock Per Byte value. - */ -static inline int -esp_stp2cpb(sc, period) - struct esp_softc *sc; - int period; -{ - int v; - v = (sc->sc_freq * period) / 250; - if (esp_cpb2stp(sc, v) < period) - /* Correct round-down error */ - v++; - return v; -} - -static inline void -esp_setsync(sc, ti) - struct esp_softc *sc; - struct esp_tinfo *ti; -{ - - if (ti->flags & T_SYNCMODE) { - ESP_WRITE_REG(sc, ESP_SYNCOFF, ti->offset); - ESP_WRITE_REG(sc, ESP_SYNCTP, esp_stp2cpb(sc, ti->period)); - } else { - ESP_WRITE_REG(sc, ESP_SYNCOFF, 0); - ESP_WRITE_REG(sc, ESP_SYNCTP, 0); - } -} - -/* - * Send a command to a target, set the driver state to ESP_SELECTING - * and let the caller take care of the rest. - * - * Keeping this as a function allows me to say that this may be done - * by DMA instead of programmed I/O soon. - */ -void -esp_select(sc, ecb) - struct esp_softc *sc; - struct esp_ecb *ecb; -{ - struct scsi_link *sc_link = ecb->xs->sc_link; - int target = sc_link->target; - struct esp_tinfo *ti = &sc->sc_tinfo[target]; - u_char *cmd; - int clen; - - ESP_TRACE(("[esp_select(t%d,l%d,cmd:%x)] ", sc_link->target, sc_link->lun, ecb->cmd.opcode)); - - /* new state ESP_SELECTING */ - sc->sc_state = ESP_SELECTING; - - ESPCMD(sc, ESPCMD_FLUSH); - - /* - * The docs say the target register is never reset, and I - * can't think of a better place to set it - */ - ESP_WRITE_REG(sc, ESP_SELID, target); - esp_setsync(sc, ti); - - /* - * Who am I. This is where we tell the target that we are - * happy for it to disconnect etc. - */ - ESP_WRITE_REG(sc, ESP_FIFO, - MSG_IDENTIFY(sc_link->lun, (ti->flags & T_RSELECTOFF)?0:1)); - - if (ti->flags & T_NEGOTIATE) { - /* Arbitrate, select and stop after IDENTIFY message */ - ESPCMD(sc, ESPCMD_SELATNS); - return; - } - - /* Now the command into the FIFO */ - cmd = (u_char *)&ecb->cmd; - clen = ecb->clen; - while (clen--) - ESP_WRITE_REG(sc, ESP_FIFO, *cmd++); - - /* And get the targets attention */ - ESPCMD(sc, ESPCMD_SELATN); + return (esc->sc_reg[reg * 4]); } void -esp_free_ecb(sc, ecb, flags) - struct esp_softc *sc; - struct esp_ecb *ecb; - int flags; +esp_write_reg(sc, reg, val) + struct ncr53c9x_softc *sc; + int reg; + u_char val; { - int s; + struct esp_softc *esc = (struct esp_softc *)sc; + u_char v = val; - s = splbio(); - - ecb->flags = 0; - TAILQ_INSERT_HEAD(&sc->free_list, ecb, chain); - - /* - * If there were none, wake anybody waiting for one to come free, - * starting with queued entries. - */ - if (ecb->chain.tqe_next == 0) - wakeup(&sc->free_list); - - splx(s); + esc->sc_reg[reg * 4] = v; } -struct esp_ecb * -esp_get_ecb(sc, flags) - struct esp_softc *sc; - int flags; -{ - struct esp_ecb *ecb; - int s; - - s = splbio(); - - while ((ecb = sc->free_list.tqh_first) == NULL && - (flags & SCSI_NOSLEEP) == 0) - tsleep(&sc->free_list, PRIBIO, "especb", 0); - if (ecb) { - TAILQ_REMOVE(&sc->free_list, ecb, chain); - ecb->flags |= ECB_ALLOC; - } - - splx(s); - return ecb; -} - -/* - * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS - */ - -/* - * Start a SCSI-command - * This function is called by the higher level SCSI-driver to queue/run - * SCSI-commands. - */ -int -esp_scsi_cmd(xs) - struct scsi_xfer *xs; -{ - struct scsi_link *sc_link = xs->sc_link; - struct esp_softc *sc = sc_link->adapter_softc; - struct esp_ecb *ecb; - int s, flags; - - ESP_TRACE(("[esp_scsi_cmd] ")); - ESP_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, - sc_link->target)); - - flags = xs->flags; - if ((ecb = esp_get_ecb(sc, flags)) == NULL) { - xs->error = XS_DRIVER_STUFFUP; - return TRY_AGAIN_LATER; - } - - /* Initialize ecb */ - ecb->xs = xs; - ecb->timeout = xs->timeout; - - if (xs->flags & SCSI_RESET) { - ecb->flags |= ECB_RESET; - ecb->clen = 0; - ecb->dleft = 0; - } else { - bcopy(xs->cmd, &ecb->cmd, xs->cmdlen); - ecb->clen = xs->cmdlen; - ecb->daddr = xs->data; - ecb->dleft = xs->datalen; - } - ecb->stat = 0; - - s = splbio(); - - TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain); - if (sc->sc_state == ESP_IDLE) - esp_sched(sc); - - splx(s); - - if ((flags & SCSI_POLL) == 0) - return SUCCESSFULLY_QUEUED; - - /* Not allowed to use interrupts, use polling instead */ - if (esp_poll(sc, xs, ecb->timeout)) { - esp_timeout(ecb); - if (esp_poll(sc, xs, ecb->timeout)) - esp_timeout(ecb); - } - return COMPLETE; -} - -/* - * Used when interrupt driven I/O isn't allowed, e.g. during boot. - */ -int -esp_poll(sc, xs, count) - struct esp_softc *sc; - struct scsi_xfer *xs; - int count; -{ - - ESP_TRACE(("[esp_poll] ")); - while (count) { - if (DMA_ISINTR(sc->sc_dma)) { - espintr(sc); - } -#if alternatively - if (ESP_READ_REG(sc, ESP_STAT) & ESPSTAT_INT) - espintr(sc); -#endif - if ((xs->flags & ITSDONE) != 0) - return 0; - if (sc->sc_state == ESP_IDLE) { - ESP_TRACE(("[esp_poll: rescheduling] ")); - esp_sched(sc); - } - DELAY(1000); - count--; - } - return 1; -} - - -/* - * LOW LEVEL SCSI UTILITIES - */ - -/* - * Schedule a scsi operation. This has now been pulled out of the interrupt - * handler so that we may call it from esp_scsi_cmd and esp_done. This may - * save us an unecessary interrupt just to get things going. Should only be - * called when state == ESP_IDLE and at bio pl. - */ -void -esp_sched(sc) - struct esp_softc *sc; -{ - struct esp_ecb *ecb; - struct scsi_link *sc_link; - struct esp_tinfo *ti; - - ESP_TRACE(("[esp_sched] ")); - if (sc->sc_state != ESP_IDLE) - panic("esp_sched: not IDLE (state=%d)", sc->sc_state); - - /* - * Find first ecb in ready queue that is for a target/lunit - * combinations that is not busy. - */ - for (ecb = sc->ready_list.tqh_first; ecb; ecb = ecb->chain.tqe_next) { - sc_link = ecb->xs->sc_link; - ti = &sc->sc_tinfo[sc_link->target]; - if ((ti->lubusy & (1 << sc_link->lun)) == 0) { - TAILQ_REMOVE(&sc->ready_list, ecb, chain); - sc->sc_nexus = ecb; - esp_select(sc, ecb); - break; - } else - ESP_MISC(("%d:%d busy\n", - sc_link->target, sc_link->lun)); - } -} - -void -esp_sense(sc, ecb) - struct esp_softc *sc; - struct esp_ecb *ecb; -{ - struct scsi_xfer *xs = ecb->xs; - struct scsi_link *sc_link = xs->sc_link; - struct esp_tinfo *ti = &sc->sc_tinfo[sc_link->target]; - struct scsi_sense *ss = (void *)&ecb->cmd; - - ESP_MISC(("requesting sense ")); - /* Next, setup a request sense command block */ - bzero(ss, sizeof(*ss)); - ss->opcode = REQUEST_SENSE; - ss->byte2 = sc_link->lun << 5; - ss->length = sizeof(struct scsi_sense_data); - ecb->clen = sizeof(*ss); - ecb->daddr = (char *)&xs->sense; - ecb->dleft = sizeof(struct scsi_sense_data); - ecb->flags |= ECB_SENSE; - ti->senses++; - if (ecb->flags & ECB_NEXUS) - ti->lubusy &= ~(1 << sc_link->lun); - if (ecb == sc->sc_nexus) { - esp_select(sc, ecb); - } else { - esp_dequeue(sc, ecb); - TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); - if (sc->sc_state == ESP_IDLE) - esp_sched(sc); - } -} - -/* - * POST PROCESSING OF SCSI_CMD (usually current) - */ -void -esp_done(sc, ecb) - struct esp_softc *sc; - struct esp_ecb *ecb; -{ - struct scsi_xfer *xs = ecb->xs; - struct scsi_link *sc_link = xs->sc_link; - struct esp_tinfo *ti = &sc->sc_tinfo[sc_link->target]; - - ESP_TRACE(("[esp_done(error:%x)] ", xs->error)); - - /* - * Now, if we've come here with no error code, i.e. we've kept the - * initial XS_NOERROR, and the status code signals that we should - * check sense, we'll need to set up a request sense cmd block and - * push the command back into the ready queue *before* any other - * commands for this target/lunit, else we lose the sense info. - * We don't support chk sense conditions for the request sense cmd. - */ - if (xs->error == XS_NOERROR) { - if ((ecb->flags & ECB_ABORT) != 0) { - xs->error = XS_DRIVER_STUFFUP; - } else if ((ecb->flags & ECB_SENSE) != 0) { - xs->error = XS_SENSE; - } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) { - /* First, save the return values */ - xs->resid = ecb->dleft; - xs->status = ecb->stat; - esp_sense(sc, ecb); - return; - } else { - xs->resid = ecb->dleft; - } - } - - xs->flags |= ITSDONE; - -#ifdef ESP_DEBUG - if (esp_debug & ESP_SHOWMISC) { - if (xs->resid != 0) - printf("resid=%d ", xs->resid); - if (xs->error == XS_SENSE) - printf("sense=0x%02x\n", xs->sense.error_code); - else - printf("error=%d\n", xs->error); - } -#endif - - /* - * Remove the ECB from whatever queue it's on. - */ - if (ecb->flags & ECB_NEXUS) - ti->lubusy &= ~(1 << sc_link->lun); - if (ecb == sc->sc_nexus) { - sc->sc_nexus = NULL; - sc->sc_state = ESP_IDLE; - esp_sched(sc); - } else - esp_dequeue(sc, ecb); - - esp_free_ecb(sc, ecb, xs->flags); - ti->cmds++; - scsi_done(xs); -} - -void -esp_dequeue(sc, ecb) - struct esp_softc *sc; - struct esp_ecb *ecb; -{ - - if (ecb->flags & ECB_NEXUS) { - TAILQ_REMOVE(&sc->nexus_list, ecb, chain); - } else { - TAILQ_REMOVE(&sc->ready_list, ecb, chain); - } -} - -/* - * INTERRUPT/PROTOCOL ENGINE - */ - -/* - * Schedule an outgoing message by prioritizing it, and asserting - * attention on the bus. We can only do this when we are the initiator - * else there will be an illegal command interrupt. - */ -#define esp_sched_msgout(m) \ - do { \ - ESP_MISC(("esp_sched_msgout %d ", m)); \ - ESPCMD(sc, ESPCMD_SETATN); \ - sc->sc_flags |= ESP_ATN; \ - sc->sc_msgpriq |= (m); \ - } while (0) - int -esp_reselect(sc, message) - struct esp_softc *sc; - int message; +esp_dma_isintr(sc) + struct ncr53c9x_softc *sc; { - u_char selid, target, lun; - struct esp_ecb *ecb; - struct scsi_link *sc_link; - struct esp_tinfo *ti; + struct esp_softc *esc = (struct esp_softc *)sc; - /* - * The SCSI chip made a snapshot of the data bus while the reselection - * was being negotiated. This enables us to determine which target did - * the reselect. - */ - selid = sc->sc_selid & ~(1 << sc->sc_id); - if (selid & (selid - 1)) { - printf("%s: reselect with invalid selid %02x; sending DEVICE RESET\n", - sc->sc_dev.dv_xname, selid); - goto reset; - } - - /* - * Search wait queue for disconnected cmd - * The list should be short, so I haven't bothered with - * any more sophisticated structures than a simple - * singly linked list. - */ - target = ffs(selid) - 1; - lun = message & 0x07; - for (ecb = sc->nexus_list.tqh_first; ecb != NULL; - ecb = ecb->chain.tqe_next) { - sc_link = ecb->xs->sc_link; - if (sc_link->target == target && sc_link->lun == lun) - break; - } - if (ecb == NULL) { - printf("%s: reselect from target %d lun %d with no nexus; sending ABORT\n", - sc->sc_dev.dv_xname, target, lun); - goto abort; - } - - /* Make this nexus active again. */ - TAILQ_REMOVE(&sc->nexus_list, ecb, chain); - sc->sc_state = ESP_CONNECTED; - sc->sc_nexus = ecb; - ti = &sc->sc_tinfo[target]; - ti->lubusy |= (1 << lun); - esp_setsync(sc, ti); - - if (ecb->flags & ECB_RESET) - esp_sched_msgout(SEND_DEV_RESET); - else if (ecb->flags & ECB_ABORT) - esp_sched_msgout(SEND_ABORT); - - /* Do an implicit RESTORE POINTERS. */ - sc->sc_dp = ecb->daddr; - sc->sc_dleft = ecb->dleft; - - return (0); - -reset: - esp_sched_msgout(SEND_DEV_RESET); - return (1); - -abort: - esp_sched_msgout(SEND_ABORT); - return (1); + return (dma_isintr(esc->sc_dma)); } -#define IS1BYTEMSG(m) (((m) != 1 && (m) < 0x20) || (m) & 0x80) -#define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20) -#define ISEXTMSG(m) ((m) == 1) - -/* - * Get an incoming message as initiator. - * - * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a - * byte in the FIFO - */ void -esp_msgin(sc) - register struct esp_softc *sc; +esp_dma_reset(sc) + struct ncr53c9x_softc *sc; { - register int v; + struct esp_softc *esc = (struct esp_softc *)sc; - ESP_TRACE(("[esp_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen)); - - if ((ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) == 0) { - printf("%s: msgin: no msg byte available\n", - sc->sc_dev.dv_xname); - return; - } - - /* - * Prepare for a new message. A message should (according - * to the SCSI standard) be transmitted in one single - * MESSAGE_IN_PHASE. If we have been in some other phase, - * then this is a new message. - */ - if (sc->sc_prevphase != MESSAGE_IN_PHASE) { - sc->sc_flags &= ~ESP_DROP_MSGI; - sc->sc_imlen = 0; - } - - v = ESP_READ_REG(sc, ESP_FIFO); - ESP_MISC(("", v)); - -#if 0 - if (sc->sc_state == ESP_RESELECTED && sc->sc_imlen == 0) { - /* - * Which target is reselecting us? (The ID bit really) - */ - sc->sc_selid = v; - ESP_MISC(("selid=0x%2x ", sc->sc_selid)); - return; - } -#endif - - sc->sc_imess[sc->sc_imlen] = v; - - /* - * If we're going to reject the message, don't bother storing - * the incoming bytes. But still, we need to ACK them. - */ - - if ((sc->sc_flags & ESP_DROP_MSGI)) { - ESPCMD(sc, ESPCMD_MSGOK); - printf("", - sc->sc_imess[sc->sc_imlen]); - return; - } - - if (sc->sc_imlen >= ESP_MAX_MSG_LEN) { - esp_sched_msgout(SEND_REJECT); - sc->sc_flags |= ESP_DROP_MSGI; - } else { - sc->sc_imlen++; - /* - * This testing is suboptimal, but most - * messages will be of the one byte variety, so - * it should not effect performance - * significantly. - */ - if (sc->sc_imlen == 1 && IS1BYTEMSG(sc->sc_imess[0])) - goto gotit; - if (sc->sc_imlen == 2 && IS2BYTEMSG(sc->sc_imess[0])) - goto gotit; - if (sc->sc_imlen >= 3 && ISEXTMSG(sc->sc_imess[0]) && - sc->sc_imlen == sc->sc_imess[1] + 2) - goto gotit; - } - /* Ack what we have so far */ - ESPCMD(sc, ESPCMD_MSGOK); - return; - -gotit: - ESP_MSGS(("gotmsg(%x)", sc->sc_imess[0])); - /* - * Now we should have a complete message (1 byte, 2 byte - * and moderately long extended messages). We only handle - * extended messages which total length is shorter than - * ESP_MAX_MSG_LEN. Longer messages will be amputated. - */ - switch (sc->sc_state) { - struct esp_ecb *ecb; - struct esp_tinfo *ti; - - case ESP_CONNECTED: - ecb = sc->sc_nexus; - ti = &sc->sc_tinfo[ecb->xs->sc_link->target]; - - switch (sc->sc_imess[0]) { - case MSG_CMDCOMPLETE: - ESP_MSGS(("cmdcomplete ")); - if (sc->sc_dleft < 0) { - struct scsi_link *sc_link = ecb->xs->sc_link; - printf("%s: %ld extra bytes from %d:%d\n", - sc->sc_dev.dv_xname, -(long)sc->sc_dleft, - sc_link->target, sc_link->lun); - sc->sc_dleft = 0; - } - ecb->xs->resid = ecb->dleft = sc->sc_dleft; - sc->sc_state = ESP_CMDCOMPLETE; - break; - - case MSG_MESSAGE_REJECT: - if (esp_debug & ESP_SHOWMSGS) - printf("%s: our msg rejected by target\n", - sc->sc_dev.dv_xname); - switch (sc->sc_msgout) { - case SEND_SDTR: - sc->sc_flags &= ~ESP_SYNCHNEGO; - ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); - esp_setsync(sc, ti); - break; - case SEND_INIT_DET_ERR: - goto abort; - } - break; - - case MSG_NOOP: - ESP_MSGS(("noop ")); - break; - - case MSG_DISCONNECT: - ESP_MSGS(("disconnect ")); - ti->dconns++; - sc->sc_state = ESP_DISCONNECT; - if ((ecb->xs->sc_link->quirks & SDEV_AUTOSAVE) == 0) - break; - /*FALLTHROUGH*/ - - case MSG_SAVEDATAPOINTER: - ESP_MSGS(("save datapointer ")); - ecb->daddr = sc->sc_dp; - ecb->dleft = sc->sc_dleft; - break; - - case MSG_RESTOREPOINTERS: - ESP_MSGS(("restore datapointer ")); - sc->sc_dp = ecb->daddr; - sc->sc_dleft = ecb->dleft; - break; - - case MSG_EXTENDED: - ESP_MSGS(("extended(%x) ", sc->sc_imess[2])); - switch (sc->sc_imess[2]) { - case MSG_EXT_SDTR: - ESP_MSGS(("SDTR period %d, offset %d ", - sc->sc_imess[3], sc->sc_imess[4])); - if (sc->sc_imess[1] != 3) - goto reject; - ti->period = sc->sc_imess[3]; - ti->offset = sc->sc_imess[4]; - ti->flags &= ~T_NEGOTIATE; - if (sc->sc_minsync == 0 || - ti->offset == 0 || - ti->period > 124) { - printf("%s:%d: async\n", "esp", - ecb->xs->sc_link->target); - if ((sc->sc_flags&ESP_SYNCHNEGO) == 0) { - /* target initiated negotiation */ - ti->offset = 0; - ti->flags &= ~T_SYNCMODE; - esp_sched_msgout(SEND_SDTR); - } else { - /* we are async */ - ti->flags &= ~T_SYNCMODE; - } - } else { - int r = 250/ti->period; - int s = (100*250)/ti->period - 100*r; - int p; - - p = esp_stp2cpb(sc, ti->period); - ti->period = esp_cpb2stp(sc, p); -#ifdef ESP_DEBUG - sc_print_addr(ecb->xs->sc_link); - printf("max sync rate %d.%02dMb/s\n", - r, s); -#endif - if ((sc->sc_flags&ESP_SYNCHNEGO) == 0) { - /* target initiated negotiation */ - if (ti->period < sc->sc_minsync) - ti->period = sc->sc_minsync; - if (ti->offset > 15) - ti->offset = 15; - ti->flags &= ~T_SYNCMODE; - esp_sched_msgout(SEND_SDTR); - } else { - /* we are sync */ - ti->flags |= T_SYNCMODE; - } - } - sc->sc_flags &= ~ESP_SYNCHNEGO; - esp_setsync(sc, ti); - break; - - default: - printf("%s: unrecognized MESSAGE EXTENDED; sending REJECT\n", - sc->sc_dev.dv_xname); - goto reject; - } - break; - - default: - ESP_MSGS(("ident ")); - printf("%s: unrecognized MESSAGE; sending REJECT\n", - sc->sc_dev.dv_xname); - reject: - esp_sched_msgout(SEND_REJECT); - break; - } - break; - - case ESP_RESELECTED: - if (!MSG_ISIDENTIFY(sc->sc_imess[0])) { - printf("%s: reselect without IDENTIFY; sending DEVICE RESET\n", - sc->sc_dev.dv_xname); - goto reset; - } - - (void) esp_reselect(sc, sc->sc_imess[0]); - break; - - default: - printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", - sc->sc_dev.dv_xname); - reset: - esp_sched_msgout(SEND_DEV_RESET); - break; - - abort: - esp_sched_msgout(SEND_ABORT); - break; - } - - /* Ack last message byte */ - ESPCMD(sc, ESPCMD_MSGOK); - - /* Done, reset message pointer. */ - sc->sc_flags &= ~ESP_DROP_MSGI; - sc->sc_imlen = 0; + dma_reset(esc->sc_dma); } - -/* - * Send the highest priority, scheduled message - */ -void -esp_msgout(sc) - register struct esp_softc *sc; -{ - struct esp_tinfo *ti; - struct esp_ecb *ecb; - size_t size; - - ESP_TRACE(("[esp_msgout(priq:%x, prevphase:%x)]", sc->sc_msgpriq, sc->sc_prevphase)); - - if (sc->sc_flags & ESP_ATN) { - if (sc->sc_prevphase != MESSAGE_OUT_PHASE) { - new: - ESPCMD(sc, ESPCMD_FLUSH); - DELAY(1); - sc->sc_msgoutq = 0; - sc->sc_omlen = 0; - } - } else { - if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { - esp_sched_msgout(sc->sc_msgoutq); - goto new; - } else { - printf("esp at line %d: unexpected MESSAGE OUT phase\n", __LINE__); - } - } - - if (sc->sc_omlen == 0) { - /* Pick up highest priority message */ - sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq; - sc->sc_msgoutq |= sc->sc_msgout; - sc->sc_msgpriq &= ~sc->sc_msgout; - sc->sc_omlen = 1; /* "Default" message len */ - switch (sc->sc_msgout) { - case SEND_SDTR: - ecb = sc->sc_nexus; - ti = &sc->sc_tinfo[ecb->xs->sc_link->target]; - sc->sc_omess[0] = MSG_EXTENDED; - sc->sc_omess[1] = 3; - sc->sc_omess[2] = MSG_EXT_SDTR; - sc->sc_omess[3] = ti->period; - sc->sc_omess[4] = ti->offset; - sc->sc_omlen = 5; - if ((sc->sc_flags & ESP_SYNCHNEGO) == 0) { - ti->flags |= T_SYNCMODE; - esp_setsync(sc, ti); - } - break; - case SEND_IDENTIFY: - if (sc->sc_state != ESP_CONNECTED) { - printf("esp at line %d: no nexus\n", __LINE__); - } - ecb = sc->sc_nexus; - sc->sc_omess[0] = MSG_IDENTIFY(ecb->xs->sc_link->lun,0); - break; - case SEND_DEV_RESET: - sc->sc_flags |= ESP_ABORTING; - sc->sc_omess[0] = MSG_BUS_DEV_RESET; - ecb = sc->sc_nexus; - ti = &sc->sc_tinfo[ecb->xs->sc_link->target]; - ti->flags &= ~T_SYNCMODE; - ti->flags |= T_NEGOTIATE; - break; - case SEND_PARITY_ERROR: - sc->sc_omess[0] = MSG_PARITY_ERROR; - break; - case SEND_ABORT: - sc->sc_flags |= ESP_ABORTING; - sc->sc_omess[0] = MSG_ABORT; - break; - case SEND_INIT_DET_ERR: - sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; - break; - case SEND_REJECT: - sc->sc_omess[0] = MSG_MESSAGE_REJECT; - break; - default: - ESPCMD(sc, ESPCMD_RSTATN); - sc->sc_flags &= ~ESP_ATN; - sc->sc_omess[0] = MSG_NOOP; - break; - } - sc->sc_omp = sc->sc_omess; - } - -#if 1 - /* (re)send the message */ - size = min(sc->sc_omlen, sc->sc_maxxfer); - DMA_SETUP(sc->sc_dma, &sc->sc_omp, &sc->sc_omlen, 0, &size); - /* Program the SCSI counter */ - ESP_WRITE_REG(sc, ESP_TCL, size); - ESP_WRITE_REG(sc, ESP_TCM, size >> 8); - if (sc->sc_cfg2 & ESPCFG2_FE) { - ESP_WRITE_REG(sc, ESP_TCH, size >> 16); - } - /* load the count in */ - ESPCMD(sc, ESPCMD_NOP|ESPCMD_DMA); - ESPCMD(sc, ESPCMD_TRANS|ESPCMD_DMA); - DMA_GO(sc->sc_dma); -#else - { int i; - for (i = 0; i < sc->sc_omlen; i++) - ESP_WRITE_REG(sc, FIFO, sc->sc_omess[i]); - ESPCMD(sc, ESPCMD_TRANS); - sc->sc_omlen = 0; - } -#endif -} - -/* - * This is the most critical part of the driver, and has to know - * how to deal with *all* error conditions and phases from the SCSI - * bus. If there are no errors and the DMA was active, then call the - * DMA pseudo-interrupt handler. If this returns 1, then that was it - * and we can return from here without further processing. - * - * Most of this needs verifying. - */ int -espintr(sc) - register struct esp_softc *sc; +esp_dma_intr(sc) + struct ncr53c9x_softc *sc; { - register struct esp_ecb *ecb; - register struct scsi_link *sc_link; - struct esp_tinfo *ti; - int loop; - size_t size; + struct esp_softc *esc = (struct esp_softc *)sc; - ESP_TRACE(("[espintr]")); + return (espdmaintr(esc->sc_dma)); +} - /* - * I have made some (maybe seriously flawed) assumptions here, - * but basic testing (uncomment the printf() below), show that - * certainly something happens when this loop is here. - * - * The idea is that many of the SCSI operations take very little - * time, and going away and getting interrupted is too high an - * overhead to pay. For example, selecting, sending a message - * and command and then doing some work can be done in one "pass". - * - * The DELAY is not variable because I do not understand that the - * DELAY loop should be fixed-time regardless of CPU speed, but - * I am *assuming* that the faster SCSI processors get things done - * quicker (sending a command byte etc), and so there is no - * need to be too slow. - * - * This is a heuristic. It is 2 when at 20Mhz, 2 at 25Mhz and 1 - * at 40Mhz. This needs testing. - */ - for (loop = 0; 1;loop++, DELAY(50/sc->sc_freq)) { - /* a feeling of deja-vu */ - if (!DMA_ISINTR(sc->sc_dma)) - return (loop != 0); -#if 0 - if (loop) - printf("*"); -#endif +int +esp_dma_setup(sc, addr, len, datain, dmasize) + struct ncr53c9x_softc *sc; + caddr_t *addr; + size_t *len; + int datain; + size_t *dmasize; +{ + struct esp_softc *esc = (struct esp_softc *)sc; - /* and what do the registers say... */ - espreadregs(sc); - - sc->sc_intrcnt.ev_count++; - - /* - * At the moment, only a SCSI Bus Reset or Illegal - * Command are classed as errors. A disconnect is a - * valid condition, and we let the code check is the - * "ESP_BUSFREE_OK" flag was set before declaring it - * and error. - * - * Also, the status register tells us about "Gross - * Errors" and "Parity errors". Only the Gross Error - * is really bad, and the parity errors are dealt - * with later - * - * TODO - * If there are too many parity error, go to slow - * cable mode ? - */ - - /* SCSI Reset */ - if (sc->sc_espintr & ESPINTR_SBR) { - if (ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) { - ESPCMD(sc, ESPCMD_FLUSH); - DELAY(1); - } - if (sc->sc_state != ESP_SBR) { - printf("%s: SCSI bus reset\n", - sc->sc_dev.dv_xname); - esp_init(sc, 0); /* Restart everything */ - return 1; - } -#if 0 - /*XXX*/ printf("\n", - sc->sc_espintr, sc->sc_espstat, - sc->sc_espstep); -#endif - if (sc->sc_nexus) - panic("%s: nexus in reset state", - sc->sc_dev.dv_xname); - goto sched; - } - - ecb = sc->sc_nexus; - -#define ESPINTR_ERR (ESPINTR_SBR|ESPINTR_ILL) - if (sc->sc_espintr & ESPINTR_ERR || - sc->sc_espstat & ESPSTAT_GE) { - - if (sc->sc_espstat & ESPSTAT_GE) { - /* no target ? */ - if (ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) { - ESPCMD(sc, ESPCMD_FLUSH); - DELAY(1); - } - if (sc->sc_state == ESP_CONNECTED || - sc->sc_state == ESP_SELECTING) { - ecb->xs->error = XS_DRIVER_STUFFUP; - esp_done(sc, ecb); - } - return 1; - } - - if (sc->sc_espintr & ESPINTR_ILL) { - /* illegal command, out of sync ? */ - printf("%s: illegal command: 0x%x (state %d, phase %x, prevphase %x)\n", - sc->sc_dev.dv_xname, sc->sc_lastcmd, - sc->sc_state, sc->sc_phase, - sc->sc_prevphase); - if (ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) { - ESPCMD(sc, ESPCMD_FLUSH); - DELAY(1); - } - esp_init(sc, 0); /* Restart everything */ - return 1; - } - } - - /* - * Call if DMA is active. - * - * If DMA_INTR returns true, then maybe go 'round the loop - * again in case there is no more DMA queued, but a phase - * change is expected. - */ - if (DMA_ISACTIVE(sc->sc_dma)) { - int r = DMA_INTR(sc->sc_dma); - if (r == -1) { - printf("%s: DMA error; resetting\n", - sc->sc_dev.dv_xname); - esp_init(sc, 1); - } - /* If DMA active here, then go back to work... */ - if (DMA_ISACTIVE(sc->sc_dma)) - return 1; - - if (sc->sc_dleft == 0 && - (sc->sc_espstat & ESPSTAT_TC) == 0) - printf("%s: !TC [intr %x, stat %x, step %d]" - " prevphase %x, resid %x\n", - sc->sc_dev.dv_xname, - sc->sc_espintr, - sc->sc_espstat, - sc->sc_espstep, - sc->sc_prevphase, - ecb?ecb->dleft:-1); - } - -#if 0 /* Unreliable on some ESP revisions? */ - if ((sc->sc_espstat & ESPSTAT_INT) == 0) { - printf("%s: spurious interrupt\n", sc->sc_dev.dv_xname); - return 1; - } -#endif - - /* - * check for less serious errors - */ - if (sc->sc_espstat & ESPSTAT_PE) { - printf("%s: SCSI bus parity error\n", - sc->sc_dev.dv_xname); - if (sc->sc_prevphase == MESSAGE_IN_PHASE) - esp_sched_msgout(SEND_PARITY_ERROR); - else - esp_sched_msgout(SEND_INIT_DET_ERR); - } - - if (sc->sc_espintr & ESPINTR_DIS) { - ESP_MISC(("", - sc->sc_espintr,sc->sc_espstat,sc->sc_espstep)); - if (ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) { - ESPCMD(sc, ESPCMD_FLUSH); - DELAY(1); - } - /* - * This command must (apparently) be issued within - * 250mS of a disconnect. So here you are... - */ - ESPCMD(sc, ESPCMD_ENSEL); - switch (sc->sc_state) { - case ESP_RESELECTED: - goto sched; - - case ESP_SELECTING: - ecb->xs->error = XS_SELTIMEOUT; - goto finish; - - case ESP_CONNECTED: - if ((sc->sc_flags & ESP_SYNCHNEGO)) { -#ifdef ESP_DEBUG - if (ecb) - sc_print_addr(ecb->xs->sc_link); - printf("sync nego not completed!\n"); -#endif - ti = &sc->sc_tinfo[ecb->xs->sc_link->target]; - sc->sc_flags &= ~ESP_SYNCHNEGO; - ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); - } - - /* it may be OK to disconnect */ - if ((sc->sc_flags & ESP_ABORTING) == 0) { - /* - * Section 5.1.1 of the SCSI 2 spec - * suggests issuing a REQUEST SENSE - * following an unexpected disconnect. - * Some devices go into a contingent - * allegiance condition when - * disconnecting, and this is necessary - * to clean up their state. - */ - printf("%s: unexpected disconnect; ", - sc->sc_dev.dv_xname); - if (ecb->flags & ECB_SENSE) { - printf("resetting\n"); - goto reset; - } - printf("sending REQUEST SENSE\n"); - esp_sense(sc, ecb); - goto out; - } - - ecb->xs->error = XS_DRIVER_STUFFUP; - goto finish; - - case ESP_DISCONNECT: - TAILQ_INSERT_HEAD(&sc->nexus_list, ecb, chain); - sc->sc_nexus = NULL; - goto sched; - - case ESP_CMDCOMPLETE: - goto finish; - } - } - - switch (sc->sc_state) { - - case ESP_SBR: - printf("%s: waiting for SCSI Bus Reset to happen\n", - sc->sc_dev.dv_xname); - return 1; - - case ESP_RESELECTED: - /* - * we must be continuing a message ? - */ - if (sc->sc_phase != MESSAGE_IN_PHASE) { - printf("%s: target didn't identify\n", - sc->sc_dev.dv_xname); - esp_init(sc, 1); - return 1; - } -printf("<>"); -#if XXXX - esp_msgin(sc); - if (sc->sc_state != ESP_CONNECTED) { - /* IDENTIFY fail?! */ - printf("%s: identify failed\n", - sc->sc_dev.dv_xname); - esp_init(sc, 1); - return 1; - } -#endif - break; - - case ESP_IDLE: -if (sc->sc_flags & ESP_ICCS) printf("[[esp: BUMMER]]"); - case ESP_SELECTING: - sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0; - sc->sc_flags = 0; - - if (sc->sc_espintr & ESPINTR_RESEL) { - /* - * If we're trying to select a - * target ourselves, push our command - * back into the ready list. - */ - if (sc->sc_state == ESP_SELECTING) { - ESP_MISC(("backoff selector ")); - sc_link = sc->sc_nexus->xs->sc_link; - ti = &sc->sc_tinfo[sc_link->target]; - TAILQ_INSERT_HEAD(&sc->ready_list, - sc->sc_nexus, chain); - ecb = sc->sc_nexus = NULL; - } - sc->sc_state = ESP_RESELECTED; - if (sc->sc_phase != MESSAGE_IN_PHASE) { - /* - * Things are seriously fucked up. - * Pull the brakes, i.e. reset - */ - printf("%s: target didn't identify\n", - sc->sc_dev.dv_xname); - esp_init(sc, 1); - return 1; - } - if ((ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) != 2) { - printf("%s: RESELECT: %d bytes in FIFO!\n", - sc->sc_dev.dv_xname, - ESP_READ_REG(sc, ESP_FFLAG) & - ESPFIFO_FF); - esp_init(sc, 1); - return 1; - } - sc->sc_selid = ESP_READ_REG(sc, ESP_FIFO); - ESP_MISC(("selid=0x%2x ", sc->sc_selid)); - esp_msgin(sc); /* Handle identify message */ - if (sc->sc_state != ESP_CONNECTED) { - /* IDENTIFY fail?! */ - printf("%s: identify failed\n", - sc->sc_dev.dv_xname); - esp_init(sc, 1); - return 1; - } - continue; /* ie. next phase expected soon */ - } - -#define ESPINTR_DONE (ESPINTR_FC|ESPINTR_BS) - if ((sc->sc_espintr & ESPINTR_DONE) == ESPINTR_DONE) { - ecb = sc->sc_nexus; - if (!ecb) - panic("esp: not nexus at sc->sc_nexus"); - - sc_link = ecb->xs->sc_link; - ti = &sc->sc_tinfo[sc_link->target]; - - switch (sc->sc_espstep) { - case 0: - printf("%s: select timeout/no disconnect\n", - sc->sc_dev.dv_xname); - ecb->xs->error = XS_SELTIMEOUT; - goto finish; - case 1: - if ((ti->flags & T_NEGOTIATE) == 0) { - printf("%s: step 1 & !NEG\n", - sc->sc_dev.dv_xname); - goto reset; - } - if (sc->sc_phase != MESSAGE_OUT_PHASE) { - printf("%s: !MSGOUT\n", - sc->sc_dev.dv_xname); - goto reset; - } - /* Start negotiating */ - ti->period = sc->sc_minsync; - ti->offset = 15; - sc->sc_flags |= ESP_SYNCHNEGO; - esp_sched_msgout(SEND_SDTR); - break; - case 3: - /* - * Grr, this is supposed to mean - * "target left command phase - * prematurely". It seems to happen - * regularly when sync mode is on. - * Look at FIFO to see if command - * went out. - * (Timing problems?) - */ - if ((ESP_READ_REG(sc, ESP_FFLAG)&ESPFIFO_FF) == 0) { - /* Hope for the best.. */ - break; - } - printf("(%s:%d:%d): selection failed;" - " %d left in FIFO " - "[intr %x, stat %x, step %d]\n", - sc->sc_dev.dv_xname, - sc_link->target, - sc_link->lun, - ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF, - sc->sc_espintr, sc->sc_espstat, - sc->sc_espstep); - ESPCMD(sc, ESPCMD_FLUSH); - esp_sched_msgout(SEND_ABORT); - return 1; - case 2: - /* Select stuck at Command Phase */ - ESPCMD(sc, ESPCMD_FLUSH); - case 4: - /* So far, everything went fine */ - break; - } -#if 0 - if (ecb->xs->flags & SCSI_RESET) - esp_sched_msgout(SEND_DEV_RESET); - else if (ti->flags & T_NEGOTIATE) - esp_sched_msgout( - SEND_IDENTIFY | SEND_SDTR); - else - esp_sched_msgout(SEND_IDENTIFY); -#endif - - ecb->flags |= ECB_NEXUS; - ti->lubusy |= (1 << sc_link->lun); - - sc->sc_prevphase = INVALID_PHASE; /* ?? */ - /* Do an implicit RESTORE POINTERS. */ - sc->sc_dp = ecb->daddr; - sc->sc_dleft = ecb->dleft; - - /* On our first connection, schedule a timeout. */ - if ((ecb->xs->flags & SCSI_POLL) == 0) - timeout(esp_timeout, ecb, (ecb->timeout * hz) / 1000); - - sc->sc_state = ESP_CONNECTED; - break; - } else { - printf("%s: unexpected status after select" - ": [intr %x, stat %x, step %x]\n", - sc->sc_dev.dv_xname, - sc->sc_espintr, sc->sc_espstat, - sc->sc_espstep); - ESPCMD(sc, ESPCMD_FLUSH); - DELAY(1); - goto reset; - } - if (sc->sc_state == ESP_IDLE) { - printf("%s: stray interrupt\n", sc->sc_dev.dv_xname); - return 0; - } - break; - - case ESP_CONNECTED: - if (sc->sc_flags & ESP_ICCS) { - u_char msg; - - sc->sc_flags &= ~ESP_ICCS; - - if (!(sc->sc_espintr & ESPINTR_DONE)) { - printf("%s: ICCS: " - ": [intr %x, stat %x, step %x]\n", - sc->sc_dev.dv_xname, - sc->sc_espintr, sc->sc_espstat, - sc->sc_espstep); - } - if ((ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) != 2) { - int i = (ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) - 2; - while (i--) - (void) ESP_READ_REG(sc, ESP_FIFO); - } - ecb->stat = ESP_READ_REG(sc, ESP_FIFO); - msg = ESP_READ_REG(sc, ESP_FIFO); - ESP_PHASE(("", ecb->stat, msg)); - if (msg == MSG_CMDCOMPLETE) { - ecb->xs->resid = ecb->dleft = sc->sc_dleft; - sc->sc_state = ESP_CMDCOMPLETE; - } else - printf("%s: STATUS_PHASE: msg %d\n", - sc->sc_dev.dv_xname, msg); - ESPCMD(sc, ESPCMD_MSGOK); - continue; /* ie. wait for disconnect */ - } - break; - default: - panic("%s: invalid state: %d", - sc->sc_dev.dv_xname, - sc->sc_state); - } - - /* - * Driver is now in state ESP_CONNECTED, i.e. we - * have a current command working the SCSI bus. - */ - if (sc->sc_state != ESP_CONNECTED || ecb == NULL) { - panic("esp no nexus"); - } - - switch (sc->sc_phase) { - case MESSAGE_OUT_PHASE: - ESP_PHASE(("MESSAGE_OUT_PHASE ")); - esp_msgout(sc); - sc->sc_prevphase = MESSAGE_OUT_PHASE; - break; - case MESSAGE_IN_PHASE: - ESP_PHASE(("MESSAGE_IN_PHASE ")); - if (sc->sc_espintr & ESPINTR_BS) { - ESPCMD(sc, ESPCMD_FLUSH); - sc->sc_flags |= ESP_WAITI; - ESPCMD(sc, ESPCMD_TRANS); - } else if (sc->sc_espintr & ESPINTR_FC) { - if ((sc->sc_flags & ESP_WAITI) == 0) { - printf("%s: MSGIN: unexpected FC bit: " - "[intr %x, stat %x, step %x]\n", - sc->sc_dev.dv_xname, - sc->sc_espintr, sc->sc_espstat, - sc->sc_espstep); - } - sc->sc_flags &= ~ESP_WAITI; - esp_msgin(sc); - } else { - printf("%s: MSGIN: weird bits: " - "[intr %x, stat %x, step %x]\n", - sc->sc_dev.dv_xname, - sc->sc_espintr, sc->sc_espstat, - sc->sc_espstep); - } - sc->sc_prevphase = MESSAGE_IN_PHASE; - break; - case COMMAND_PHASE: { - /* well, this means send the command again */ - u_char *cmd = (u_char *)&ecb->cmd; - int i; - - ESP_PHASE(("COMMAND_PHASE 0x%02x (%d) ", - ecb->cmd.opcode, ecb->clen)); - if (ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) { - ESPCMD(sc, ESPCMD_FLUSH); - DELAY(1); - } - /* Now the command into the FIFO */ - for (i = 0; i < ecb->clen; i++) - ESP_WRITE_REG(sc, ESP_FIFO, *cmd++); - ESPCMD(sc, ESPCMD_TRANS); - sc->sc_prevphase = COMMAND_PHASE; - } - break; - case DATA_OUT_PHASE: - ESP_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft)); - ESPCMD(sc, ESPCMD_FLUSH); - size = min(sc->sc_dleft, sc->sc_maxxfer); - DMA_SETUP(sc->sc_dma, &sc->sc_dp, &sc->sc_dleft, - 0, &size); - sc->sc_prevphase = DATA_OUT_PHASE; - goto setup_xfer; - case DATA_IN_PHASE: - ESP_PHASE(("DATA_IN_PHASE ")); - if (sc->sc_rev == ESP100) - ESPCMD(sc, ESPCMD_FLUSH); - size = min(sc->sc_dleft, sc->sc_maxxfer); - DMA_SETUP(sc->sc_dma, &sc->sc_dp, &sc->sc_dleft, - 1, &size); - sc->sc_prevphase = DATA_IN_PHASE; - setup_xfer: - /* Program the SCSI counter */ - ESP_WRITE_REG(sc, ESP_TCL, size); - ESP_WRITE_REG(sc, ESP_TCM, size >> 8); - if (sc->sc_cfg2 & ESPCFG2_FE) { - ESP_WRITE_REG(sc, ESP_TCH, size >> 16); - } - /* load the count in */ - ESPCMD(sc, ESPCMD_NOP|ESPCMD_DMA); - - /* - * Note that if `size' is 0, we've already transceived - * all the bytes we want but we're still in DATA PHASE. - * Apparently, the device needs padding. Also, a - * transfer size of 0 means "maximum" to the chip - * DMA logic. - */ - ESPCMD(sc, - (size==0?ESPCMD_TRPAD:ESPCMD_TRANS)|ESPCMD_DMA); - DMA_GO(sc->sc_dma); - return 1; - case STATUS_PHASE: - ESP_PHASE(("STATUS_PHASE ")); - sc->sc_flags |= ESP_ICCS; - ESPCMD(sc, ESPCMD_ICCS); - sc->sc_prevphase = STATUS_PHASE; - break; - case INVALID_PHASE: - break; - default: - printf("%s: unexpected bus phase; resetting\n", - sc->sc_dev.dv_xname); - goto reset; - } - } - panic("esp: should not get here.."); - -reset: - esp_init(sc, 1); - return 1; - -finish: - untimeout(esp_timeout, ecb); - esp_done(sc, ecb); - goto out; - -sched: - sc->sc_state = ESP_IDLE; - esp_sched(sc); - goto out; - -out: - return 1; + return (dma_setup(esc->sc_dma, addr, len, datain, dmasize)); } void -esp_abort(sc, ecb) - struct esp_softc *sc; - struct esp_ecb *ecb; +esp_dma_go(sc) + struct ncr53c9x_softc *sc; { + struct esp_softc *esc = (struct esp_softc *)sc; - /* 2 secs for the abort */ - ecb->timeout = ESP_ABORT_TIMEOUT; - ecb->flags |= ECB_ABORT; - - if (ecb == sc->sc_nexus) { - /* - * If we're still selecting, the message will be scheduled - * after selection is complete. - */ - if (sc->sc_state == ESP_CONNECTED) - esp_sched_msgout(SEND_ABORT); - - /* - * Reschedule timeout. First, cancel a queued timeout (if any) - * in case someone decides to call esp_abort() from elsewhere. - */ - untimeout(esp_timeout, ecb); - timeout(esp_timeout, ecb, (ecb->timeout * hz) / 1000); - } else { - esp_dequeue(sc, ecb); - TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); - if (sc->sc_state == ESP_IDLE) - esp_sched(sc); - } + /* Start DMA */ + DMACSR(esc->sc_dma) |= D_EN_DMA; + esc->sc_dma->sc_active = 1; } void -esp_timeout(arg) - void *arg; +esp_dma_stop(sc) + struct ncr53c9x_softc *sc; { - struct esp_ecb *ecb = arg; - struct scsi_xfer *xs = ecb->xs; - struct scsi_link *sc_link = xs->sc_link; - struct esp_softc *sc = sc_link->adapter_softc; - int s; + struct esp_softc *esc = (struct esp_softc *)sc; - sc_print_addr(sc_link); - printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], " - "", - sc->sc_dev.dv_xname, - ecb, ecb->flags, ecb->dleft, ecb->stat, - sc->sc_state, sc->sc_nexus, sc->sc_phase, sc->sc_prevphase, - (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout, - DMA_ISACTIVE(sc->sc_dma) ? "DMA active" : ""); -#if ESP_DEBUG > 0 - printf("TRACE: %s.", ecb->trace); -#endif - - s = splbio(); - - if (ecb->flags & ECB_ABORT) { - /* abort timed out */ - printf(" AGAIN\n"); - esp_init(sc, 1); - } else { - /* abort the operation that has timed out */ - printf("\n"); - xs->error = XS_TIMEOUT; - esp_abort(sc, ecb); - } - - splx(s); + DMACSR(esc->sc_dma) &= ~D_EN_DMA; +} + +int +esp_dma_isactive(sc) + struct ncr53c9x_softc *sc; +{ + struct esp_softc *esc = (struct esp_softc *)sc; + + return (esc->sc_dma->sc_active); } diff --git a/sys/arch/sun3x/dev/espreg.h b/sys/arch/sun3x/dev/espreg.h deleted file mode 100644 index c18fb89fc69d..000000000000 --- a/sys/arch/sun3x/dev/espreg.h +++ /dev/null @@ -1,148 +0,0 @@ -/* $NetBSD: espreg.h,v 1.2 1997/03/15 18:11:04 is Exp $ */ - -/* - * Copyright (c) 1994 Peter Galbavy. All rights reserved. - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Peter Galbavy. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Register addresses, relative to some base address - */ - -#define ESP_TCL 0x00 /* RW - Transfer Count Low */ -#define ESP_TCM 0x01 /* RW - Transfer Count Mid */ -#define ESP_TCH 0x0e /* RW - Transfer Count High */ - /* NOT on 53C90 */ - -#define ESP_FIFO 0x02 /* RW - FIFO data */ - -#define ESP_CMD 0x03 /* RW - Command (2 deep) */ -#define ESPCMD_DMA 0x80 /* DMA Bit */ -#define ESPCMD_NOP 0x00 /* No Operation */ -#define ESPCMD_FLUSH 0x01 /* Flush FIFO */ -#define ESPCMD_RSTCHIP 0x02 /* Reset Chip */ -#define ESPCMD_RSTSCSI 0x03 /* Reset SCSI Bus */ -#define ESPCMD_RESEL 0x40 /* Reselect Sequence */ -#define ESPCMD_SELNATN 0x41 /* Select without ATN */ -#define ESPCMD_SELATN 0x42 /* Select with ATN */ -#define ESPCMD_SELATNS 0x43 /* Select with ATN & Stop */ -#define ESPCMD_ENSEL 0x44 /* Enable (Re)Selection */ -#define ESPCMD_DISSEL 0x45 /* Disable (Re)Selection */ -#define ESPCMD_SELATN3 0x46 /* Select with ATN3 */ -#define ESPCMD_RESEL3 0x47 /* Reselect3 Sequence */ -#define ESPCMD_SNDMSG 0x20 /* Send Message */ -#define ESPCMD_SNDSTAT 0x21 /* Send Status */ -#define ESPCMD_SNDDATA 0x22 /* Send Data */ -#define ESPCMD_DISCSEQ 0x23 /* Disconnect Sequence */ -#define ESPCMD_TERMSEQ 0x24 /* Terminate Sequence */ -#define ESPCMD_TCCS 0x25 /* Target Command Comp Seq */ -#define ESPCMD_DISC 0x27 /* Disconnect */ -#define ESPCMD_RECMSG 0x28 /* Receive Message */ -#define ESPCMD_RECCMD 0x29 /* Receive Command */ -#define ESPCMD_RECDATA 0x2a /* Receive Data */ -#define ESPCMD_RECCSEQ 0x2b /* Receive Command Sequence*/ -#define ESPCMD_ABORT 0x04 /* Target Abort DMA */ -#define ESPCMD_TRANS 0x10 /* Transfer Information */ -#define ESPCMD_ICCS 0x11 /* Initiator Cmd Comp Seq */ -#define ESPCMD_MSGOK 0x12 /* Message Accepted */ -#define ESPCMD_TRPAD 0x18 /* Transfer Pad */ -#define ESPCMD_SETATN 0x1a /* Set ATN */ -#define ESPCMD_RSTATN 0x1b /* Reset ATN */ - -#define ESP_STAT 0x04 /* RO - Status */ -#define ESPSTAT_INT 0x80 /* Interrupt */ -#define ESPSTAT_GE 0x40 /* Gross Error */ -#define ESPSTAT_PE 0x20 /* Parity Error */ -#define ESPSTAT_TC 0x10 /* Terminal Count */ -#define ESPSTAT_VGC 0x08 /* Valid Group Code */ -#define ESPSTAT_PHASE 0x07 /* Phase bits */ - -#define ESP_SELID 0x04 /* WO - Select/Reselect Bus ID */ - -#define ESP_INTR 0x05 /* RO - Interrupt */ -#define ESPINTR_SBR 0x80 /* SCSI Bus Reset */ -#define ESPINTR_ILL 0x40 /* Illegal Command */ -#define ESPINTR_DIS 0x20 /* Disconnect */ -#define ESPINTR_BS 0x10 /* Bus Service */ -#define ESPINTR_FC 0x08 /* Function Complete */ -#define ESPINTR_RESEL 0x04 /* Reselected */ -#define ESPINTR_SELATN 0x02 /* Select with ATN */ -#define ESPINTR_SEL 0x01 /* Selected */ - -#define ESP_TIMEOUT 0x05 /* WO - Select/Reselect Timeout */ - -#define ESP_STEP 0x06 /* RO - Sequence Step */ -#define ESPSTEP_MASK 0x07 /* the last 3 bits */ -#define ESPSTEP_DONE 0x04 /* command went out */ - -#define ESP_SYNCTP 0x06 /* WO - Synch Transfer Period */ - /* Default 5 (53C9X) */ - -#define ESP_FFLAG 0x07 /* RO - FIFO Flags */ -#define ESPFIFO_SS 0xe0 /* Sequence Step (Dup) */ -#define ESPFIFO_FF 0x1f /* Bytes in FIFO */ - -#define ESP_SYNCOFF 0x07 /* WO - Synch Offset */ - /* 0 = ASYNC */ - /* 1 - 15 = SYNC bytes */ - -#define ESP_CFG1 0x08 /* RW - Configuration #1 */ -#define ESPCFG1_SLOW 0x80 /* Slow Cable Mode */ -#define ESPCFG1_SRR 0x40 /* SCSI Reset Rep Int Dis */ -#define ESPCFG1_PTEST 0x20 /* Parity Test Mod */ -#define ESPCFG1_PARENB 0x10 /* Enable Parity Check */ -#define ESPCFG1_CTEST 0x08 /* Enable Chip Test */ -#define ESPCFG1_BUSID 0x07 /* Bus ID */ - -#define ESP_CCF 0x09 /* WO - Clock Conversion Factor */ - /* 0 = 35.01 - 40Mhz */ - /* NEVER SET TO 1 */ - /* 2 = 10Mhz */ - /* 3 = 10.01 - 15Mhz */ - /* 4 = 15.01 - 20Mhz */ - /* 5 = 20.01 - 25Mhz */ - /* 6 = 25.01 - 30Mhz */ - /* 7 = 30.01 - 35Mhz */ - -#define ESP_TEST 0x0a /* WO - Test (Chip Test Only) */ - -#define ESP_CFG2 0x0b /* RW - Configuration #2 */ -#define ESPCFG2_RSVD 0xa0 /* reserved */ -#define ESPCFG2_FE 0x40 /* Features Enable */ -#define ESPCFG2_DREQ 0x10 /* DREQ High Impedance */ -#define ESPCFG2_SCSI2 0x08 /* SCSI-2 Enable */ -#define ESPCFG2_BPA 0x04 /* Target Bad Parity Abort */ -#define ESPCFG2_RPE 0x02 /* Register Parity Error */ -#define ESPCFG2_DPE 0x01 /* DMA Parity Error */ - -/* Config #3 only on 53C9X */ -#define ESP_CFG3 0x0c /* RW - Configuration #3 */ -#define ESPCFG3_RSVD 0xe0 /* reserved */ -#define ESPCFG3_IDM 0x10 /* ID Message Res Check */ -#define ESPCFG3_QTE 0x08 /* Queue Tag Enable */ -#define ESPCFG3_CDB 0x04 /* CDB 10-bytes OK */ -#define ESPCFG3_FSCSI 0x02 /* Fast SCSI */ -#define ESPCFG3_FCLK 0x01 /* Fast Clock (>25Mhz) */ diff --git a/sys/arch/sun3x/dev/espvar.h b/sys/arch/sun3x/dev/espvar.h deleted file mode 100644 index 6b443c4d67df..000000000000 --- a/sys/arch/sun3x/dev/espvar.h +++ /dev/null @@ -1,282 +0,0 @@ -/* $NetBSD: espvar.h,v 1.2 1997/03/15 18:11:05 is Exp $ */ - -/* - * Copyright (c) 1994 Peter Galbavy. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Peter Galbavy. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#define ESP_DEBUG 0 - -#define ESP_ABORT_TIMEOUT 2000 /* time to wait for abort */ - -#define FREQTOCCF(freq) (((freq + 4) / 5)) - -/* esp revisions */ -#define ESP100 0x01 -#define ESP100A 0x02 -#define ESP200 0x03 -#define NCR53C94 0x04 - -/* - * ECB. Holds additional information for each SCSI command Comments: We - * need a separate scsi command block because we may need to overwrite it - * with a request sense command. Basicly, we refrain from fiddling with - * the scsi_xfer struct (except do the expected updating of return values). - * We'll generally update: xs->{flags,resid,error,sense,status} and - * occasionally xs->retries. - */ -struct esp_ecb { - TAILQ_ENTRY(esp_ecb) chain; - struct scsi_xfer *xs; /* SCSI xfer ctrl block from above */ - int flags; -#define ECB_ALLOC 0x01 -#define ECB_NEXUS 0x02 -#define ECB_SENSE 0x04 -#define ECB_ABORT 0x40 -#define ECB_RESET 0x80 - int timeout; - - struct scsi_generic cmd; /* SCSI command block */ - int clen; - char *daddr; /* Saved data pointer */ - int dleft; /* Residue */ - u_char stat; /* SCSI status byte */ - -#if ESP_DEBUG > 0 - char trace[1000]; -#endif -}; -#if ESP_DEBUG > 0 -#define ECB_TRACE(ecb, msg, a, b) do { \ - const char *f = "[" msg "]"; \ - int n = strlen((ecb)->trace); \ - if (n < (sizeof((ecb)->trace)-100)) \ - sprintf((ecb)->trace + n, f, a, b); \ -} while(0) -#else -#define ECB_TRACE(ecb, msg, a, b) -#endif - -/* - * Some info about each (possible) target on the SCSI bus. This should - * probably have been a "per target+lunit" structure, but we'll leave it at - * this for now. Is there a way to reliably hook it up to sc->fordriver?? - */ -struct esp_tinfo { - int cmds; /* #commands processed */ - int dconns; /* #disconnects */ - int touts; /* #timeouts */ - int perrs; /* #parity errors */ - int senses; /* #request sense commands sent */ - ushort lubusy; /* What local units/subr. are busy? */ - u_char flags; -#define T_NEED_TO_RESET 0x01 /* Should send a BUS_DEV_RESET */ -#define T_NEGOTIATE 0x02 /* (Re)Negotiate synchronous options */ -#define T_BUSY 0x04 /* Target is busy, i.e. cmd in progress */ -#define T_SYNCMODE 0x08 /* sync mode has been negotiated */ -#define T_SYNCHOFF 0x10 /* .. */ -#define T_RSELECTOFF 0x20 /* .. */ - u_char period; /* Period suggestion */ - u_char offset; /* Offset suggestion */ -} tinfo_t; - -/* Register a linenumber (for debugging) */ -#define LOGLINE(p) - -#define ESP_SHOWECBS 0x01 -#define ESP_SHOWINTS 0x02 -#define ESP_SHOWCMDS 0x04 -#define ESP_SHOWMISC 0x08 -#define ESP_SHOWTRAC 0x10 -#define ESP_SHOWSTART 0x20 -#define ESP_SHOWPHASE 0x40 -#define ESP_SHOWDMA 0x80 -#define ESP_SHOWCCMDS 0x100 -#define ESP_SHOWMSGS 0x200 - -#ifdef ESP_DEBUG -extern int esp_debug; -#define ESP_ECBS(str) do {if (esp_debug & ESP_SHOWECBS) printf str;} while (0) -#define ESP_MISC(str) do {if (esp_debug & ESP_SHOWMISC) printf str;} while (0) -#define ESP_INTS(str) do {if (esp_debug & ESP_SHOWINTS) printf str;} while (0) -#define ESP_TRACE(str) do {if (esp_debug & ESP_SHOWTRAC) printf str;} while (0) -#define ESP_CMDS(str) do {if (esp_debug & ESP_SHOWCMDS) printf str;} while (0) -#define ESP_START(str) do {if (esp_debug & ESP_SHOWSTART) printf str;}while (0) -#define ESP_PHASE(str) do {if (esp_debug & ESP_SHOWPHASE) printf str;}while (0) -#define ESP_DMA(str) do {if (esp_debug & ESP_SHOWDMA) printf str;}while (0) -#define ESP_MSGS(str) do {if (esp_debug & ESP_SHOWMSGS) printf str;}while (0) -#else -#define ESP_ECBS(str) -#define ESP_MISC(str) -#define ESP_INTS(str) -#define ESP_TRACE(str) -#define ESP_CMDS(str) -#define ESP_START(str) -#define ESP_PHASE(str) -#define ESP_DMA(str) -#define ESP_MSGS(str) -#endif - -#define ESP_MAX_MSG_LEN 8 - -struct esp_softc { - struct device sc_dev; /* us as a device */ - struct evcnt sc_intrcnt; /* intr count */ - struct scsi_link sc_link; /* scsi lint struct */ - volatile u_char *sc_reg; /* the registers */ - struct dma_softc *sc_dma; /* pointer to my dma */ - - /* register defaults */ - u_char sc_cfg1; /* Config 1 */ - u_char sc_cfg2; /* Config 2, not ESP100 */ - u_char sc_cfg3; /* Config 3, only ESP200 */ - u_char sc_ccf; /* Clock Conversion */ - u_char sc_timeout; - - /* register copies, see espreadregs() */ - u_char sc_espintr; - u_char sc_espstat; - u_char sc_espstep; - u_char sc_espfflags; - - /* Lists of command blocks */ - TAILQ_HEAD(ecb_list, esp_ecb) free_list, - ready_list, - nexus_list; - - struct esp_ecb *sc_nexus; /* current command */ - struct esp_ecb sc_ecb[3*8]; /* three per target */ - struct esp_tinfo sc_tinfo[8]; - - /* Data about the current nexus (updated for every cmd switch) */ - caddr_t sc_dp; /* Current data pointer */ - ssize_t sc_dleft; /* Data left to transfer */ - - /* Adapter state */ - int sc_phase; /* Copy of what bus phase we are in */ - int sc_prevphase; /* Copy of what bus phase we were in */ - u_char sc_state; /* State applicable to the adapter */ - u_char sc_flags; - u_char sc_selid; - u_char sc_lastcmd; - - /* Message stuff */ - u_char sc_msgpriq; /* One or more messages to send (encoded) */ - u_char sc_msgout; /* What message is on its way out? */ - u_char sc_msgoutq; /* What messages have been sent so far? */ - u_char sc_omess[ESP_MAX_MSG_LEN]; - caddr_t sc_omp; /* Message pointer (for multibyte messages) */ - size_t sc_omlen; - u_char sc_imess[ESP_MAX_MSG_LEN + 1]; - caddr_t sc_imp; /* Message pointer (for multibyte messages) */ - size_t sc_imlen; - - /* hardware stuff */ - int sc_freq; /* Freq in HZ */ - int sc_id; /* our scsi id */ - int sc_rev; /* esp revision */ - int sc_minsync; /* minimum sync period / 4 */ - int sc_maxxfer; /* maximum transfer size */ -}; - -/* values for sc_state */ -#define ESP_IDLE 1 /* waiting for something to do */ -#define ESP_SELECTING 2 /* SCSI command is arbiting */ -#define ESP_RESELECTED 3 /* Has been reselected */ -#define ESP_CONNECTED 4 /* Actively using the SCSI bus */ -#define ESP_DISCONNECT 5 /* MSG_DISCONNECT received */ -#define ESP_CMDCOMPLETE 6 /* MSG_CMDCOMPLETE received */ -#define ESP_CLEANING 7 -#define ESP_SBR 8 /* Expect a SCSI RST because we commanded it */ - -/* values for sc_flags */ -#define ESP_DROP_MSGI 0x01 /* Discard all msgs (parity err detected) */ -#define ESP_ABORTING 0x02 /* Bailing out */ -#define ESP_DOINGDMA 0x04 /* The FIFO data path is active! */ -#define ESP_SYNCHNEGO 0x08 /* Synch negotiation in progress. */ -#define ESP_ICCS 0x10 /* Expect status phase results */ -#define ESP_WAITI 0x20 /* Waiting for non-DMA data to arrive */ -#define ESP_ATN 0x40 /* ATN asserted */ - -/* values for sc_msgout */ -#define SEND_DEV_RESET 0x01 -#define SEND_PARITY_ERROR 0x02 -#define SEND_INIT_DET_ERR 0x04 -#define SEND_REJECT 0x08 -#define SEND_IDENTIFY 0x10 -#define SEND_ABORT 0x20 -#define SEND_SDTR 0x40 -#define SEND_WDTR 0x80 - -/* SCSI Status codes */ -#define ST_MASK 0x3e /* bit 0,6,7 is reserved */ - -/* phase bits */ -#define IOI 0x01 -#define CDI 0x02 -#define MSGI 0x04 - -/* Information transfer phases */ -#define DATA_OUT_PHASE (0) -#define DATA_IN_PHASE (IOI) -#define COMMAND_PHASE (CDI) -#define STATUS_PHASE (CDI|IOI) -#define MESSAGE_OUT_PHASE (MSGI|CDI) -#define MESSAGE_IN_PHASE (MSGI|CDI|IOI) - -#define PHASE_MASK (MSGI|CDI|IOI) - -/* Some pseudo phases for getphase()*/ -#define BUSFREE_PHASE 0x100 /* Re/Selection no longer valid */ -#define INVALID_PHASE 0x101 /* Re/Selection valid, but no REQ yet */ -#define PSEUDO_PHASE 0x100 /* "pseudo" bit */ - -/* - * Macros to read and write the chip's registers. - */ -#define ESP_READ_REG(sc, reg) \ - ((sc)->sc_reg[(reg) * 4]) -#define ESP_WRITE_REG(sc, reg, val) \ - do { \ - u_char v = (val); \ - (sc)->sc_reg[(reg) * 4] = v; \ - } while (0) - -#ifdef ESP_DEBUG -#define ESPCMD(sc, cmd) do { \ - if (esp_debug & ESP_SHOWCCMDS) \ - printf("", (unsigned)cmd); \ - sc->sc_lastcmd = cmd; \ - ESP_WRITE_REG(sc, ESP_CMD, cmd); \ -} while (0) -#else -#define ESPCMD(sc, cmd) ESP_WRITE_REG(sc, ESP_CMD, cmd) -#endif - -#define SAME_ESP(sc, bp, ca) \ - ((bp->val[0] == ca->ca_slot && bp->val[1] == ca->ca_offset) || \ - (bp->val[0] == -1 && bp->val[1] == sc->sc_dev.dv_unit))