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+ Fix IPL_VM sr_bits for alchemy_ipl_sr_map. Alchemy peripherals connects to

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MIPS_INT_MASK_[0-3].
+ Also add IPL_DDB.
This commit is contained in:
kiyohara 2012-01-14 16:09:19 +00:00
parent 3be14d3b4d
commit c3832bc16f
1 changed files with 8 additions and 3 deletions
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11
sys/arch/mips/alchemy/au_icu.c
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@ -1,4 +1,4 @@
/* $NetBSD: au_icu.c,v 1.28 2011/07/10 23:13:23 matt Exp $ */
/* $NetBSD: au_icu.c,v 1.29 2012/01/14 16:09:19 kiyohara Exp $ */
/*-
* Copyright (c) 2006 Itronix Inc.
@ -68,7 +68,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: au_icu.c,v 1.28 2011/07/10 23:13:23 matt Exp $");
__KERNEL_RCSID(0, "$NetBSD: au_icu.c,v 1.29 2012/01/14 16:09:19 kiyohara Exp $");
#include "opt_ddb.h"
#define __INTR_PRIVATE
@ -99,8 +99,13 @@ static const struct ipl_sr_map alchemy_ipl_sr_map = {
[IPL_SOFTBIO] = MIPS_SOFT_INT_MASK_0,
[IPL_SOFTNET] = MIPS_SOFT_INT_MASK,
[IPL_SOFTSERIAL] = MIPS_SOFT_INT_MASK,
[IPL_VM] = MIPS_SOFT_INT_MASK|MIPS_INT_MASK_0,
[IPL_VM] = MIPS_SOFT_INT_MASK |
MIPS_INT_MASK_0 |
MIPS_INT_MASK_1 |
MIPS_INT_MASK_2 |
MIPS_INT_MASK_3,
[IPL_SCHED] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_HIGH] = MIPS_INT_MASK,
},
};