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bridge memory and lower prefetch memory ranges are only 12 bits wide

This commit is contained in:
joda 2004-08-02 14:50:36 +00:00
parent f7d656a488
commit c3800782de
1 changed files with 5 additions and 5 deletions
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10
sys/dev/pci/pcireg.h
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@ -1,4 +1,4 @@
/* $NetBSD: pcireg.h,v 1.45 2004/02/04 06:58:24 soren Exp $ */
/* $NetBSD: pcireg.h,v 1.46 2004/08/02 14:50:36 joda Exp $ */
/*
* Copyright (c) 1995, 1996, 1999, 2000
@ -601,14 +601,14 @@ typedef u_int8_t pci_intr_line_t;
#define PCI_BRIDGE_MEMORY_REG 0x20
#define PCI_BRIDGE_MEMORY_BASE_SHIFT 4
#define PCI_BRIDGE_MEMORY_LIMIT_SHIFT 20
#define PCI_BRIDGE_MEMORY_BASE_MASK 0xffff
#define PCI_BRIDGE_MEMORY_LIMIT_MASK 0xffff
#define PCI_BRIDGE_MEMORY_BASE_MASK 0x0fff
#define PCI_BRIDGE_MEMORY_LIMIT_MASK 0x0fff
#define PCI_BRIDGE_PREFETCHMEM_REG 0x24
#define PCI_BRIDGE_PREFETCHMEM_BASE_SHIFT 4
#define PCI_BRIDGE_PREFETCHMEM_LIMIT_SHIFT 20
#define PCI_BRIDGE_PREFETCHMEM_BASE_MASK 0xffff
#define PCI_BRIDGE_PREFETCHMEM_LIMIT_MASK 0xffff
#define PCI_BRIDGE_PREFETCHMEM_BASE_MASK 0x0fff
#define PCI_BRIDGE_PREFETCHMEM_LIMIT_MASK 0x0fff
#define PCI_BRIDGE_PREFETCHMEM_64BITS(reg) ((reg) & 0xf)
#define PCI_BRIDGE_PREFETCHBASE32_REG 0x28