Pull up following revision(s) (requested by msaitoh in ticket #487):
sys/dev/pci/if_bge.c: revision 1.340 sys/dev/pci/if_bge.c: revision 1.341 sys/dev/pci/if_bge.c: revision 1.342 sys/dev/pci/if_bge.c: revision 1.336 - Avoid undefined behavior in bge_setmulti(). found by kUBSan. - Avoid undefined behavior when setting the MAC address in bge_init(). found by kUBSan. Fix a bug that SK-9D41 can't detect fiber media. Check the subsystem ID correctly. This bug was added in if_bge.c rev. 1.161. - Use *_FLUSH() more. The main purpose is to wait following delay() correctly. - Add missing DELAY(80) after writing BGE_MI_MODE register. Modify PHY initialization code. This change fix a bug that SK-9D21 doesn't detect MII PHY. - Add error check to bge_miibus_writereg(). - Change return value of bge_miibus_readreg() when a read error occurred. It also add error message using with aprint_debug_dev(). This error occurs on some devices while detecting MII devices. - Move the location of BGE_MI_MODE register's initialization to next to bge_chipinit(). - Set BGE_MAC_MODE before calling ifmedia_init() and/or mii_attach(). - Add retry code for mii_attach() failed. Same as FreeBSD.
This commit is contained in:
martin
parent
52075ce9b8
commit
c2ea55bc07
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@ -1,4 +1,4 @@
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/* $NetBSD: if_bge.c,v 1.335 2019/07/09 08:46:58 msaitoh Exp $ */
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/* $NetBSD: if_bge.c,v 1.335.2.1 2019/11/27 11:08:24 martin Exp $ */
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/*
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* Copyright (c) 2001 Wind River Systems
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@ -79,7 +79,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.335 2019/07/09 08:46:58 msaitoh Exp $");
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__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.335.2.1 2019/11/27 11:08:24 martin Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -1027,10 +1027,10 @@ bge_eeprom_getbyte(struct bge_softc *sc, int addr, uint8_t *dest)
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* Enable use of auto EEPROM access so we can avoid
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* having to use the bitbang method.
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*/
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BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_AUTO_EEPROM);
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BGE_SETBIT_FLUSH(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_AUTO_EEPROM);
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/* Reset the EEPROM, load the clock period. */
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CSR_WRITE_4(sc, BGE_EE_ADDR,
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CSR_WRITE_4_FLUSH(sc, BGE_EE_ADDR,
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BGE_EEADDR_RESET | BGE_EEHALFCLK(BGE_HALFCLK_384SCL));
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DELAY(20);
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@ -1113,9 +1113,11 @@ bge_miibus_readreg(device_t dev, int phy, int reg, uint16_t *val)
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if (i == BGE_TIMEOUT) {
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aprint_error_dev(sc->bge_dev, "PHY read timed out\n");
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rv = ETIMEDOUT;
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} else if ((data & BGE_MICOMM_READFAIL) != 0)
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rv = -1;
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else
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} else if ((data & BGE_MICOMM_READFAIL) != 0) {
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/* XXX This error occurs on some devices while attaching. */
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aprint_debug_dev(sc->bge_dev, "PHY read I/O error\n");
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rv = EIO;
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} else
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*val = data & BGE_MICOMM_DATA;
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if (autopoll & BGE_MIMODE_AUTOPOLL) {
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@ -1133,7 +1135,8 @@ static int
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bge_miibus_writereg(device_t dev, int phy, int reg, uint16_t val)
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{
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struct bge_softc *sc = device_private(dev);
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uint32_t autopoll;
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uint32_t data, autopoll;
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int rv = 0;
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int i;
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if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5906 &&
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@ -1156,13 +1159,22 @@ bge_miibus_writereg(device_t dev, int phy, int reg, uint16_t val)
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for (i = 0; i < BGE_TIMEOUT; i++) {
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delay(10);
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if (!(CSR_READ_4(sc, BGE_MI_COMM) & BGE_MICOMM_BUSY)) {
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data = CSR_READ_4(sc, BGE_MI_COMM);
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if (!(data & BGE_MICOMM_BUSY)) {
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delay(5);
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CSR_READ_4(sc, BGE_MI_COMM);
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data = CSR_READ_4(sc, BGE_MI_COMM);
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break;
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}
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}
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if (i == BGE_TIMEOUT) {
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aprint_error_dev(sc->bge_dev, "PHY write timed out\n");
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rv = ETIMEDOUT;
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} else if ((data & BGE_MICOMM_READFAIL) != 0) {
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aprint_error_dev(sc->bge_dev, "PHY write I/O error\n");
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rv = EIO;
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}
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if (autopoll & BGE_MIMODE_AUTOPOLL) {
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BGE_STS_SETBIT(sc, BGE_STS_AUTOPOLL);
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BGE_SETBIT_FLUSH(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL);
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@ -1176,7 +1188,7 @@ bge_miibus_writereg(device_t dev, int phy, int reg, uint16_t val)
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return ETIMEDOUT;
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}
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return 0;
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return rv;
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}
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static void
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@ -1827,7 +1839,7 @@ bge_setmulti(struct bge_softc *sc)
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/* Just want the 7 least-significant bits. */
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h &= 0x7f;
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hashes[(h & 0x60) >> 5] |= 1 << (h & 0x1F);
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hashes[(h & 0x60) >> 5] |= 1U << (h & 0x1F);
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ETHER_NEXT_MULTI(step, enm);
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}
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ETHER_UNLOCK(ec);
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@ -2286,7 +2298,7 @@ bge_chipinit(struct bge_softc *sc)
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#endif
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/* Set the timer prescaler (always 66MHz) */
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CSR_WRITE_4(sc, BGE_MISC_CFG, BGE_32BITTIME_66MHZ);
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CSR_WRITE_4_FLUSH(sc, BGE_MISC_CFG, BGE_32BITTIME_66MHZ);
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if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5906) {
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DELAY(40); /* XXX */
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@ -3182,14 +3194,14 @@ bge_attach(device_t parent, device_t self, void *aux)
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uint32_t command;
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struct ifnet *ifp;
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struct mii_data * const mii = &sc->bge_mii;
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uint32_t misccfg, mimode;
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uint32_t misccfg, mimode, macmode;
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void * kva;
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u_char eaddr[ETHER_ADDR_LEN];
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pcireg_t memtype, subid, reg;
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bus_addr_t memaddr;
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uint32_t pm_ctl;
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bool no_seeprom;
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int capmask;
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int capmask, trys;
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int mii_flags;
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int map_flags;
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char intrbuf[PCI_INTRSTR_LEN];
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@ -3433,14 +3445,6 @@ bge_attach(device_t parent, device_t self, void *aux)
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BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57780)
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sc->bge_flags |= BGEF_CPMU_PRESENT;
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/* Set MI_MODE */
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mimode = BGE_MIMODE_PHYADDR(sc->bge_phy_addr);
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if ((sc->bge_flags & BGEF_CPMU_PRESENT) != 0)
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mimode |= BGE_MIMODE_500KHZ_CONST;
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else
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mimode |= BGE_MIMODE_BASE;
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CSR_WRITE_4(sc, BGE_MI_MODE, mimode);
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/*
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* When using the BCM5701 in PCI-X mode, data corruption has
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* been observed in the first few bytes of some received packets.
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@ -3636,10 +3640,10 @@ bge_attach(device_t parent, device_t self, void *aux)
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* Reset NVRAM before bge_reset(). It's required to acquire NVRAM
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* lock in bge_reset().
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*/
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CSR_WRITE_4(sc, BGE_EE_ADDR,
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CSR_WRITE_4_FLUSH(sc, BGE_EE_ADDR,
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BGE_EEADDR_RESET | BGE_EEHALFCLK(BGE_HALFCLK_384SCL));
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delay(1000);
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BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_AUTO_EEPROM);
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BGE_SETBIT_FLUSH(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_AUTO_EEPROM);
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bge_stop_fw(sc);
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bge_sig_pre_reset(sc, BGE_RESET_START);
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@ -3685,6 +3689,21 @@ bge_attach(device_t parent, device_t self, void *aux)
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return;
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}
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if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5700) {
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BGE_SETBIT_FLUSH(sc, BGE_MISC_LOCAL_CTL,
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BGE_MLC_MISCIO_OUT1 | BGE_MLC_MISCIO_OUTEN1);
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DELAY(100);
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}
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/* Set MI_MODE */
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mimode = BGE_MIMODE_PHYADDR(sc->bge_phy_addr);
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if ((sc->bge_flags & BGEF_CPMU_PRESENT) != 0)
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mimode |= BGE_MIMODE_500KHZ_CONST;
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else
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mimode |= BGE_MIMODE_BASE;
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CSR_WRITE_4_FLUSH(sc, BGE_MI_MODE, mimode);
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DELAY(80);
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/*
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* Get station address from the EEPROM.
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*/
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@ -3853,7 +3872,7 @@ bge_attach(device_t parent, device_t self, void *aux)
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* by its PCI subsystem ID, as we do below for the SysKonnect SK-9D41.
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* The SysKonnect SK-9D41 is a 1000baseSX card.
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*/
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if (PCI_PRODUCT(pa->pa_id) == SK_SUBSYSID_9D41 ||
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if (PCI_PRODUCT(subid) == SK_SUBSYSID_9D41 ||
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(hwcfg & BGE_HWCFG_MEDIA) == BGE_MEDIA_FIBER) {
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if (BGE_IS_5705_PLUS(sc)) {
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sc->bge_flags |= BGEF_FIBER_MII;
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@ -3871,8 +3890,14 @@ bge_attach(device_t parent, device_t self, void *aux)
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prop_dictionary_set_uint32(dict, "phyflags", sc->bge_phy_flags);
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prop_dictionary_set_uint32(dict, "chipid", sc->bge_chipid);
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macmode = CSR_READ_4(sc, BGE_MAC_MODE);
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macmode &= ~BGE_MACMODE_PORTMODE;
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/* Initialize ifmedia structures. */
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if (sc->bge_flags & BGEF_FIBER_TBI) {
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CSR_WRITE_4_FLUSH(sc, BGE_MAC_MODE,
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macmode | BGE_PORTMODE_TBI);
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DELAY(40);
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sc->ethercom.ec_ifmedia = &sc->bge_ifmedia;
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ifmedia_init(&sc->bge_ifmedia, IFM_IMASK, bge_ifmedia_upd,
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bge_ifmedia_sts);
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/* Pretend the user requested this setting */
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sc->bge_ifmedia.ifm_media = sc->bge_ifmedia.ifm_cur->ifm_media;
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} else {
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uint16_t phyreg;
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int rv;
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/*
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* Do transceiver setup and tell the firmware the
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* driver is down so we can try to get access the
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@ -3891,18 +3918,53 @@ bge_attach(device_t parent, device_t self, void *aux)
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* if we get a conflict with the ASF firmware accessing
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* the PHY.
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*/
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BGE_CLRBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP);
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bge_asf_driver_up(sc);
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if (sc->bge_flags & BGEF_FIBER_MII)
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macmode |= BGE_PORTMODE_GMII;
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else
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macmode |= BGE_PORTMODE_MII;
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CSR_WRITE_4_FLUSH(sc, BGE_MAC_MODE, macmode);
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DELAY(40);
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/*
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* Do transceiver setup and tell the firmware the
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* driver is down so we can try to get access the
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* probe if ASF is running. Retry a couple of times
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* if we get a conflict with the ASF firmware accessing
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* the PHY.
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*/
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trys = 0;
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BGE_CLRBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP);
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sc->ethercom.ec_mii = mii;
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ifmedia_init(&mii->mii_media, 0, bge_ifmedia_upd,
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bge_ifmedia_sts);
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mii_flags = MIIF_DOPAUSE;
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if (sc->bge_flags & BGEF_FIBER_MII)
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mii_flags |= MIIF_HAVEFIBER;
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again:
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bge_asf_driver_up(sc);
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rv = bge_miibus_readreg(sc->bge_dev, sc->bge_phy_addr,
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MII_BMCR, &phyreg);
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if ((rv != 0) || ((phyreg & BMCR_PDOWN) != 0)) {
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int i;
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bge_miibus_writereg(sc->bge_dev, sc->bge_phy_addr,
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MII_BMCR, BMCR_RESET);
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/* Wait up to 500ms for it to complete. */
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for (i = 0; i < 500; i++) {
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bge_miibus_readreg(sc->bge_dev,
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sc->bge_phy_addr, MII_BMCR, &phyreg);
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if ((phyreg & BMCR_RESET) == 0)
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break;
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DELAY(1000);
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}
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}
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mii_attach(sc->bge_dev, mii, capmask, sc->bge_phy_addr,
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MII_OFFSET_ANY, mii_flags);
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if (LIST_EMPTY(&mii->mii_phys) && (trys++ < 4))
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goto again;
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if (LIST_EMPTY(&mii->mii_phys)) {
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aprint_error_dev(sc->bge_dev, "no PHY found!\n");
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ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_MANUAL,
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@ -5530,7 +5592,8 @@ bge_init(struct ifnet *ifp)
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/* Load our MAC address. */
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m = (const uint16_t *)&(CLLADDR(ifp->if_sadl)[0]);
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CSR_WRITE_4(sc, BGE_MAC_ADDR1_LO, htons(m[0]));
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CSR_WRITE_4(sc, BGE_MAC_ADDR1_HI, (htons(m[1]) << 16) | htons(m[2]));
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CSR_WRITE_4(sc, BGE_MAC_ADDR1_HI,
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((uint32_t)htons(m[1]) << 16) | htons(m[2]));
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/* Enable or disable promiscuous mode as needed. */
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if (ifp->if_flags & IFF_PROMISC)
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@ -5676,10 +5739,10 @@ bge_ifmedia_upd(struct ifnet *ifp)
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break;
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case IFM_1000_SX:
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if ((ifm->ifm_media & IFM_FDX) != 0) {
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BGE_CLRBIT(sc, BGE_MAC_MODE,
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BGE_CLRBIT_FLUSH(sc, BGE_MAC_MODE,
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BGE_MACMODE_HALF_DUPLEX);
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} else {
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BGE_SETBIT(sc, BGE_MAC_MODE,
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BGE_SETBIT_FLUSH(sc, BGE_MAC_MODE,
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BGE_MACMODE_HALF_DUPLEX);
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}
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DELAY(40);
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@ -6077,7 +6140,7 @@ bge_link_upd(struct bge_softc *sc)
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BGE_STS_SETBIT(sc, BGE_STS_LINK);
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if (BGE_ASICREV(sc->bge_chipid)
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== BGE_ASICREV_BCM5704) {
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BGE_CLRBIT(sc, BGE_MAC_MODE,
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BGE_CLRBIT_FLUSH(sc, BGE_MAC_MODE,
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BGE_MACMODE_TBI_SEND_CFGS);
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DELAY(40);
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}
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