Issue a CPWAIT sequence after enabling the MMU to make sure
it's really enabled.
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parent
bde73607cc
commit
bfd9280083
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@ -1,4 +1,4 @@
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/* $NetBSD: iq80310_start.S,v 1.2 2002/04/05 16:58:09 thorpej Exp $ */
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/* $NetBSD: iq80310_start.S,v 1.3 2002/04/26 18:01:21 thorpej Exp $ */
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/*
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* Copyright (c) 2002 Wasabi Systems, Inc.
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@ -117,6 +117,10 @@ _C_LABEL(iq80310_start):
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mov r0, #1
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mcr p15, 0, r0, c3, c0, 0
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/* Get ready to jump to the "real" kernel entry point... */
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add r0, pc, #(Lstart - . - 8)
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ldr r0, [r0]
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/* OK, let's enable the MMU. */
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mrc p15, 0, r2, c1, c0, 0
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orr r2, r2, #CPU_CONTROL_MMU_ENABLE
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@ -126,9 +130,10 @@ _C_LABEL(iq80310_start):
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nop
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nop
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/* ...and now we jump to the "real" kernel entry point! */
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add r0, pc, #(Lstart - . - 8)
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ldr pc, [r0]
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/* CPWAIT sequence to make sure the MMU is on... */
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mrc p15, 0, r2, c2, c0, 0 /* arbitrary read of CP15 */
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mov r2, r2 /* force it to complete */
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mov pc, r0 /* leap to kernel entry point! */
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Ltable:
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.word 0xa0004000
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@ -1,4 +1,4 @@
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/* $NetBSD: iq80321_start.S,v 1.2 2002/04/05 16:58:09 thorpej Exp $ */
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/* $NetBSD: iq80321_start.S,v 1.3 2002/04/26 18:01:21 thorpej Exp $ */
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/*
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* Copyright (c) 2002 Wasabi Systems, Inc.
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@ -126,6 +126,10 @@ Lunmapped:
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mov r0, #1
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mcr p15, 0, r0, c3, c0, 0
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/* Get ready to jump to the "real" kernel entry point... */
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add r0, pc, #(Lstart - . - 8)
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ldr r0, [r0]
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/* OK, let's enable the MMU. */
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mrc p15, 0, r2, c1, c0, 0
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orr r2, r2, #CPU_CONTROL_MMU_ENABLE
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@ -135,17 +139,13 @@ Lunmapped:
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nop
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nop
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/* ...and now we jump to the "real" kernel entry point! */
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add r0, pc, #(Lstart - . - 8)
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ldr pc, [r0]
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/* CPWAIT sequence to make sure the MMU is on... */
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mrc p15, 0, r2, c2, c0, 0 /* arbitrary read of CP15 */
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mov r2, r2 /* force it to complete */
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mov pc, r0 /* leap to kernel entry point! */
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Ltable:
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.word 0xa0004000
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Lstart:
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.word start
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L7seg_msb:
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.word 0xfe840000
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L7seg_lsb:
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.word 0xfe850000
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