From beb0fd53d47d9c6243971e159ed3c0d619df972f Mon Sep 17 00:00:00 2001 From: macallan Date: Tue, 14 May 2013 09:16:59 +0000 Subject: [PATCH] always set up a clockframe and make it available to other drivers, so clocks other than the MIPS cycle counter can be used ( for example pwmclock ) --- sys/arch/evbmips/evbmips/interrupt.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/sys/arch/evbmips/evbmips/interrupt.c b/sys/arch/evbmips/evbmips/interrupt.c index 89dd0131fe50..7845e626b4d6 100644 --- a/sys/arch/evbmips/evbmips/interrupt.c +++ b/sys/arch/evbmips/evbmips/interrupt.c @@ -1,4 +1,4 @@ -/* $NetBSD: interrupt.c,v 1.18 2011/09/27 01:02:33 jym Exp $ */ +/* $NetBSD: interrupt.c,v 1.19 2013/05/14 09:16:59 macallan Exp $ */ /*- * Copyright (c) 2001 The NetBSD Foundation, Inc. @@ -30,7 +30,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.18 2011/09/27 01:02:33 jym Exp $"); +__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.19 2013/05/14 09:16:59 macallan Exp $"); #include #include @@ -40,6 +40,8 @@ __KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.18 2011/09/27 01:02:33 jym Exp $"); #include #include +struct clockframe cf; + void intr_init(void) { @@ -69,15 +71,15 @@ cpu_intr(int ppl, vaddr_t pc, uint32_t status) "%s: cpl (%d) != ipl (%d)", __func__, ci->ci_cpl, ipl); KASSERT(pending != 0); + cf.pc = pc; + cf.sr = status; + cf.intr = (ci->ci_idepth > 1); + if (pending & MIPS_INT_MASK_5) { - struct clockframe cf; KASSERTMSG(ipl == IPL_SCHED, "%s: ipl (%d) != IPL_SCHED (%d)", __func__, ipl, IPL_SCHED); /* call the common MIPS3 clock interrupt handler */ - cf.pc = pc; - cf.sr = status; - cf.intr = (ci->ci_idepth > 1); mips3_clockintr(&cf); pending ^= MIPS_INT_MASK_5; }