Add support to support code for Kinetic card. The kernel is loaded into
the Processor local memory, so that should provide a speed up. Currently DMA won't work, as we only tell the kernel about the kinetic memory, and exclude the motherboard memory. I'll look at fixing this over the weekend. Add support for kernels > 4MiB. The -current INSTALL kernel has now hit 25KiB over 4MiB and we were only adding L1 mappings for 4MiB. Also added lots of tracing which I used to work out what boot32 was doing, and so what the kernel was meant to be doing. This is disabled by default. Out of paranoia also become a client of all domains before setting the ttb, just in case RISC-OS ever decides to use domains. All of this has been tested on my Kinetic Risc-PC. I've carried out a full install onto it, and hope to use it for testing out the interrupt work I've been doing.
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chris
parent
49444bc037
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@ -1,4 +1,4 @@
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/* $NetBSD: rpc_machdep.c,v 1.68 2008/01/19 13:11:10 chris Exp $ */
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/* $NetBSD: rpc_machdep.c,v 1.69 2008/01/26 00:16:57 chris Exp $ */
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/*
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* Copyright (c) 2000-2002 Reinoud Zandijk.
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@ -54,7 +54,7 @@
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#include <sys/param.h>
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__KERNEL_RCSID(0, "$NetBSD: rpc_machdep.c,v 1.68 2008/01/19 13:11:10 chris Exp $");
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__KERNEL_RCSID(0, "$NetBSD: rpc_machdep.c,v 1.69 2008/01/26 00:16:57 chris Exp $");
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#include <sys/systm.h>
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#include <sys/kernel.h>
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@ -119,10 +119,6 @@ static i2c_tag_t acorn32_i2c_tag;
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*/
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u_int cpu_reset_address = 0x0; /* XXX 0x3800000 too for rev0 RiscPC 600 */
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#define VERBOSE_INIT_ARM
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/* Define various stack sizes in pages */
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#define IRQ_STACK_SIZE 1
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#define ABT_STACK_SIZE 1
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@ -175,8 +171,9 @@ extern int pmap_debug_level;
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#define KERNEL_PT_VMEM 0 /* Page table for mapping video memory */
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#define KERNEL_PT_SYS 1 /* Page table for mapping proc0 zero page */
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#define KERNEL_PT_KERNEL 2 /* Page table for mapping kernel */
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#define KERNEL_PT_VMDATA 3 /* Page tables for mapping kernel VM */
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#define KERNEL_PT_KERNEL 2 /* Page table for mapping kernel 0-4MB*/
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#define KERNEL_PT_KERNEL_4MB 3 /* Page table for mapping kernel 4-8MB*/
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#define KERNEL_PT_VMDATA 4 /* Page tables for mapping kernel VM */
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#define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
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#define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
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@ -428,6 +425,8 @@ initarm(void *cookie)
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u_int l1pagetable;
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struct exec *kernexec = (struct exec *)KERNEL_TEXT_BASE;
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pv_addr_t kernel_l1pt = { {0} };
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bool hasKinetic = false;
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paddr_t kinetic_physical_start;
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/*
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* Heads up ... Setup the CPU / MMU / TLB functions
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@ -488,7 +487,9 @@ initarm(void *cookie)
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* 0x00000000 -> 0x000fffff which is mapped to
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* top 1MB of physical memory
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* 0xf0000000 -> 0xf0ffffff wich is mapped to
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* physical address 0x01000000 -> 0x01ffffff (DRAM0a, dram[0])
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* physical address 0x10000000 -> 0x10ffffff
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* or on a Kinetic:
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* physical address 0x20400000 -> 0x20ffffff
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*
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* This means that the kernel is mapped suitably for continuing
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* execution, all I/O is mapped 1:1 virtual to physical and
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@ -500,8 +501,18 @@ initarm(void *cookie)
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* by pmap etc.
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*/
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#ifdef FORCE_VERBOSE_INIT_ARM
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/*
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* note that this will stop working after we switch to the new
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* L1 Table
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*/
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memset((void *) (videomemory.vidm_vbase), 0x55, 50*1024);
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consinit();
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printf("\n\n\n\n\n\n\n");
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#define VERBOSE_INIT_ARM
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#endif
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/* START OF REAL NEW STUFF */
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/* Check to make sure the page size is correct */
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if (PAGE_SIZE != bootconfig.pagesize)
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panic2(("Page size is %d bytes instead of %d !! (huh?)\n",
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@ -510,7 +521,6 @@ initarm(void *cookie)
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/* process arguments */
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process_kernel_args();
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/*
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* Now set up the page tables for the kernel ... this part is copied
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* in a (modified?) way from the EBSA machine port....
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@ -525,7 +535,16 @@ initarm(void *cookie)
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*/
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physical_start = 0xffffffff;
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physical_end = 0;
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kinetic_physical_start = 0xffffffff;
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#ifdef VERBOSE_INIT_ARM
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printf("memory blocks:\n");
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#endif
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for (loop = 0, physmem = 0; loop < bootconfig.dramblocks; ++loop) {
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#ifdef VERBOSE_INIT_ARM
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printf("0x0x%x + 0x%0x, type = 0x%08x\n", bootconfig.dram[loop].address,
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bootconfig.dram[loop].pages * PAGE_SIZE,
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bootconfig.dram[loop].flags);
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#endif
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if (bootconfig.dram[loop].address < physical_start)
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physical_start = bootconfig.dram[loop].address;
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memoryblock_end = bootconfig.dram[loop].address +
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@ -533,35 +552,47 @@ initarm(void *cookie)
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if (memoryblock_end > physical_end)
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physical_end = memoryblock_end;
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physmem += bootconfig.dram[loop].pages;
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if (bootconfig.dram[loop].flags & PHYSMEM_TYPE_PROCESSOR_ONLY) {
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hasKinetic = true;
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if (bootconfig.dram[loop].address < kinetic_physical_start)
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kinetic_physical_start = bootconfig.dram[loop].address;
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}
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};
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/* constants for now, but might be changed/configured */
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dma_range_begin = (paddr_t) physical_start;
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dma_range_end = (paddr_t) MIN(physical_end, 512*1024*1024);
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/* XXX HACK HACK XXX */
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/* dma_range_end = 0x18000000; */
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if (physical_start != bootconfig.dram[0].address) {
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int oldblocks = 0;
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/*
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* must be a kinetic, as it's the only thing to shuffle memory
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* around
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*/
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/* Kinetics can only DMA from the Normal DRAM */
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if (hasKinetic)
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{
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dma_range_begin = 0xffffffff;
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dma_range_end = 0;
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for (loop = 0, physmem = 0; loop < bootconfig.dramblocks; ++loop) {
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if (bootconfig.dram[loop].flags == PHYSMEM_TYPE_GENERIC) {
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if (bootconfig.dram[loop].address < dma_range_begin)
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dma_range_begin = bootconfig.dram[loop].address;
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memoryblock_end = bootconfig.dram[loop].address +
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bootconfig.dram[loop].pages * PAGE_SIZE;
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if (memoryblock_end > dma_range_end)
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dma_range_end = memoryblock_end;
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physmem += bootconfig.dram[loop].pages;
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}
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}
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dma_range_end = (paddr_t) MIN(dma_range_end, 512*1024*1024);
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} else {
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/* constants for now, but might be changed/configured */
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dma_range_begin = (paddr_t) physical_start;
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dma_range_end = (paddr_t) MIN(physical_end, 512*1024*1024);
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}
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if (hasKinetic) {
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/* hack hack - throw away the slow dram */
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for (loop = 0; loop < bootconfig.dramblocks; ++loop) {
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if (bootconfig.dram[loop].address <
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bootconfig.dram[0].address) {
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if (bootconfig.dram[loop].flags == PHYSMEM_TYPE_GENERIC) {
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/* non kinetic ram */
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bootconfig.dram[loop].address = 0;
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physmem -= bootconfig.dram[loop].pages;
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bootconfig.drampages -=
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bootconfig.dram[loop].pages;
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bootconfig.dram[loop].pages = 0;
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oldblocks++;
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}
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}
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physical_start = bootconfig.dram[0].address;
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bootconfig.dramblocks -= oldblocks;
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physical_start = kinetic_physical_start;
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}
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physical_freestart = physical_start;
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@ -659,7 +690,7 @@ initarm(void *cookie)
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*/
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#ifdef VERBOSE_INIT_ARM
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printf("Creating L1 page table\n");
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printf("Creating L1 page table p@0x%08x\n", (uint32_t)kernel_l1pt.pv_pa);
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#endif
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/*
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@ -674,6 +705,8 @@ initarm(void *cookie)
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&kernel_pt_table[KERNEL_PT_SYS]);
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pmap_link_l2pt(l1pagetable, KERNEL_BASE,
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&kernel_pt_table[KERNEL_PT_KERNEL]);
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pmap_link_l2pt(l1pagetable, KERNEL_BASE + 0x00400000,
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&kernel_pt_table[KERNEL_PT_KERNEL_4MB]);
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for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
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pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
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&kernel_pt_table[KERNEL_PT_VMDATA + loop]);
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@ -789,11 +822,15 @@ initarm(void *cookie)
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* REAL kernel page tables.
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*/
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cpu_control(CPU_CONTROL_SYST_ENABLE | CPU_CONTROL_ROM_ENABLE, CPU_CONTROL_SYST_ENABLE);
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/* be a client to all domains */
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cpu_domains(0x55555555);
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/* Switch tables */
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#ifdef VERBOSE_INIT_ARM
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printf("switching to new L1 page table\n");
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#endif
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cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
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setttb(kernel_l1pt.pv_pa);
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@ -837,6 +874,12 @@ initarm(void *cookie)
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vidc_base = (int *) VIDC_BASE;
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iomd_base = IOMD_BASE;
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#ifdef FORCE_VERBOSE_INIT_ARM2
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consinit();
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printf("\n\n\n\n\n\n\n");
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#define VERBOSE_INIT_ARM
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#endif
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#ifdef VERBOSE_INIT_ARM
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printf("running on the new L1 page table!\n");
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printf("done.\n");
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@ -930,6 +973,7 @@ initarm(void *cookie)
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/* XXX Consider DMA range intersection checking. */
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if (!hasKinetic || bootconfig.dram[loop].flags & PHYSMEM_TYPE_PROCESSOR_ONLY)
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uvm_page_physload(atop(start), atop(end),
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atop(start), atop(end), VM_FREELIST_DEFAULT);
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}
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