parent
b6168e0ca7
commit
be557a5f28
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.c,v 1.36 2002/05/10 17:50:25 thorpej Exp $ */
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/* $NetBSD: cpu.c,v 1.37 2002/05/12 15:05:41 ichiro Exp $ */
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/*
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* Copyright (c) 1995 Mark Brinicombe.
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@ -45,7 +45,7 @@
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#include <sys/param.h>
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__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.36 2002/05/10 17:50:25 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.37 2002/05/12 15:05:41 ichiro Exp $");
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#include <sys/systm.h>
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#include <sys/malloc.h>
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@ -199,9 +199,11 @@ static const char *sa1110_steppings[16] = {
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"rev 12", "rev 13", "rev 14", "rev 15",
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};
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static const char *ixp1200_steppings[16] = {
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"step A", "step B", "rev 2", "step C",
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"rev 4", "step A (IXP1250)","rev 6", "rev 7",
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static const char *ixp12x0_steppings[16] = {
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"(IXP1200 step A)", "(IXP1200 step B)",
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"rev 2", "(IXP1200 step C)",
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"(IXP1200 step D)", "(IXP1240/1250 step A)",
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"(IXP1240 step B)", "(IXP1250 step B)",
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"rev 8", "rev 9", "rev 10", "rev 11",
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"rev 12", "rev 13", "rev 14", "rev 15",
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};
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@ -286,7 +288,7 @@ const struct cpuidtab cpuids[] = {
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sa1110_steppings },
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{ CPU_ID_IXP1200, CPU_CLASS_SA1, "IXP1200",
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ixp1200_steppings },
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ixp12x0_steppings },
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{ CPU_ID_80200, CPU_CLASS_XSCALE, "i80200",
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xscale_steppings },
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@ -469,7 +471,8 @@ identify_arm_cpu(struct device *dv, struct cpu_info *ci)
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#ifdef CPU_ARM9
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case CPU_CLASS_ARM9TDMI:
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#endif
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#if defined(CPU_SA110) || defined(CPU_SA1100) || defined(CPU_SA1110)
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#if defined(CPU_SA110) || defined(CPU_SA1100) || \
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defined(CPU_SA1110) || defined(CPU_IXP12X0)
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case CPU_CLASS_SA1:
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#endif
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#if defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
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