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sys/arch/sun3/sun3/trap.s
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348
sys/arch/sun3/sun3/trap.s
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/*
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* Copyright (c) 1993 Adam Glass
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* Copyright (c) 1988 University of Utah.
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* Copyright (c) 1980, 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: Utah $Hdr: locore.s 1.58 91/04/22$
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*
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* from: @(#)locore.s 7.11 (Berkeley) 5/9/91
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* locore.s,v 1.2 1993/05/22 07:57:30 cgd Exp
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*/
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/*
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* Trap/interrupt vector routines
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*/
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/* the buserr/addrerr won't work on a sun3. in particular more interpretation
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* of the memory error register is necessary
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*/
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.globl _trap, _nofault, _longjmp
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_buserr:
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tstl _nofault | device probe?
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jeq _addrerr | no, handle as usual
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movl _nofault,sp@- | yes,
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jbsr _longjmp | longjmp(nofault)
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_addrerr:
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clrw sp@- | pad SR to longword
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moveml #0xFFFF,sp@- | save user registers
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movl usp,a0 | save the user SP
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movl a0,sp@(60) | in the savearea
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lea sp@(64),a1 | grab base of HW berr frame
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moveq #0,d0
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movw a1@(12),d0 | grab SSW for fault processing
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btst #12,d0 | RB set?
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jeq LbeX0 | no, test RC
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bset #14,d0 | yes, must set FB
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movw d0,a1@(12) | for hardware too
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LbeX0:
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btst #13,d0 | RC set?
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jeq LbeX1 | no, skip
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bset #15,d0 | yes, must set FC
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movw d0,a1@(12) | for hardware too
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LbeX1:
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btst #8,d0 | data fault?
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jeq Lbe0 | no, check for hard cases
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movl a1@(18),d1 | fault address is as given in frame
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jra Lbe10 | thats it
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Lbe0:
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btst #4,a1@(8) | long (type B) stack frame?
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jne Lbe4 | yes, go handle
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movl a1@(4),d1 | no, can use save PC
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btst #14,d0 | FB set?
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jeq Lbe3 | no, try FC
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addql #4,d1 | yes, adjust address
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jra Lbe10 | done
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Lbe3:
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btst #15,d0 | FC set?
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jeq Lbe10 | no, done
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addql #2,d1 | yes, adjust address
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jra Lbe10 | done
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Lbe4:
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movl a1@(38),d1 | long format, use stage B address
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btst #15,d0 | FC set?
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jeq Lbe10 | no, all done
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subql #2,d1 | yes, adjust address
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Lbe10:
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movl d1,sp@- | push fault VA
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movl d0,sp@- | and padded SSW
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movw a1@(8),d0 | get frame format/vector offset
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andw #0x0FFF,d0 | clear out frame format
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cmpw #12,d0 | address error vector?
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jeq Lisaerr | yes, go to it
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Lismerr:
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movl #T_MMUFLT,sp@- | show that we are an MMU fault
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jra Ltrapnstkadj | and deal with it
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Lisaerr:
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movl #T_ADDRERR,sp@- | mark address error
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jra Ltrapnstkadj | and deal with it
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Lisberr:
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movl #T_BUSERR,sp@- | mark bus error
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Ltrapnstkadj:
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jbsr _trap | handle the error
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lea sp@(12),sp | pop value args
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movl sp@(60),a0 | restore user SP
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movl a0,usp | from save area
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movw sp@(64),d0 | need to adjust stack?
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jne Lstkadj | yes, go to it
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moveml sp@+,#0x7FFF | no, restore most user regs
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addql #6,sp | toss SSP and pad
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jra rei | all done
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Lstkadj:
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lea sp@(66),a1 | pointer to HW frame
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addql #8,a1 | source pointer
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movl a1,a0 | source
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addw d0,a0 | + hole size = dest pointer
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movl a1@-,a0@- | copy
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movl a1@-,a0@- | 8 bytes
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movl a0,sp@(60) | new SSP
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moveml sp@+,#0x7FFF | restore user registers
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movl sp@,sp | and our SP
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jra rei | all done
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/*
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* FP exceptions.
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*/
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_fpfline:
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jra _illinst
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_fpunsupp:
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jra _illinst
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/*
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* Handles all other FP coprocessor exceptions.
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* Note that since some FP exceptions generate mid-instruction frames
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* and may cause signal delivery, we need to test for stack adjustment
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* after the trap call.
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*/
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_fpfault:
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#ifdef FPCOPROC
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clrw sp@- | pad SR to longword
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moveml #0xFFFF,sp@- | save user registers
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movl usp,a0 | and save
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movl a0,sp@(60) | the user stack pointer
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clrl sp@- | no VA arg
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movl _curpcb,a0 | current pcb
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lea a0@(PCB_FPCTX),a0 | address of FP savearea
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fsave a0@ | save state
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tstb a0@ | null state frame?
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jeq Lfptnull | yes, safe
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clrw d0 | no, need to tweak BIU
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movb a0@(1),d0 | get frame size
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bset #3,a0@(0,d0:w) | set exc_pend bit of BIU
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Lfptnull:
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fmovem fpsr,sp@- | push fpsr as code argument
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frestore a0@ | restore state
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movl #T_FPERR,sp@- | push type arg
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jra Ltrapnstkadj | call trap and deal with stack cleanup
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#else
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jra _badtrap | treat as an unexpected trap
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#endif
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/*
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* Coprocessor and format errors can generate mid-instruction stack
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* frames and cause signal delivery hence we need to check for potential
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* stack adjustment.
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*/
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_coperr:
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clrw sp@-
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moveml #0xFFFF,sp@-
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movl usp,a0 | get and save
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movl a0,sp@(60) | the user stack pointer
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clrl sp@- | no VA arg
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clrl sp@- | or code arg
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movl #T_COPERR,sp@- | push trap type
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jra Ltrapnstkadj | call trap and deal with stack adjustments
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_fmterr:
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clrw sp@-
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moveml #0xFFFF,sp@-
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movl usp,a0 | get and save
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movl a0,sp@(60) | the user stack pointer
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clrl sp@- | no VA arg
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clrl sp@- | or code arg
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movl #T_FMTERR,sp@- | push trap type
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jra Ltrapnstkadj | call trap and deal with stack adjustments
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/*
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* Other exceptions only cause four and six word stack frame and require
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* no post-trap stack adjustment.
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*/
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_illinst:
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clrw sp@-
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moveml #0xFFFF,sp@-
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moveq #T_ILLINST,d0
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jra fault
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_zerodiv:
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clrw sp@-
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moveml #0xFFFF,sp@-
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moveq #T_ZERODIV,d0
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jra fault
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_chkinst:
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clrw sp@-
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moveml #0xFFFF,sp@-
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moveq #T_CHKINST,d0
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jra fault
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_trapvinst:
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clrw sp@-
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moveml #0xFFFF,sp@-
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moveq #T_TRAPVINST,d0
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jra fault
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_privinst:
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clrw sp@-
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moveml #0xFFFF,sp@-
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moveq #T_PRIVINST,d0
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jra fault
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.globl fault
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fault:
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movl usp,a0 | get and save
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movl a0,sp@(60) | the user stack pointer
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clrl sp@- | no VA arg
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clrl sp@- | or code arg
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movl d0,sp@- | push trap type
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jbsr _trap | handle trap
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lea sp@(12),sp | pop value args
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movl sp@(60),a0 | restore
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movl a0,usp | user SP
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moveml sp@+,#0x7FFF | restore most user regs
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addql #6,sp | pop SP and pad word
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jra rei | all done
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.globl _straytrap
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_badtrap:
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clrw sp@- | pad SR
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moveml #0xC0C0,sp@- | save scratch regs
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movw sp@(24),sp@- | push exception vector info
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clrw sp@-
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movl sp@(24),sp@- | and PC
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jbsr _straytrap | report
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addql #8,sp | pop args
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moveml sp@+,#0x0303 | restore regs
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addql #2,sp | pop padding
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jra rei | all done
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.globl _syscall
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_trap0:
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clrw sp@- | pad SR to longword
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moveml #0xFFFF,sp@- | save user registers
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movl usp,a0 | save the user SP
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movl a0,sp@(60) | in the savearea
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movl d0,sp@- | push syscall number
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jbsr _syscall | handle it
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addql #4,sp | pop syscall arg
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movl sp@(60),a0 | grab and restore
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movl a0,usp | user SP
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moveml sp@+,#0x7FFF | restore most registers
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addql #6,sp | pop SSP and align word
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jra rei | all done
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/*
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* Routines for traps 1 and 2. The meaning of the two traps depends
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* on whether we are an HPUX compatible process or a native 4.3 process.
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* Our native 4.3 implementation uses trap 1 as sigreturn() and trap 2
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* as a breakpoint trap. HPUX uses trap 1 for a breakpoint, so we have
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* to make adjustments so that trap 2 is used for sigreturn.
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*/
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_trap1:
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btst #PCB_TRCB,pcbflag | being traced by an HPUX process?
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jeq sigreturn | no, trap1 is sigreturn
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jra _trace | yes, trap1 is breakpoint
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_trap2:
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btst #PCB_TRCB,pcbflag | being traced by an HPUX process?
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jeq _trace | no, trap2 is breakpoint
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jra sigreturn | yes, trap2 is sigreturn
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/*
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* Trap 12 is the entry point for the cachectl "syscall" (both HPUX & BSD)
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* cachectl(command, addr, length)
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* command in d0, addr in a1, length in d1
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*/
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.globl _cachectl
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_trap12:
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movl d1,sp@- | push length
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movl a1,sp@- | push addr
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movl d0,sp@- | push command
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jbsr _cachectl | do it
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lea sp@(12),sp | pop args
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jra rei | all done
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/*
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* Trap 15 is used for:
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* - KGDB traps
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* - trace traps for SUN binaries (not fully supported yet)
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* We just pass it on and let trap() sort it all out
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*/
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_trap15:
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clrw sp@-
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moveml #0xFFFF,sp@-
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#ifdef KGDB
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moveq #T_TRAP15,d0
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movl sp@(64),d1 | from user mode?
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andl #PSL_S,d1
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jeq fault
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movl d0,sp@-
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.globl _kgdb_trap_glue
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jbsr _kgdb_trap_glue | returns if no debugger
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addl #4,sp
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#endif
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moveq #T_TRAP15,d0
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jra fault
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/*
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* Hit a breakpoint (trap 1 or 2) instruction.
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* Push the code and treat as a normal fault.
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*/
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_trace:
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clrw sp@-
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moveml #0xFFFF,sp@-
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#ifdef KGDB
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moveq #T_TRACE,d0
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movl sp@(64),d1 | from user mode?
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andl #PSL_S,d1
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jeq fault
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movl d0,sp@-
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jbsr _kgdb_trap_glue | returns if no debugger
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addl #4,sp
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#endif
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moveq #T_TRACE,d0
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jra fault
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