Nuke gas testsuite (wasn't updated with 2.9.1, and can be obtained via

third party sources)
This commit is contained in:
tv 1999-02-02 20:30:27 +00:00
parent 7b850c06da
commit bdb3f58851
75 changed files with 0 additions and 6023 deletions

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load_lib gas-defs.exp
global AS
if ![info exists AS] then {
set AS [findfile $base_dir/../as.new "../as.new" [transform as]]
}
global GASP
if ![info exists GASP] then {
set GASP [findfile $base_dir/../gasp.new "../gasp.new" [transform gasp]]
}
global ASFLAGS
if ![info exists ASFLAGS] then {
set ASFLAGS ""
}
if ![info exists OBJDUMP] then {
set OBJDUMP [findfile $base_dir/../../binutils/objdump \
$base_dir/../../binutils/objdump \
[transform objdump]]
}
if ![info exists OBJDUMPFLAGS] then {
set OBJDUMPFLAGS {}
}
if ![info exists NM] then {
set NM [findfile $base_dir/../../binutils/nm.new \
$base_dir/../../binutils/nm.new \
[transform nm]]
}
if ![info exists NMFLAGS] then {
set NMFLAGS {}
}
if ![info exists OBJCOPY] then {
set OBJCOPY [findfile $base_dir/../../binutils/objcopy]
}
if ![info exists OBJCOPYFLAGS] then {
set OBJCOPYFLAGS {}
}
gas_init

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#objdump: -s -j .text
#name: align
# Test the alignment pseudo-op.
.*: .*
Contents of section .text:
0000 ff00ff01 ff020202 ffff0303 04040404 ................
0010 ffffffff 05050505 ff090a0a 0a0a0a0a ................
0020 ff00ff01 ff020202 ffff0303 04040404 ................
0030 ffffffff 05050505 ff090a0a 0a0a0a0a ................

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/* Test the alignment pseudo-ops. */
.text
.byte 0xff
.p2align 1,0
.byte 0xff
.p2align 1,1
.byte 0xff
.p2align 2,2
.byte 0xff
.byte 0xff
.p2alignw 2,0x0303
.p2align 3,4
.byte 0xff
.byte 0xff
.byte 0xff
.byte 0xff
.p2alignl 3,0x05050505
.p2align 1,6
.p2align 1,7
.byte 0xff
.p2align 3,8,5
.byte 9
.p2align 3,0xa
.byte 0xff
.balign 2,0
.byte 0xff
.balign 2,1
.byte 0xff
.balign 4,2
.byte 0xff
.byte 0xff
.balignw 4,0x0303
.balign 8,4
.byte 0xff
.byte 0xff
.byte 0xff
.byte 0xff
.balignl 8,0x05050505
.balign 2,6
.balign 2,7
.byte 0xff
.balign 8,8,5
.byte 9
.balign 8,0xa
.p2align 5
.balign 32

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#objdump: -t
#name: cofftag
.*: file format .*
SYMBOL TABLE:
\[ 0\]\(sec -2\)\(fl 0x00\)\(ty 0\)\(scl 103\) \(nx 1\) 0x0+0000 foo.c
File
\[ 2\]\(sec 1\)\(fl 0x00\)\(ty 0\)\(scl 6\) \(nx 0\) 0x0+0000 gcc2_compiled.
\[ 3\]\(sec 1\)\(fl 0x00\)\(ty 0\)\(scl 6\) \(nx 0\) 0x0+0000 ___gnu_compiled_c
\[ 4\]\(sec -2\)\(fl 0x00\)\(ty a\)\(scl 15\) \(nx 1\) 0x0+0000 _token
AUX lnno 0 size 0x4 tagndx 0 endndx 10
\[ 6\]\(sec -1\)\(fl 0x00\)\(ty b\)\(scl 16\) \(nx 0\) 0x0+0000 _operator
\[ 7\]\(sec -1\)\(fl 0x00\)\(ty b\)\(scl 16\) \(nx 0\) 0x0+0001 _flags
\[ 8\]\(sec -1\)\(fl 0x00\)\(ty 0\)\(scl 102\) \(nx 1\) 0x0+0004 .eos
AUX lnno 0 size 0x4 tagndx 4
\[ 10\]\(sec 1\)\(fl 0x00\)\(ty 0\)\(scl 3\) \(nx 1\) 0x[0-9a-f]+ .text
AUX scnlen 0x[0-9a-f]+ nreloc 0 nlnno 0
\[ 12\]\(sec 2\)\(fl 0x00\)\(ty 0\)\(scl 3\) \(nx 1\) 0x[0-9a-f]+ .data
AUX scnlen 0x[0-9a-f]+ nreloc 0 nlnno 0
\[ 14\]\(sec 3\)\(fl 0x00\)\(ty 0\)\(scl 3\) \(nx 1\) 0x[0-9a-f]+ .bss
AUX scnlen 0x[0-9a-f]+ nreloc 0 nlnno 0
\[ 16\]\(sec 2\)\(fl 0x00\)\(ty 2\)\(scl 2\) \(nx 0\) 0x0+0000 _token
\[ 17\]\(sec 2\)\(fl 0x00\)\(ty a\)\(scl 2\) \(nx 1\) 0x[0-9a-f]+ _what
AUX lnno 0 size 0x4 tagndx 4

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/* This file was compiled from this C source:
char token =0;
enum token {
operator,
flags
};
enum token what= operator;
*/
.file "foo.c"
gcc2_compiled.:
___gnu_compiled_c:
.globl _token
.data
_token:
.byte 0
.text
.def _token
.scl 15
.type 012
.size 4
.endef
.def _operator
.val 0
.scl 16
.type 013
.endef
.def _flags
.val 1
.scl 16
.type 013
.endef
.def .eos
.val 4
.scl 102
.tag _token
.size 4
.endef
.globl _what
.data
.p2align 2
_what:
.long 0
.text
.def _token
.val _token
.scl 2
.type 02
.endef
.def _what
.val _what
.scl 2
.tag _token
.size 4
.type 012
.endef

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# This test file is to see whether comments get written into listings
# correctly. The file has no real contents.
/* C comments too! */

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# This should match the output of gas -alc cond.s.
.*cond.s.*
1[ ]+.if 0
8[ ]+.else
9[ ]+.if 1
10[ ]+.endc
11 0000 0[02]00 ?000[02][ ]+.long[ ]+2
12[ ]+.if 0
14[ ]+.else
15 0004 0[04]00 ?000[04][ ]+.long[ ]+4
16[ ]+.endc
17[ ]+.endc
18 0008 0000 ?0000[ ]+.p2align 5,0
18[ ]+0000 ?0000
18[ ]+0000 ?0000
18[ ]+0000 ?0000
18[ ]+0000 ?0000

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.if 0
.if 1
.endc
.long 0
.if 0
.long 1
.endc
.else
.if 1
.endc
.long 2
.if 0
.long 3
.else
.long 4
.endc
.endc
.p2align 5,0

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# Difference of two undefined symbols.
# The assembler should reject this.
.text
.globl _foo
_foo: .long _a - _b

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.text
foo: .single 0r1.2345e+06
.single 0f3.14159
.double 0r2.718282

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#
# These tests should be valid on all targets.
#
# I think currently all targets fail this one when listings are enabled.
gas_test "p2425.s" "" "" "pcrel values in assignment"
# p1480.s uses a ".space" directive which for most assemblers means
# "allocate some space". On the PA it means "switch into this space".
#
# Therefore this test (as it is currently written) is completely bogus
# for any PA target. Do not bother trying to run it and just claim
# it fails.
if [istarget hppa*-*-*] then {
setup_xfail *-*-*
fail "simplifiable double subtraction"
} else {
gas_test "p1480.s" "" "-a>" "simplifiable double subtraction"
}
gas_test "float.s" "" "" "simple FP constants"
# This test is meaningless for the PA; the difference of two undefined
# symbols is something that is (and must be) supported on the PA.
if ![istarget hppa*-*-*] then {
setup_xfail "mn10300*-*-*"
setup_xfail "mn10200*-*-*"
gas_test_error "diff1.s" "" "difference of two undefined symbols"
}
proc do_comment {} {
set testname "comment.s: comments in listings"
set x1 0
set x2 0
set x3 0
set white {[ \t]*}
gas_start "comment.s" "-al"
while 1 {
# Apparently CRLF is received when using ptys for subprocesses; hence the
# \r\n for line 3.
expect {
-re "^ +1\[ \t\]+# This\[^\n\]*\n" { set x1 1 }
-re "^ +2\[ \t\]+# correctly\[^\n\]*\n" { set x2 1 }
-re "^ +3\[ \t\]+/. C comments too. ./\r?\n" { set x3 1 }
-re "\[^\n\]*\n" { }
timeout { perror "timeout\n"; break }
eof { break }
}
}
gas_finish
if [all_ones $x1 $x2 $x3] then { pass $testname } else { fail $testname }
}
do_comment
#
# Test x930509a -- correct assembly of differences involving forward
# references.
#
proc do_930509a {} {
set testname "difference between forward references"
set x 0
gas_start "x930509.s" "-al"
while 1 {
# We need to accomodate both byte orders here.
# If ".long" means an 8-byte value on some target someday, this test will have
# to be fixed.
expect {
-re "^ +1 .... 0000 *0000" { fail $testname; set x 1 }
-re "^ +1 .... 0400 *0000" { pass $testname; set x 1 }
-re "^ +1 .... 0000 *0004" { pass $testname; set x 1 }
-re "\[^\n\]*\n" { }
timeout { perror "timeout\n"; break }
eof { break }
}
}
gas_finish
if !$x then { fail $testname }
}
# This test is meaningless for the PA; the difference of two symbols
# must not be resolved by the assembler.
if ![istarget hppa*-*-*] then {
# the vax fails because VMS can apparently actually handle this
# case in relocs, so gas doesn't handle it itself.
setup_xfail "vax*-*-vms*"
setup_xfail "mn10300*-*-*"
setup_xfail "mn10200*-*-*"
do_930509a
}
if ![istarget hppa*-*-*] then {
run_dump_test struct
run_dump_test align
}
# This test is for any COFF target.
if { [istarget *-*-coff*] \
|| [istarget *-*-pe*] \
|| [istarget a29k-*-udi*] \
|| [istarget a29k-*-ebmon*] \
|| [istarget a29k-*-sym*] \
|| [istarget a29k-*-vxworks*] \
|| [istarget i*86-*-aix*] \
|| [istarget i*86-*-sco*] \
|| [istarget i*86-*-isc*] \
|| [istarget i*86-*-go32*] \
|| [istarget i*86-*-cygwin*] \
|| [istarget i*86-*-*nt] \
|| ([istarget i960-*-vxworks5.*] && ![istarget i960-*-vxworks5.0*]) } {
run_dump_test cofftag
}
# Test omitting conditionals from listings.
proc test_cond {} {
global comp_output
global srcdir
global subdir
set testname "conditional listings"
gas_run cond.s -alc ">dump.out"
if ![string match "" $comp_output] {
send_log "$comp_output\n"
fail $testname
} else {
if { [regexp_diff dump.out $srcdir/$subdir/cond.d] } {
fail $testname
} else {
pass $testname
}
}
}
test_cond
# FIXME: this is here cause of a bug in DejaGnu 1.1.1. When it is no longer
# in use, then this can be removed.
if [info exists errorInfo] then {
unset errorInfo
}

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; Test case for assembler option "itbl".
; Run as "as --itbl itbl itbl.s"
; or with stand-alone test case "itbl-test itbl itbl.s".
; The "p<n>" represent processors of a multi-processor system.
p1 dreg d1 1 ; data register "d1" for COP1 has value 1
p1 creg c3 3 ; ctrl register "c3" for COP1 has value 3
p3 insn fie 0x1e:24-20 ; function "fill" for COP3 has value 31
p3 dreg d3 3 ; data register "d3" for COP3 has value 3
p3 creg c2 22 ; control register "c2" for COP3 has value 22
p3 insn fee 0x1e:24-20,dreg:17-13,creg:12-8,immed:7-0
p3 dreg d3 3 ; data register "d3" for COP3 has value 3
p3 creg c2 22 ; control register "c2" for COP3 has value 22
p3 insn fum 0x01e00001 dreg:17-13 creg:12-8
p3 insn foh 0xf:24-21 dreg:20-16 immed:15-0
p3 insn pig 0x1:24-21*[0x100|0x2], dreg:20-16, immed:15-0*0x10000

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/* itbl-test.c
Copyright (C) 1997 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
/* Stand-alone test for instruction specification table support.
Run using "itbl-test <itbl> <asm.s>"
where <itbl> is the name of the instruction table,
and <asm.s> is the name of the assembler fie. */
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "itbl-ops.h"
static int test_reg (e_processor processor, e_type type, char *name,
unsigned long val);
int
main (int argc, char **argv)
{
unsigned int insn;
FILE *fas;
int aline = 0;
char s[81], *name;
if (argc < 3)
{
printf ("usage: %s itbl asm.s\n", argv[0]);
exit (0);
}
if (itbl_parse (argv[1]) != 0)
{
printf ("failed to parse itbl\n");
exit (0);
}
fas = fopen (argv[2], "r");
if (fas == 0)
{
printf ("failed to open asm file %s\n", argv[2]);
exit (0);
}
while (fgets (s, 80, fas))
{
char *p;
aline++;
if (p = strchr (s, ';'), p) /* strip comments */
*p = 0;
if (p = strchr (s, '#'), p) /* strip comments */
*p = 0;
p = s + strlen (s) - 1;
while (p >= s && (*p == ' ' || *p == '\t' || *p == '\n')) /* strip trailing spaces */
p--;
*(p + 1) = 0;
p = s;
while (*p && (*p == ' ' || *p == '\t' || *p == '\n')) /* strip leading spaces */
p++;
if (!*p)
continue;
name = itbl_get_field (&p);
insn = itbl_assemble (name, p);
if (insn == 0)
printf ("line %d: Invalid instruction (%s)\n", aline, s);
else
{
char buf[128];
printf ("line %d: insn(%s) = 0x%x)\n", aline, s, insn);
if (!itbl_disassemble (buf, insn))
printf ("line %d: Can't disassemble instruction "
"(0x%x)\n", aline, insn);
else
printf ("line %d: disasm(0x%x) = %s)\n", aline, insn, buf);
}
}
test_reg (1, e_dreg, "d1", 1);
test_reg (3, e_creg, "c2", 22);
test_reg (3, e_dreg, "d3", 3);
return 0;
}
static int
test_reg (e_processor processor, e_type type, char *name,
unsigned long val)
{
char *n;
unsigned long v;
n = itbl_get_name (processor, type, val);
if (!n || strcmp (n, name))
printf ("Error - reg name not found for proessor=%d, type=%d, val=%d\n",
processor, type, val);
else
printf ("name=%s found for processor=%d, type=%d, val=%d\n",
n, processor, type, val);
/* We require that names be unique amoung processors and types. */
v = itbl_get_reg_val (name);
if (!v || v != val)
printf ("Error - reg val not found for processor=%d, type=%d, name=%s\n",
processor, type, name);
else
printf ("val=0x%x found for processor=%d, type=%d, name=%s\n",
v, processor, type, name);
return 0;
}

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; Test case for assembler option "itbl".
; Run as "as --itbl itbl itbl.s"
; or with stand-alone test case "itbl-test itbl itbl.s".
; Assemble processor instructions as defined in "itbl".
fee $d3,$c2,0x1 ; 0x4ff07601
fie ; 0x4ff00000
foh $2,0x100
fum $d3,$c2 ; 0x4ff07601
pig $2,0x100

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start: .long 0, 1, 2, 3, 4, 5, 6, 7
.space 0x80 - (. - start)
foo: .long 42

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.text
.globl _frobnitz
_frobnitz:
.long 1, 2, 3, 4, 5, 6, 7, GRUMP, 42
GRUMP=.-_frobnitz
HALFGRUMP=GRUMP/2

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#nm: --extern-only
#name: struct
# Test the .struct pseudo-op.
0+00 A w1
0+02 A w2
0+04 A w3

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.globl w1
.globl w2
.globl w3
.long 0
.struct 0
w1: .short 0
w2: .short 0
w3: .short 0
.text
.long 0

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.long L2-L1
L1: .long 0x1234
L2: .long 0x5678

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.*: file format ecoff-littlealpha
Contents of section .rdata:
0000 71a37909 4f930a40 5441789a cd4b881b q.y.O..@TAx..K..
0010 2a404f93 790971a3 789a5440 5441789a .@O.y.q.x.T@TAx.
0020 00000000 00000000 00000000 00000000 ................

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#
# Alpha OSF/1 tests
#
if [istarget alpha-*-osf1*] then {
set testname "fp constants (part 2)"
if [gas_test_old "fp.s" "" "fp constants (part 1)"] then {
objdump "-s -j .rdata > a.dump"
if { [regexp_diff "a.dump" "$srcdir/$subdir/fp.d"] == 0 } then {
pass $testname
} else {
fail $testname
}
}
}

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.rdata
! These three formats are 8 bytes each.
.t_floating 3.32192809488736218171e0
! .byte 0x71, 0xa3, 0x79, 0x09, 0x4f, 0x93, 0x0a, 0x40
.d_floating 3.32192809488736218171e0
! .byte 0x54, 0x41, 0x78, 0x9a, 0xcd, 0x4b, 0x88, 0x1b
.g_floating 3.32192809488736218171e0
! .byte 0x2a, 0x40, 0x4f, 0x93, 0x79, 0x09, 0x71, 0xa3
! The next two are four bytes each.
.s_floating 3.32192809488736218171e0
! .byte 0x78, 0x9a, 0x54, 0x40, 0, 0, 0, 0
.f_floating 3.32192809488736218171e0
! .byte 0x54, 0x41, 0x78, 0x9a, 0, 0, 0, 0
.long 0, 0, 0, 0

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.text
.align 0
bx r0
bxeq r1
foo:
ldrh r3, foo
ldrsh r4, [r5]
ldrsb r4, [r1, r3]
ldrsh r1, [r4, r4]!
ldreqsb r1, [r5, -r3]
ldrneh r2, [r6], r7
ldrccsh r2, [r7], +r8
ldrsb r2, [r3, #255]
ldrsh r1, [r4, #-250]
ldrsb r1, [r5, #+240]
strh r2, bar
strneh r3, [r3]
bar:

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#
# Some ARM tests
#
if [istarget arm*-*-*] then {
gas_test "arm3.s" "" $stdoptlist "Arm 3 instructions"
gas_test "arm6.s" "" $stdoptlist "Arm 6 instructions"
gas_test "arm7dm.s" "" $stdoptlist "Arm 7DM instructions"
# This test currently fails with a branch out of range error.
setup_xfail "*-*-*"
gas_test "thumb.s" "" "" "Thumb instructions"
gas_test "arch4t.s" "" $stdoptlist "Arm architecture 4t instructions"
gas_test "copro.s" "" $stdoptlist "Co processor instructions"
gas_test "immed.s" "" $stdoptlist "immediate expressions"
gas_test "float.s" "" $stdoptlist "Core floating point instructions"
}
# Not all arm targets are bi-endian, so only run these tests on ones
# we know that are.
if { [istarget arm*-*-pe*] || [istarget arm*-*-coff*] } {
run_dump_test "inst"
run_dump_test "arm7t"
run_dump_test "le-fpconst"
# Since big-endian numbers have the normal format, this doesn't exist.
#run_dump_test "be-fpconst"
}

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.text
.align 0
swp r0, r1, [r8]
swpb r2, r3, [r3]
swpgeb r4, r1, [r4]

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.text
.align 0
mrs r8, cpsr
mrseq r9, cpsr_all
mrs r2, spsr
msr cpsr, r1
msrne cpsr_flg, #0xf0000000
msr spsr_flg, r8
msr spsr_all, r9

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.text
.align 0
smull r0, r1, r2, r3
umull r0, r1, r2, r3
smlal r0, r1, r2, r3
umlal r0, r1, r4, r3
smullne r0, r1, r3, r4
smulls r1, r0, r9, r11
umlaleqs r2, r9, r4, r9
smlalge r14, r10, r8, r14

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#objdump: -dr --prefix-addresses --show-raw-insn
#name: ARM arm7t
#as: -marm7t -EL
# Test the halfword and signextend memory transfers:
.*: +file format .*arm.*little
Disassembly of section .text:
00000000 <[^>]*> e1d100b0 ? ldrh r0, \[r1\]
00000004 <[^>]*> e1f100b0 ? ldrh r0, \[r1\]!
00000008 <[^>]*> e19100b2 ? ldrh r0, \[r1, r2\]
0000000c <[^>]*> e1b100b2 ? ldrh r0, \[r1, r2\]!
00000010 <[^>]*> e1d100bc ? ldrh r0, \[r1, #c\]
00000014 <[^>]*> e1f100bc ? ldrh r0, \[r1, #c\]!
00000018 <[^>]*> e15100bc ? ldrh r0, \[r1, -#c\]
0000001c <[^>]*> e09100b2 ? ldrh r0, \[r1\], r2
00000020 <[^>]*> e3a00cff ? mov r0, #ff00
00000024 <[^>]*> e1df0bb4 ? ldrh r0, 000000e0 <\$\$lit_1>
00000028 <[^>]*> e1df0abc ? ldrh r0, 000000dc <.L2>
0000002c <[^>]*> e1c100b0 ? strh r0, \[r1\]
00000030 <[^>]*> e1e100b0 ? strh r0, \[r1\]!
00000034 <[^>]*> e18100b2 ? strh r0, \[r1, r2\]
00000038 <[^>]*> e1a100b2 ? strh r0, \[r1, r2\]!
0000003c <[^>]*> e1c100bc ? strh r0, \[r1, #c\]
00000040 <[^>]*> e1e100bc ? strh r0, \[r1, #c\]!
00000044 <[^>]*> e14100bc ? strh r0, \[r1, -#c\]
00000048 <[^>]*> e08100b2 ? strh r0, \[r1\], r2
0000004c <[^>]*> e1cf08b8 ? strh r0, 000000dc <.L2>
00000050 <[^>]*> e1d100d0 ? ldrsb r0, \[r1\]
00000054 <[^>]*> e1f100d0 ? ldrsb r0, \[r1\]!
00000058 <[^>]*> e19100d2 ? ldrsb r0, \[r1, r2\]
0000005c <[^>]*> e1b100d2 ? ldrsb r0, \[r1, r2\]!
00000060 <[^>]*> e1d100dc ? ldrsb r0, \[r1, #c\]
00000064 <[^>]*> e1f100dc ? ldrsb r0, \[r1, #c\]!
00000068 <[^>]*> e15100dc ? ldrsb r0, \[r1, -#c\]
0000006c <[^>]*> e09100d2 ? ldrsb r0, \[r1\], r2
00000070 <[^>]*> e3a000de ? mov r0, #de
00000074 <[^>]*> e1df06d0 ? ldrsb r0, 000000dc <.L2>
00000078 <[^>]*> e1d100f0 ? ldrsh r0, \[r1\]
0000007c <[^>]*> e1f100f0 ? ldrsh r0, \[r1\]!
00000080 <[^>]*> e19100f2 ? ldrsh r0, \[r1, r2\]
00000084 <[^>]*> e1b100f2 ? ldrsh r0, \[r1, r2\]!
00000088 <[^>]*> e1d100fc ? ldrsh r0, \[r1, #c\]
0000008c <[^>]*> e1f100fc ? ldrsh r0, \[r1, #c\]!
00000090 <[^>]*> e15100fc ? ldrsh r0, \[r1, -#c\]
00000094 <[^>]*> e09100f2 ? ldrsh r0, \[r1\], r2
00000098 <[^>]*> e3a00cff ? mov r0, #ff00
0000009c <[^>]*> e1df03fc ? ldrsh r0, 000000e0 <\$\$lit_1>
000000a0 <[^>]*> e1df03f4 ? ldrsh r0, 000000dc <.L2>
000000a4 <[^>]*> e19100b2 ? ldrh r0, \[r1, r2\]
000000a8 <[^>]*> 119100b2 ? ldrneh r0, \[r1, r2\]
000000ac <[^>]*> 819100b2 ? ldrhih r0, \[r1, r2\]
000000b0 <[^>]*> b19100b2 ? ldrlth r0, \[r1, r2\]
000000b4 <[^>]*> e19100f2 ? ldrsh r0, \[r1, r2\]
000000b8 <[^>]*> 119100f2 ? ldrnesh r0, \[r1, r2\]
000000bc <[^>]*> 819100f2 ? ldrhish r0, \[r1, r2\]
000000c0 <[^>]*> b19100f2 ? ldrltsh r0, \[r1, r2\]
000000c4 <[^>]*> e19100d2 ? ldrsb r0, \[r1, r2\]
000000c8 <[^>]*> 119100d2 ? ldrnesb r0, \[r1, r2\]
000000cc <[^>]*> 819100d2 ? ldrhisb r0, \[r1, r2\]
000000d0 <[^>]*> b19100d2 ? ldrltsb r0, \[r1, r2\]
000000d4 <[^>]*> e1df00f4 ? ldrsh r0, 000000e0 <\$\$lit_1>
000000d8 <[^>]*> e1df00f4 ? ldrsh r0, 000000e4 <\$\$lit_1\+4>
000000dc <[^>]*> 00000000 ? andeq r0, r0, r0
[ ]*dc: 32 .LC0
000000e0 <[^>]*> 0000c0de ? .*
000000e4 <[^>]*> 0000dead ? .*

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@ -1,79 +0,0 @@
.section .rdata
.align 0
.LC0:
.ascii "some data\000"
.text
.align 0
loadhalfwords:
ldrh r0, [r1]
ldrh r0, [r1]!
ldrh r0, [r1, r2]
ldrh r0, [r1, r2]!
ldrh r0, [r1,#0x0C]
ldrh r0, [r1,#0x0C]!
ldrh r0, [r1,#-0x0C]
ldrh r0, [r1], r2
ldrh r0, =0xFF00
ldrh r0, =0xC0DE
ldrh r0, .L2
storehalfwords:
strh r0, [r1]
strh r0, [r1]!
strh r0, [r1, r2]
strh r0, [r1, r2]!
strh r0, [r1,#0x0C]
strh r0, [r1,#0x0C]!
strh r0, [r1,#-0x0C]
strh r0, [r1], r2
strh r0, .L2
loadsignedbytes:
ldrsb r0, [r1]
ldrsb r0, [r1]!
ldrsb r0, [r1, r2]
ldrsb r0, [r1, r2]!
ldrsb r0, [r1,#0x0C]
ldrsb r0, [r1,#0x0C]!
ldrsb r0, [r1,#-0x0C]
ldrsb r0, [r1], r2
ldrsb r0, =0xDE
ldrsb r0, .L2
loadsignedhalfwords:
ldrsh r0, [r1]
ldrsh r0, [r1]!
ldrsh r0, [r1, r2]
ldrsh r0, [r1, r2]!
ldrsh r0, [r1, #0x0C]
ldrsh r0, [r1, #0x0C]!
ldrsh r0, [r1, #-0x0C]
ldrsh r0, [r1], r2
ldrsh r0, =0xFF00
ldrsh r0, =0xC0DE
ldrsh r0, .L2
misc:
ldralh r0, [r1, r2]
ldrneh r0, [r1, r2]
ldrhih r0, [r1, r2]
ldrlth r0, [r1, r2]
ldralsh r0, [r1, r2]
ldrnesh r0, [r1, r2]
ldrhish r0, [r1, r2]
ldrltsh r0, [r1, r2]
ldralsb r0, [r1, r2]
ldrnesb r0, [r1, r2]
ldrhisb r0, [r1, r2]
ldrltsb r0, [r1, r2]
ldrsh r0, =0xC0DE
ldrsh r0, =0xDEAD
.align
.L2:
.word .LC0

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@ -1,24 +0,0 @@
.text
.align 0
cdp p1, 4, cr1, cr2, cr3
cdpeq 4, 3, c1, c4, cr5, 5
ldc 5, cr9, [r3]
ldcl 1, cr14, [r1, #32]
ldcmi 0, cr0, [r2, #1020]!
ldcpll p7, c1, [r3], #64
ldc p0, c8, foo
foo:
stc 5, cr0, [r3]
stcl 3, cr15, [r0, #8]
stceq p4, cr12, [r2, #100]!
stccc p6, c8, [r4], #48
stc p1, c7, bar
bar:
mrc 2, 3, r5, c1, c2
mrcge p4, 5, r15, cr1, cr2, 7
mcr p7, 1, r15, cr1, cr1
mcrlt 5, 1, r8, cr2, cr9, 0

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@ -1,162 +0,0 @@
.text
.align 0
mvfe f0, f1
mvfeqe f3, f5
mvfeqd f4, #1.0
mvfs f4, f7
mvfsp f0, f1
mvfdm f3, f4
mvfez f7, f7
adfe f0, f1, #2.0
adfeqe f1, f2, #0.5
adfsm f3, f4, f5
sufd f0, f0, #2.0
sufs f1, f2, #10.0
sufneez f3, f4, f5
rsfs f1, f1, #0.0
rsfdp f3, f0, #5.0
rsfled f7, f6, f0
mufd f0, f0, f0
mufez f1, f2, #3.0
mufals f0, f0, #4.0
dvfd f0, f0, #1.0000
dvfez f0, f1, #10e0
dvfmism f3, f4, f5
rdfe f0, f1, #1.0e1
rdfs f3, f7, #0f1
rdfccdp f4, f4, f3
powd f0, f2, f3
pows f1, f3, #0e1e1
powcsez f4, f7, #1
rpws f7, f6, f7
rpweqd f0, f1, f2
rpwem f2, f2, f3
rmfd f1, f2, #3
rmfvss f3, f4, f4
rmfep f4, f7, f0
fmls f0, f1, f2
fmleqs f1, f3, f5
fmlplsz f4, f6, f0
fdvs f1, f3, #10
fdvsp f0, f1, f2
fdvhssm f4, f4, f4
frds f1, f1, #1.0
frdgts f2, f1, f0
frdgtsz f4, f4, f5
pold f0, f1, f2
polsz f4, f6, #3.0
poleqe f5, f6, f7
mnfs f0, f1
mnfd f0, #3.0
mnfez f0, #4.0
mnfeqez f0, f5
mnfsp f0, f4
mnfdm f1, f7
absd f0, f1
abssp f1, #3.0
abseqe f4, f5
rnds f1, f2
rndd f3, f4
rndeqez f6, #4.0
sqts f5, f5
sqtdp f6, f6
sqtplez f7, f6
logs f0, #10
loge f0, #0f10
lognedz f0, f1
lgne f1, f2
lgndz f1, f3
lgnvcs f3, f4
exps f1, f3
expem f3, #10.0
exppld f6, f7
sind f0, f1
sinsm f1, f2
singte f4, #5
cosd f1, f3
cosem f4, f5
cosnedp f6, f1
tane f1, f5
tansz f4, f7
tangedz f1, #4.0
asne f4, f5
asnsp f6, #5e-1
asnmidz f5, f5
acss f5, f6
acsd f6, f0
acshsem f1, #0.05e1
atne f0, f5
atnsz f1, #5
atnltd f3, f2
urde f5, f4
nrme f6, f5
nrmpldz f7, f5
fltsp f0, r8
flte f1, r0
flteqdz f5, r7
fix r0, f1
fixz r1, f7
fixcsm r5, f5
wfc r0
wfs r1
rfseq r2
rfc r4
cmf f0, #1
cmf f1, f2
cmfeq f0, f1
cnf f0, #3
cnf f1, #0.5
cnfvs f3, f4
cmfe f0, f1
cmfeeq f1, f2
cmfeqe f3, #5.0
cnfe f1, f3
cnfeeq f3, f4
cnfeqe f4, f7
cnfale f4, #5.0
lfm f0, 4, [r0]
lfm f0, 4, [r0, #0]
lfm f1, 4, [r1, #64]
sfm f2, 4, [r14, #1020]!
sfmeq f7, 3, [r8], #-1020
lfmfd f6, 2, [r15]
sfmea f7, 1, [r8]!
lfmeqea f5, 4, [r6]
sfmnefd f4, 3, [r2]
sfmnefd f4, 3, [r2]!

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@ -1,11 +0,0 @@
@ Tests for complex immediate expressions - none of these need
@ relocations
.text
bar:
mov r0, #0
mov r0, #(. - bar - 8)
ldr r0, bar
ldr r0, [pc, # (bar - . -8)]
.space 4096
mov r0, #(. - bar - 8) & 0xff
ldr r0, [pc, # (bar - . -8) & 0xff]

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@ -1,168 +0,0 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: ARM basic instructions
#as: -marm2 -EL
# Test the standard ARM instructions:
.*: +file format .*arm.*little
Disassembly of section .text:
00000000 <[^>]*> e3a00000 ? mov r0, #0
00000004 <[^>]*> e1a01002 ? mov r1, r2
00000008 <[^>]*> e1a03184 ? mov r3, r4, lsl #3
0000000c <[^>]*> e1a05736 ? mov r5, r6, lsr r7
00000010 <[^>]*> e1a08a59 ? mov r8, r9, asr sl
00000014 <[^>]*> e1a0bd1c ? mov fp, ip, lsl sp
00000018 <[^>]*> e1a0e06f ? mov lr, pc, rrx
0000001c <[^>]*> e1a01002 ? mov r1, r2
00000020 <[^>]*> 01a02003 ? moveq r2, r3
00000024 <[^>]*> 11a04005 ? movne r4, r5
00000028 <[^>]*> b1a06007 ? movlt r6, r7
0000002c <[^>]*> a1a08009 ? movge r8, r9
00000030 <[^>]*> d1a0a00b ? movle sl, fp
00000034 <[^>]*> c1a0c00d ? movgt ip, sp
00000038 <[^>]*> 31a01002 ? movcc r1, r2
0000003c <[^>]*> 21a01003 ? movcs r1, r3
00000040 <[^>]*> 41a03006 ? movmi r3, r6
00000044 <[^>]*> 51a07009 ? movpl r7, r9
00000048 <[^>]*> 61a01008 ? movvs r1, r8
0000004c <[^>]*> 71a09fa1 ? movvc r9, r1, lsr #1f
00000050 <[^>]*> 81a0800f ? movhi r8, pc
00000054 <[^>]*> 91a0f00e ? movls pc, lr
00000058 <[^>]*> 21a09008 ? movcs r9, r8
0000005c <[^>]*> 31a01003 ? movcc r1, r3
00000060 <[^>]*> e1b00008 ? movs r0, r8
00000064 <[^>]*> 31b00007 ? movccs r0, r7
00000068 <[^>]*> e281000a ? add r0, r1, #a
0000006c <[^>]*> e0832004 ? add r2, r3, r4
00000070 <[^>]*> e0865287 ? add r5, r6, r7, lsl #5
00000074 <[^>]*> e0821113 ? add r1, r2, r3, lsl r1
00000078 <[^>]*> e201000a ? and r0, r1, #a
0000007c <[^>]*> e0032004 ? and r2, r3, r4
00000080 <[^>]*> e0065287 ? and r5, r6, r7, lsl #5
00000084 <[^>]*> e0021113 ? and r1, r2, r3, lsl r1
00000088 <[^>]*> e221000a ? eor r0, r1, #a
0000008c <[^>]*> e0232004 ? eor r2, r3, r4
00000090 <[^>]*> e0265287 ? eor r5, r6, r7, lsl #5
00000094 <[^>]*> e0221113 ? eor r1, r2, r3, lsl r1
00000098 <[^>]*> e241000a ? sub r0, r1, #a
0000009c <[^>]*> e0432004 ? sub r2, r3, r4
000000a0 <[^>]*> e0465287 ? sub r5, r6, r7, lsl #5
000000a4 <[^>]*> e0421113 ? sub r1, r2, r3, lsl r1
000000a8 <[^>]*> e2a1000a ? adc r0, r1, #a
000000ac <[^>]*> e0a32004 ? adc r2, r3, r4
000000b0 <[^>]*> e0a65287 ? adc r5, r6, r7, lsl #5
000000b4 <[^>]*> e0a21113 ? adc r1, r2, r3, lsl r1
000000b8 <[^>]*> e2c1000a ? sbc r0, r1, #a
000000bc <[^>]*> e0c32004 ? sbc r2, r3, r4
000000c0 <[^>]*> e0c65287 ? sbc r5, r6, r7, lsl #5
000000c4 <[^>]*> e0c21113 ? sbc r1, r2, r3, lsl r1
000000c8 <[^>]*> e261000a ? rsb r0, r1, #a
000000cc <[^>]*> e0632004 ? rsb r2, r3, r4
000000d0 <[^>]*> e0665287 ? rsb r5, r6, r7, lsl #5
000000d4 <[^>]*> e0621113 ? rsb r1, r2, r3, lsl r1
000000d8 <[^>]*> e2e1000a ? rsc r0, r1, #a
000000dc <[^>]*> e0e32004 ? rsc r2, r3, r4
000000e0 <[^>]*> e0e65287 ? rsc r5, r6, r7, lsl #5
000000e4 <[^>]*> e0e21113 ? rsc r1, r2, r3, lsl r1
000000e8 <[^>]*> e381000a ? orr r0, r1, #a
000000ec <[^>]*> e1832004 ? orr r2, r3, r4
000000f0 <[^>]*> e1865287 ? orr r5, r6, r7, lsl #5
000000f4 <[^>]*> e1821113 ? orr r1, r2, r3, lsl r1
000000f8 <[^>]*> e3c1000a ? bic r0, r1, #a
000000fc <[^>]*> e1c32004 ? bic r2, r3, r4
00000100 <[^>]*> e1c65287 ? bic r5, r6, r7, lsl #5
00000104 <[^>]*> e1c21113 ? bic r1, r2, r3, lsl r1
00000108 <[^>]*> e3e0000a ? mvn r0, #a
0000010c <[^>]*> e1e02004 ? mvn r2, r4
00000110 <[^>]*> e1e05287 ? mvn r5, r7, lsl #5
00000114 <[^>]*> e1e01113 ? mvn r1, r3, lsl r1
00000118 <[^>]*> e310000a ? tst r0, #a
0000011c <[^>]*> e1120004 ? tst r2, r4
00000120 <[^>]*> e1150287 ? tst r5, r7, lsl #5
00000124 <[^>]*> e1110113 ? tst r1, r3, lsl r1
00000128 <[^>]*> e330000a ? teq r0, #a
0000012c <[^>]*> e1320004 ? teq r2, r4
00000130 <[^>]*> e1350287 ? teq r5, r7, lsl #5
00000134 <[^>]*> e1310113 ? teq r1, r3, lsl r1
00000138 <[^>]*> e350000a ? cmp r0, #a
0000013c <[^>]*> e1520004 ? cmp r2, r4
00000140 <[^>]*> e1550287 ? cmp r5, r7, lsl #5
00000144 <[^>]*> e1510113 ? cmp r1, r3, lsl r1
00000148 <[^>]*> e370000a ? cmn r0, #a
0000014c <[^>]*> e1720004 ? cmn r2, r4
00000150 <[^>]*> e1750287 ? cmn r5, r7, lsl #5
00000154 <[^>]*> e1710113 ? cmn r1, r3, lsl r1
00000158 <[^>]*> e330f00a ? teqp r0, #a
0000015c <[^>]*> e132f004 ? teqp r2, r4
00000160 <[^>]*> e135f287 ? teqp r5, r7, lsl #5
00000164 <[^>]*> e131f113 ? teqp r1, r3, lsl r1
00000168 <[^>]*> e370f00a ? cmnp r0, #a
0000016c <[^>]*> e172f004 ? cmnp r2, r4
00000170 <[^>]*> e175f287 ? cmnp r5, r7, lsl #5
00000174 <[^>]*> e171f113 ? cmnp r1, r3, lsl r1
00000178 <[^>]*> e350f00a ? cmpp r0, #a
0000017c <[^>]*> e152f004 ? cmpp r2, r4
00000180 <[^>]*> e155f287 ? cmpp r5, r7, lsl #5
00000184 <[^>]*> e151f113 ? cmpp r1, r3, lsl r1
00000188 <[^>]*> e310f00a ? tstp r0, #a
0000018c <[^>]*> e112f004 ? tstp r2, r4
00000190 <[^>]*> e115f287 ? tstp r5, r7, lsl #5
00000194 <[^>]*> e111f113 ? tstp r1, r3, lsl r1
00000198 <[^>]*> e0000291 ? mul r0, r1, r2
0000019c <[^>]*> e0110392 ? muls r1, r2, r3
000001a0 <[^>]*> 10000091 ? mulne r0, r1, r0
000001a4 <[^>]*> 90190798 ? mullss r9, r8, r7
000001a8 <[^>]*> e021ba99 ? mla r1, r9, sl, fp
000001ac <[^>]*> e033c994 ? mlas r3, r4, r9, ip
000001b0 <[^>]*> b029d798 ? mlalt r9, r8, r7, sp
000001b4 <[^>]*> a034e391 ? mlages r4, r1, r3, lr
000001b8 <[^>]*> e5910000 ? ldr r0, \[r1\]
000001bc <[^>]*> e7911002 ? ldr r1, \[r1, r2\]
000001c0 <[^>]*> e7b32004 ? ldr r2, \[r3, r4\]!
000001c4 <[^>]*> e5922020 ? ldr r2, \[r2, #20\]
000001c8 <[^>]*> e7932424 ? ldr r2, \[r3, r4, lsr #8\]
000001cc <[^>]*> 07b54484 ? ldreq r4, \[r5, r4, lsl #9\]!
000001d0 <[^>]*> 14954006 ? ldrne r4, \[r5\], #6
000001d4 <[^>]*> e6b21003 ? ldrt r1, \[r2\], r3
000001d8 <[^>]*> e6942425 ? ldr r2, \[r4\], r5, lsr #8
000001dc <[^>]*> e51f0008 ? ldr r0, 000001dc <[^>]*>
000001e0 <[^>]*> e5d43000 ? ldrb r3, \[r4\]
000001e4 <[^>]*> 14f85000 ? ldrnebt r5, \[r8\]
000001e8 <[^>]*> e5810000 ? str r0, \[r1\]
000001ec <[^>]*> e7811002 ? str r1, \[r1, r2\]
000001f0 <[^>]*> e7a33004 ? str r3, \[r3, r4\]!
000001f4 <[^>]*> e5822020 ? str r2, \[r2, #20\]
000001f8 <[^>]*> e7832424 ? str r2, \[r3, r4, lsr #8\]
000001fc <[^>]*> 07a54484 ? streq r4, \[r5, r4, lsl #9\]!
00000200 <[^>]*> 14854006 ? strne r4, \[r5\], #6
00000204 <[^>]*> e6821003 ? str r1, \[r2\], r3
00000208 <[^>]*> e6a42425 ? strt r2, \[r4\], r5, lsr #8
0000020c <[^>]*> e50f1004 ? str r1, 00000210 <[^>]*>
00000210 <[^>]*> e5c71000 ? strb r1, \[r7\]
00000214 <[^>]*> e4e02000 ? strbt r2, \[r0\]
00000218 <[^>]*> e8900002 ? ldmia r0, {r1}
0000021c <[^>]*> 09920038 ? ldmeqib r2, {r3, r4, r5}
00000220 <[^>]*> e853ffff ? ldmda r3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}\^
00000224 <[^>]*> e93b05ff ? ldmdb fp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sl}
00000228 <[^>]*> e99100f7 ? ldmib r1, {r0, r1, r2, r4, r5, r6, r7}
0000022c <[^>]*> e89201f8 ? ldmia r2, {r3, r4, r5, r6, r7, r8}
00000230 <[^>]*> e9130003 ? ldmdb r3, {r0, r1}
00000234 <[^>]*> e8740300 ? ldmda r4!, {r8, r9}\^
00000238 <[^>]*> e8800002 ? stmia r0, {r1}
0000023c <[^>]*> 09820038 ? stmeqib r2, {r3, r4, r5}
00000240 <[^>]*> e843ffff ? stmda r3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}\^
00000244 <[^>]*> e92a05ff ? stmdb sl!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sl}
00000248 <[^>]*> e8010007 ? stmda r1, {r0, r1, r2}
0000024c <[^>]*> e9020018 ? stmdb r2, {r3, r4}
00000250 <[^>]*> e8830003 ? stmia r3, {r0, r1}
00000254 <[^>]*> e9e40300 ? stmib r4!, {r8, r9}\^
00000258 <[^>]*> ef123456 ? swi 0x00123456
0000025c <[^>]*> 2f000033 ? swics 0x00000033
00000260 <[^>]*> ebfffffe ? bl 00000260 <[^>]*>
[ ]*260: ARM26 _wombat
00000264 <[^>]*> 5bffffe9 ? blpl 00000210 <bar>
00000268 <[^>]*> eafffffe ? b 00000268 <[^>]*>
[ ]*268: ARM26 _wibble
0000026c <[^>]*> dafffffe ? ble 0000026c <[^>]*>
[ ]*26c: ARM26 testerfunc

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@ -1,189 +0,0 @@
@ Test file for ARM/GAS -- basic instructions
.text
.align
mov r0, #0
mov r1, r2
mov r3, r4, lsl #3
mov r5, r6, lsr r7
mov r8, r9, asr r10
mov r11, r12, asl r13
mov r14, r15, rrx
moval r1, r2
moveq r2, r3
movne r4, r5
movlt r6, r7
movge r8, r9
movle r10, r11
movgt r12, r13
movcc r1, r2
movcs r1, r3
movmi r3, r6
movpl r7, r9
movvs r1, r8
movvc r9, r1, lsr #31
movhi r8, r15
movls r15, r14
movhs r9, r8
movul r1, r3
movs r0, r8
movuls r0, r7
add r0, r1, #10
add r2, r3, r4
add r5, r6, r7, asl #5
add r1, r2, r3, lsl r1
and r0, r1, #10
and r2, r3, r4
and r5, r6, r7, asl #5
and r1, r2, r3, lsl r1
eor r0, r1, #10
eor r2, r3, r4
eor r5, r6, r7, asl #5
eor r1, r2, r3, lsl r1
sub r0, r1, #10
sub r2, r3, r4
sub r5, r6, r7, asl #5
sub r1, r2, r3, lsl r1
adc r0, r1, #10
adc r2, r3, r4
adc r5, r6, r7, asl #5
adc r1, r2, r3, lsl r1
sbc r0, r1, #10
sbc r2, r3, r4
sbc r5, r6, r7, asl #5
sbc r1, r2, r3, lsl r1
rsb r0, r1, #10
rsb r2, r3, r4
rsb r5, r6, r7, asl #5
rsb r1, r2, r3, lsl r1
rsc r0, r1, #10
rsc r2, r3, r4
rsc r5, r6, r7, asl #5
rsc r1, r2, r3, lsl r1
orr r0, r1, #10
orr r2, r3, r4
orr r5, r6, r7, asl #5
orr r1, r2, r3, lsl r1
bic r0, r1, #10
bic r2, r3, r4
bic r5, r6, r7, asl #5
bic r1, r2, r3, lsl r1
mvn r0, #10
mvn r2, r4
mvn r5, r7, asl #5
mvn r1, r3, lsl r1
tst r0, #10
tst r2, r4
tst r5, r7, asl #5
tst r1, r3, lsl r1
teq r0, #10
teq r2, r4
teq r5, r7, asl #5
teq r1, r3, lsl r1
cmp r0, #10
cmp r2, r4
cmp r5, r7, asl #5
cmp r1, r3, lsl r1
cmn r0, #10
cmn r2, r4
cmn r5, r7, asl #5
cmn r1, r3, lsl r1
teqp r0, #10
teqp r2, r4
teqp r5, r7, asl #5
teqp r1, r3, lsl r1
cmnp r0, #10
cmnp r2, r4
cmnp r5, r7, asl #5
cmnp r1, r3, lsl r1
cmpp r0, #10
cmpp r2, r4
cmpp r5, r7, asl #5
cmpp r1, r3, lsl r1
tstp r0, #10
tstp r2, r4
tstp r5, r7, asl #5
tstp r1, r3, lsl r1
mul r0, r1, r2
muls r1, r2, r3
mulne r0, r1, r0
mullss r9, r8, r7
mla r1, r9, r10, r11
mlas r3, r4, r9, r12
mlalt r9, r8, r7, r13
mlages r4, r1, r3, r14
ldr r0, [r1]
ldr r1, [r1, r2]
ldr r2, [r3, r4]!
ldr r2, [r2, #32]
ldr r2, [r3, r4, lsr #8]
ldreq r4, [r5, r4, asl #9]!
ldrne r4, [r5], #6
ldrt r1, [r2], r3
ldr r2, [r4], r5, lsr #8
foo:
ldr r0, foo
ldrb r3, [r4]
ldrnebt r5, [r8]
str r0, [r1]
str r1, [r1, r2]
str r3, [r3, r4]!
str r2, [r2, #32]
str r2, [r3, r4, lsr #8]
streq r4, [r5, r4, asl #9]!
strne r4, [r5], #6
str r1, [r2], r3
strt r2, [r4], r5, lsr #8
str r1, bar
bar:
stralb r1, [r7]
strbt r2, [r0]
ldmia r0, {r1}
ldmeqib r2, {r3, r4, r5}
ldmalda r3, {r0-r15}^
ldmdb r11!, {r0-r8, r10}
ldmed r1, {r0, r1, r2}|0xf0
ldmfd r2, {r3, r4}+{r5, r6, r7, r8}
ldmea r3, 3
ldmfa r4!, {r8, r9}^
stmia r0, {r1}
stmeqib r2, {r3, r4, r5}
stmalda r3, {r0-r15}^
stmdb r10!, {r0-r8, r10}
stmed r1, {r0, r1, r2}
stmfd r2, {r3, r4}
stmea r3, 3
stmfa r4!, {r8, r9}^
swi 0x123456
swihs 0x33
bl _wombat
blpl bar
b _wibble
ble testerfunc

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#objdump: -s
#as: -EL
#name: arm little-endian fpconst
.*: +file format .*arm.*
Contents of section .text:
0000 cdcc8c3f 00000000 9999f13f 9a999999 .*

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@ -1,8 +0,0 @@
# Test fp constants.
# These need ARM specific support because 8 byte fp constants in little
# endian mode are represented abnormally.
.text
.float 1.1
.float 0
.double 1.1

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@ -1,191 +0,0 @@
.text
.code 16
foo:
lsl r2, r1, #3
lsr r3, r4, #31
wibble/data:
asr r7, r0, #5
lsl r1, r2, #0
lsr r3, r4, #0
asr r4, r5, #0
lsr r6, r7, #32
asr r0, r1, #32
add r1, r2, r3
add r2, r4, #2
sub r3, r5, r7
sub r2, r4, #7
mov r4, #255
cmp r3, #250
add r6, #123
sub r5, #128
and r3, r5
eor r4, r6
lsl r1, r0
lsr r2, r3
asr r4, r6
adc r5, r7
sbc r0, r4
ror r1, r4
tst r2, r5
neg r1, r1
cmp r2, r3
cmn r1, r4
orr r0, r3
mul r4, r5
bic r5, r7
mvn r5, r5
add r1, r13
add r12, r2
add r9, r9
cmp r1, r14
cmp r8, r0
cmp r12, r14
mov r0, r9
mov r9, r4
mov r8, r8
bx r7
bx r8
.align 0
bx pc
ldr r3, [pc, #128]
ldr r4, bar
str r0, [r1, r2]
strb r1, [r2, r4]
ldr r5, [r6, r7]
ldrb r2, [r4, r5]
.align 0
bar:
strh r1, [r2, r3]
ldrh r3, [r4, r0]
ldsb r1, [r6, r7]
ldsh r2, [r0, r5]
str r3, [r3, #124]
ldr r1, [r4, #124]
ldr r5, [r5]
strb r1, [r5, #31]
strb r1, [r4, #5]
strb r2, [r6]
strh r4, [r5, #62]
ldrh r5, [r0, #4]
ldrh r3, [r2]
str r3, [r13, #1020]
ldr r1, [r13, #44]
ldr r2, [r13]
add r7, r15, #1020
add r4, r13, #512
add r13, #268
add r13, #-104
sub r13, #268
sub r13, #-108
push {r0, r1, r2, r4}
push {r0, r3-r7, lr}
pop {r3, r4, r7}
pop {r0-r7, r15}
stmia r3!, {r0, r1, r4-r7}
ldmia r0!, {r1-r7}
beq bar
bne bar
bcs bar
bcc bar
bmi bar
bpl bar
bvs bar
bvc bar
bhi bar
bls bar
bge bar
bgt bar
blt bar
bgt bar
ble bar
bhi bar
blo bar
bul bar
close:
lsl r4, r5, #near - close
near:
add r2, r3, #near - close
add sp, sp, #127 << 2
sub sp, sp, #127 << 2
add r0, sp, #255 << 2
add r0, pc, #255 << 2
add sp, sp, #bar - foo
sub sp, sp, #bar - foo
add r0, sp, #bar - foo
add r0, pc, #bar - foo
add r1, #bar - foo
mov r6, #bar - foo
cmp r7, #bar - foo
nop
nop
.arm
localbar:
b localbar
b wombat
bl localbar
bl wombat
bx r0
swi 0x123456
.thumb
adr r0, forwardonly
b foo
b wombat
bl foo
bl wombat
bx r0
swi 0xff
.align 0
forwardonly:
beq wombat
bne wombat
bcs wombat
bcc wombat
bmi wombat
bpl wombat
bvs wombat
bvc wombat
bhi wombat
bls wombat
bge wombat
bgt wombat
blt wombat
bgt wombat
ble wombat
bhi wombat
blo wombat
bul wombat
back:
bl local
.space (1 << 11) @ leave space to force long offsets
local:
bl back

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@ -1,16 +0,0 @@
.text
h8300_add_sub:
add.b #16,r1l
add.b r1h,r1l
add.w r1,r2
adds #1,r4
adds #2,r5
addx r0l,r1l
addx #16,r2h
sub.b r0l,r1l
sub.w r0,r1
subs #1,r4
subs #2,r5
subx r0l,r1l
subx #16,r2h

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.h8300h
.text
h8300h_add_sub:
add.b #16,r1l
add.b r1h,r1l
add.w #32,r1
add.w r1,r2
add.l #64,er1
add.l er1,er2
adds #1,er4
adds #2,er5
adds #4,er6
addx r0l,r1l
addx #16,r2h
sub.b r0l,r1l
sub.w #16,r1
sub.w r0,r1
sub.l #64,er1
sub.l er1,er2
subs #1,er4
subs #2,er5
subs #4,er6
subx r0l,r1l
subx #16,r2h

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.h8300s
.text
h8300s_add_sub:
add.b #16,r1l
add.b r1h,r1l
add.w #32,r1
add.w r1,r2
add.l #64,er1
add.l er1,er2
adds #1,er4
adds #2,er5
adds #4,er6
addx r0l,r1l
addx #16,r2h
sub.b r0l,r1l
sub.w #16,r1
sub.w r0,r1
sub.l #64,er1
sub.l er1,er2
subs #1,er4
subs #2,er5
subs #4,er6
subx r0l,r1l
subx #16,r2h

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@ -1,18 +0,0 @@
.text
h8300_bit_ops_1:
band #0,r0l
band #0,@r0
band #0,@64:8
bclr #0,r0l
bclr #0,@r0
bclr #0,@64:8
bclr r1l,r0l
bclr r1l,@r0
bclr r1l,@64:8
biand #0,r0l
biand #0,@r0
biand #0,@64:8
bild #0,r0l
bild #0,@r0
bild #0,@64:8

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.h8300h
.text
h8300h_bit_ops_1:
band #0,r0l
band #0,@er0
band #0,@64:8
bclr #0,r0l
bclr #0,@er0
bclr #0,@64:8
bclr r1l,r0l
bclr r1l,@er0
bclr r1l,@64:8
biand #0,r0l
biand #0,@er0
biand #0,@64:8
bild #0,r0l
bild #0,@er0
bild #0,@64:8

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.h8300s
.text
h8300s_bit_ops_1:
band #0,r0l
band #0,@er0
band #0,@64:8
band #0,@128:16
band #0,@65536:32
bclr #0,r0l
bclr #0,@er0
bclr #0,@64:8
bclr #0,@128:16
bclr #0,@65536:32
bclr r1l,r0l
bclr r1l,@er0
bclr r1l,@64:8
bclr r1l,@128:16
bclr r1l,@65536:32
biand #0,r0l
biand #0,@er0
biand #0,@64:8
biand #0,@128:16
biand #0,@65536:32
bild #0,r0l
bild #0,@er0
bild #0,@64:8
bild #0,@128:16
bild #0,@65536:32

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@ -1,15 +0,0 @@
.text
h8300_bit_ops_2:
bior #0,r0l
bior #0,@r0
bior #0,@64:8
bist #0,r0l
bist #0,@r0
bist #0,@64:8
bixor #0,r0l
bixor #0,@r0
bixor #0,@64:8
bld #0,r0l
bld #0,@r0
bld #0,@64:8

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.h8300h
.text
h8300h_bit_ops_2:
bior #0,r0l
bior #0,@er0
bior #0,@64:8
bist #0,r0l
bist #0,@er0
bist #0,@64:8
bixor #0,r0l
bixor #0,@er0
bixor #0,@64:8
bld #0,r0l
bld #0,@er0
bld #0,@64:8

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.h8300s
.text
h8300s_bit_ops_2:
bior #0,r0l
bior #0,@er0
bior #0,@64:8
bior #0,@128:16
bior #0,@65536:32
bist #0,r0l
bist #0,@er0
bist #0,@64:8
bist #0,@128:16
bist #0,@65536:32
bixor #0,r0l
bixor #0,@er0
bixor #0,@64:8
bixor #0,@128:16
bixor #0,@65536:32
bld #0,r0l
bld #0,@er0
bld #0,@64:8
bld #0,@128:16
bld #0,@65536:32

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.text
h8300_bit_ops_3:
bnot #0,r0l
bnot #0,@r0
bnot #0,@64:8
bnot r1l,r0l
bnot r1l,@r0
bnot r1l,@64:8
bset #0,r0l
bset #0,@r0
bset #0,@64:8
bset r1l,r0l
bset r1l,@r0
bset r1l,@64:8

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.h8300h
.text
h8300h_bit_ops_3:
bnot #0,r0l
bnot #0,@er0
bnot #0,@64:8
bnot r1l,r0l
bnot r1l,@er0
bnot r1l,@64:8
bset #0,r0l
bset #0,@er0
bset #0,@64:8
bset r1l,r0l
bset r1l,@er0
bset r1l,@64:8

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.h8300s
.text
h8300s_bit_ops_3:
bnot #0,r0l
bnot #0,@er0
bnot #0,@64:8
bnot #0,@128:16
bnot #0,@65536:32
bnot r1l,r0l
bnot r1l,@er0
bnot r1l,@64:8
bnot r1l,@128:16
bnot r1l,@65536:32
bset #0,r0l
bset #0,@er0
bset #0,@64:8
bset #0,@128:16
bset #0,@65536:32
bset r1l,r0l
bset r1l,@er0
bset r1l,@64:8
bset r1l,@128:16
bset r1l,@65536:32

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.text
h8300_bit_ops_4:
bor #0,r0l
bor #0,@r0
bor #0,@64:8
bst #0,r0l
bst #0,@r0
bst #0,@64:8
btst #0,r0l
btst #0,@r0
btst #0,@64:8
btst r1l,r0l
btst r1l,@r0
btst r1l,@64:8
bxor #0,r0l
bxor #0,@r0
bxor #0,@64:8

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.h8300h
.text
h8300h_bit_ops_4:
bor #0,r0l
bor #0,@er0
bor #0,@64:8
bst #0,r0l
bst #0,@er0
bst #0,@64:8
btst #0,r0l
btst #0,@er0
btst #0,@64:8
btst r1l,r0l
btst r1l,@er0
btst r1l,@64:8
bxor #0,r0l
bxor #0,@er0
bxor #0,@64:8

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.h8300s
.text
h8300s_bit_ops_4:
bor #0,r0l
bor #0,@er0
bor #0,@64:8
bor #0,@128:16
bor #0,@65536:32
bst #0,r0l
bst #0,@er0
bst #0,@64:8
bst #0,@128:16
bst #0,@65536:32
btst #0,r0l
btst #0,@er0
btst #0,@64:8
btst #0,@128:16
btst #0,@65536:32
btst r1l,r0l
btst r1l,@er0
btst r1l,@64:8
btst r1l,@128:16
btst r1l,@65536:32
bxor #0,r0l
bxor #0,@er0
bxor #0,@64:8
bxor #0,@128:16
bxor #0,@65536:32

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.text
h8300_branches:
bsr h8300_branches
jmp h8300_branches
jmp @r0
jmp @@16:8
jsr h8300_branches
jsr @r0
jsr @@16:8

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.h8300h
.text
h8300h_branches:
bsr h8300h_branches:8
bsr h8300h_branches:16
jmp h8300h_branches
jmp @er0
jmp @@16:8
jsr h8300h_branches
jsr @er0
jsr @@16:8

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.h8300s
.text
h8300s_branches:
bsr h8300s_branches:8
bsr h8300s_branches:16
jmp h8300s_branches
jmp @er0
jmp @@16:8
jsr h8300s_branches
jsr @er0
jsr @@16:8

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.text
h8300_cbranch:
bra h8300_cbranch
bt h8300_cbranch
brn h8300_cbranch
bf h8300_cbranch
bhi h8300_cbranch
bls h8300_cbranch
bcc h8300_cbranch
bhs h8300_cbranch
bcs h8300_cbranch
blo h8300_cbranch
bne h8300_cbranch
beq h8300_cbranch
bvc h8300_cbranch
bvs h8300_cbranch
bpl h8300_cbranch
bmi h8300_cbranch
bge h8300_cbranch
blt h8300_cbranch
bgt h8300_cbranch
ble h8300_cbranch

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@ -1,44 +0,0 @@
.text
.h8300h
h8300h_cbranch:
bra h8300h_cbranch:8
bt h8300h_cbranch:8
brn h8300h_cbranch:8
bf h8300h_cbranch:8
bhi h8300h_cbranch:8
bls h8300h_cbranch:8
bcc h8300h_cbranch:8
bhs h8300h_cbranch:8
bcs h8300h_cbranch:8
blo h8300h_cbranch:8
bne h8300h_cbranch:8
beq h8300h_cbranch:8
bvc h8300h_cbranch:8
bvs h8300h_cbranch:8
bpl h8300h_cbranch:8
bmi h8300h_cbranch:8
bge h8300h_cbranch:8
blt h8300h_cbranch:8
bgt h8300h_cbranch:8
ble h8300h_cbranch:8
bra h8300h_cbranch:16
bt h8300h_cbranch:16
brn h8300h_cbranch:16
bf h8300h_cbranch:16
bhi h8300h_cbranch:16
bls h8300h_cbranch:16
bcc h8300h_cbranch:16
bhs h8300h_cbranch:16
bcs h8300h_cbranch:16
blo h8300h_cbranch:16
bne h8300h_cbranch:16
beq h8300h_cbranch:16
bvc h8300h_cbranch:16
bvs h8300h_cbranch:16
bpl h8300h_cbranch:16
bmi h8300h_cbranch:16
bge h8300h_cbranch:16
blt h8300h_cbranch:16
bgt h8300h_cbranch:16
ble h8300h_cbranch:16

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.text
.h8300s
h8300s_cbranch:
bra h8300s_cbranch:8
bt h8300s_cbranch:8
brn h8300s_cbranch:8
bf h8300s_cbranch:8
bhi h8300s_cbranch:8
bls h8300s_cbranch:8
bcc h8300s_cbranch:8
bhs h8300s_cbranch:8
bcs h8300s_cbranch:8
blo h8300s_cbranch:8
bne h8300s_cbranch:8
beq h8300s_cbranch:8
bvc h8300s_cbranch:8
bvs h8300s_cbranch:8
bpl h8300s_cbranch:8
bmi h8300s_cbranch:8
bge h8300s_cbranch:8
blt h8300s_cbranch:8
bgt h8300s_cbranch:8
ble h8300s_cbranch:8
bra h8300s_cbranch:16
bt h8300s_cbranch:16
brn h8300s_cbranch:16
bf h8300s_cbranch:16
bhi h8300s_cbranch:16
bls h8300s_cbranch:16
bcc h8300s_cbranch:16
bhs h8300s_cbranch:16
bcs h8300s_cbranch:16
blo h8300s_cbranch:16
bne h8300s_cbranch:16
beq h8300s_cbranch:16
bvc h8300s_cbranch:16
bvs h8300s_cbranch:16
bpl h8300s_cbranch:16
bmi h8300s_cbranch:16
bge h8300s_cbranch:16
blt h8300s_cbranch:16
bgt h8300s_cbranch:16
ble h8300s_cbranch:16

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@ -1,28 +0,0 @@
# 1 "libgcc1.S"
;; libgcc1 routines for the Hitachi h8/300 cpu.
;; Contributed by Steve Chamberlain.
;; sac@cygnus.com
.section .text
.align 2
.global ___cmpsi2
___cmpsi2:
cmp.w r2 ,r0
bne .L2
cmp.w r3 ,r1
bne .L2
mov.w #1,r0
rts
.L2:
cmp.w r0 ,r2
bgt .L4
bne .L3
cmp.w r1 ,r3
bls .L3
.L4:
sub.w r0 ,r0
rts
.L3:
mov.w #2,r0
.L5:
rts
.end

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.text
h8300_cmp:
cmp.b #0,r0l
cmp.b r0h,r0l
cmp.w r0,r1

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.h8300h
.text
h8300h_cmp:
cmp.b #0,r0l
cmp.b r0h,r0l
cmp.w #32,r0
cmp.w r0,r1
cmp.l #64,er0
cmp.l er0,er1

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@ -1,10 +0,0 @@
.h8300s
.text
h8300s_cmp:
cmp.b #0,r0l
cmp.b r0h,r0l
cmp.w #32,r0
cmp.w r0,r1
cmp.l #64,er0
cmp.l er0,er1

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.text
h8300_decimal:
daa r0l
das r0l

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.h8300h
.text
h8300h_decimal:
daa r0l
das r0l

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@ -1,6 +0,0 @@
.h8300s
.text
h8300s_decimal:
daa r0l
das r0l

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@ -1,5 +0,0 @@
.text
h8300_div_mul:
divxu r0l,r1
mulxu r0l,r1

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.h8300h
.text
h8300h_div_mul:
divxu.b r0l,r1
divxu.w r0,er1
divxs.b r0l,r1
divxs.w r0,er1
mulxu.b r0l,r1
mulxu.w r0,er1
mulxs.b r0l,r1
mulxs.w r0,er1

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@ -1,12 +0,0 @@
.h8300h
.text
h8300h_div_mul:
divxu.b r0l,r1
divxu.w r0,er1
divxs.b r0l,r1
divxs.w r0,er1
mulxu.b r0l,r1
mulxu.w r0,er1
mulxs.b r0l,r1
mulxs.w r0,er1

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@ -1,8 +0,0 @@
.h8300h
.text
h8300h_extend:
exts.w r0
exts.l er0
extu.w r0
extu.l er0

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.h8300s
.text
h8300s_extend:
exts.w r0
exts.l er0
extu.w r0
extu.l er0

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@ -1,23 +0,0 @@
#objdump: --prefix-addresses -dr
#name: FFxx1
# Test for FFxx:8 addressing.
.*: file format .*h8300.*
Disassembly of section .text:
...
0: 16 main
0+0400 <main> f8 7f mov.b #0x7f,r0l
0+0402 <main[+]2> 28 bb mov.b @0xbb:8,r0l
0+0404 <main[+]4> 6a 88 ff b9 mov.b r0l,@0xffb9:16
0+0408 <main[+]8> f8 01 mov.b #0x1,r0l
0+040a <loop> 6a 88 ff bb mov.b r0l,@0xffbb:16
0+040e <delay> 79 01 00 00 mov.w #0x0,r1
0+0412 <deloop> 0b 01 adds #0x1,er1
0+0414 <deloop[+]2> 46 00 bne .0 \(416\)
415: DISP8 deloop[+]0xffffffff
0+0416 <deloop[+]4> 12 88 rotl r0l
0+0418 <deloop[+]6> 40 00 bra .0 \(41a\)
419: DISP8 loop[+]0xffffffff
...

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.equ p6ddr, 0xffb9 ;0x7f for output
.equ p6dr, 0xffbb
.equ seed, 0x01
.text
.org 0
reset: .word main ;reset vector
;
.org 0x400
main: mov.b #0x7f,r0l ;port 6 ddr = 7F
mov.b @0xffbb:8,r0l ;***test***
mov.b r0l,@p6ddr:16
;
mov.b #seed,r0l ;start with 0000001
loop: mov.b r0l,@p6dr:16 ;output to port 6
delay: mov.w #0x0000,r1
deloop: adds.w #1,r1
bne deloop:8 ;not = 0
rotl r0l
bra loop:8
.word 0

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@ -1,96 +0,0 @@
#
# This is sort of a prototype test case, which parses the listing output
# from the assembler. Later, more prototypes should be added for cases
# where objdump gets run over the .o file, and anything else like that...
#
# When you write a test case that uses the listing output, just copy this
# file (trimming down the overly-verbose comments a little), and
# adjust it to do what you need.
#
# Remember that any ".exp" file found in the tree will be processed by
# dejagnu.
#
# FIRST SAMPLE TEST CASE
#
proc do_foo {} {
# This string is used below when printing out a success or failure message.
# If more than one test is run by a given .exp file, it'd be nice to include
# the name of the input file.
set testname "foo.s: multi-register tweaking and frobnication"
# I use this as a flag to record whether the test case passed. If this
# flag is still clear when EOF is reached, this test fails. If there are
# two or more patterns, and I need to see all of them, I'll create N variables
# and check if the sum is N.
set x 0
# Call gas_start with two arguments: The input file name (which it'll search
# for in $srcdir/$subdir, that is, the source directory where the .exp file
# is), and a (possibly empty) string of options to pass to the assembler.
gas_start "foo.s" "-al"
# Now I just iterate over all the output lines, looking for what I want
# to see. Since each pattern explicitly will not span line breaks, there's
# also a pattern for lines that don't match anything else. (Is it safe to
# use ".*" for patterns not crossing line breaks? I don't think "$" does the
# right thing for that, in any case. I should check into whether the extra
# pattern is even needed.
# Apparently CRLF is received when using ptys for subprocesses; hence the
# \r\n for matching line number 3.
# Note that if you use "{ ... }" for the expect clause, you can't have
# comments inside it.
# This test case is kinda bogus in that seeing either a word of all zeros
# at address zero or a C-style comment on line three that says "Looking for
# C comments" (with very specific punctuation and whitespace) will cause
# it to pass this test. Usually
while 1 {
expect {
-re "^ +\[0-9\]+ 0000 00000000\[^\n\]*\n" { set x 1 }
-re "^ +3\[ \t\]+/. Looking for C comments. ./\r\n" { set x 1 }
-re "\[^\n\]*\n" { }
timeout { perror "timeout\n"; break }
eof { break }
}
}
# This was intended to do any cleanup necessary. It kinda looks like it isn't
# needed, but just in case, please keep it in for now.
gas_finish
# Did we find what we were looking for? If not, flunk it.
if $x then { pass $testname } else { fail $testname }
}
# Now actually run the test. It can be conditionalized if the test is
# not appropriate for all targets. The proc "istarget" checks a generalized
# form of the target name, so that (e.g.) "m68332-unknown-aout" would match
# here. So far, I think only the CPU name is actually ever altered.
if [istarget m68k-*] then {
do_foo
}
#
# SECOND SAMPLE TEST CASE
#
# This is a tiny bit like the C compiler torture tests, in that it'll run
# the assembler with the power set of the list of options supplied.
#
# The first argument is the test file name; the second is arguments that
# are always to be provided; the third is a space-separated list of options
# which are optional (ending in ">" if output should be ignored, like "-a>");
# the fourth is the name of the test. So far, only binary options are handled
# this way; N-way options (like CPU type for m68k) aren't handled yet.
#
# The variable $stdoptlist usually has a reasonable set of optional options
# for this target.
# No, PIC isn't supported yet. This is only an example.
gas_test "quux.s" "-K" $stdoptlist "use of quuxes in PIC mode"