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Integrate recent changes done to the amiga branch. Includes support

Browse Source 
for the '40.
Support for more scsi controllers (zeus, magnum)
Support for more tapes (in st.c)
New custom chip console code integrated.
This commit is contained in:
mw 1994-01-26 21:05:34 +00:00
parent 100033fc0f
commit bdb2629d63
52 changed files with 10723 additions and 2071 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
sys/arch/amiga/dev/Makefile Normal file
View File

@ -0,0 +1,12 @@
#
# @(#)Makefile 5.15 (Berkeley) 5/27/92
#
BINGRP= kmem
BINOWN= root
BINMODE=755
MAN4 = st.0
.include <bsd.prog.mk>

294
sys/arch/amiga/dev/Zeus.script Normal file
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@ -0,0 +1,294 @@
; **
; ** 53C710 SCRIPTS for Progressive Peripherals, Inc. Zeus SCSI-2 driver
; **
; **
; ** Absolute definitions
; **
ABSOLUTE ds_Device = 0x00
ABSOLUTE ds_Identify = ds_Device + 4
ABSOLUTE ds_Cmd = ds_Identify + 8
ABSOLUTE ds_Status = ds_Cmd + 8
ABSOLUTE ds_Msg = ds_Status + 8
ABSOLUTE ds_MsgOut = ds_Msg + 8
ABSOLUTE ds_MsgIn = ds_MsgOut + 8
ABSOLUTE ds_Data = ds_MsgIn + 8
;ABSOLUTE xx = 0x00ff00
;ABSOLUTE xx = 0x00ff01
;ABSOLUTE xx = 0x00ff02
;ABSOLUTE xx = 0x00ff03
;ABSOLUTE xx = 0x00ff04
;ABSOLUTE xx = 0x00ff05
;ABSOLUTE xx = 0x00ff06
;ABSOLUTE xx = 0x00ff07
;ABSOLUTE xx = 0x00ff08
;ABSOLUTE xx = 0x00ff09
;ABSOLUTE xx = 0x00ff10
;ABSOLUTE xx = 0x00ff11
;ABSOLUTE xx = 0x00ff12
;ABSOLUTE xx = 0x00ff13
;ABSOLUTE xx = 0x00ff14
;ABSOLUTE xx = 0x00ff15
;ABSOLUTE xx = 0x00ff16
;ABSOLUTE xx = 0x00ff17
;ABSOLUTE xx = 0x00ff18
;ABSOLUTE xx = 0x00ff19
;ABSOLUTE xx = 0x00ff20
;ABSOLUTE xx = 0x00ff21
;ABSOLUTE xx = 0x00ff22
;ABSOLUTE xx = 0x00ff23
;ABSOLUTE xx = 0x00ff24
;ABSOLUTE xx = 0x00ff25
;ABSOLUTE xx = 0x00ff26
;ABSOLUTE xx = 0x00fffb
;ABSOLUTE xx = 0x00fffc
;ABSOLUTE xx = 0x00fffd
;ABSOLUTE xx = 0x00fffe
ENTRY msgout, cmd, status, msgin, dataout, datain
PROC scripts:
; **
; ** Initial starting point - select device with ATN
; **
SELECT ATN FROM ds_Device, REL(x288)
JUMP REL(status), WHEN Status
MOVE CTEST7 | 0x10 TO CTEST7 ; ** disable selection timeout?
; **
; ** Should be message out phase [older devices won't respond to Select with ATN]
; **
msgout:
JUMP REL(cmd), IF Cmd ; **FIX** target wants command directly
INT 0x0000ff01, IF NOT Msg_Out ; ** expected message out
MOVE SCRATCH1 | 0x00 TO SFBR
JUMP REL(x78), IF 0x00
; **
; ** Scratch1 != 00 means we have a special message to send to the target
; ** (the synchronous negotiation message)
x30:
SET ATN
MOVE FROM ds_MsgOut, WHEN Msg_Out ; ** send message
x40:
JUMP REL(status), WHEN Status
MOVE FROM ds_MsgIn, WHEN Msg_In ; ** receive response
JUMP REL(status), WHEN Status
JUMP REL(x30), IF Msg_Out
JUMP REL(status), IF Status
JUMP REL(x180), IF Msg_In
JUMP REL(cmd)
; **
; ** send identify message
; **
x78:
MOVE FROM ds_Identify, WHEN Msg_Out
JUMP REL(status), WHEN Status
JUMP REL(x78), IF Msg_Out
JUMP REL(status), IF Status
JUMP REL(x180), IF Msg_In
; **
; ** Should be in command phase
; **
cmd:
INT 0x0000ff02, IF NOT Cmd ; ** expected command
MOVE FROM ds_Cmd, WHEN Cmd
JUMP REL(x1d8), WHEN Msg_In
JUMP REL(status), IF Status
JUMP REL(datain), IF Data_In
JUMP REL(dataout), IF Data_Out
INT 0x0000ff03 ; ** invalid phase after command
; **
; ** Should be in status phase
; **
status:
MOVE FROM ds_Status, WHEN Status
MOVE SIDL | 0x00 TO SFBR
MOVE SFBR | 0x00 TO SCRATCH0 ; ** save status in SCRATCH0
; **
; ** Should be in message in phase
; **
msgin:
INT 0x0000ff04, WHEN NOT Msg_In ; ** expected message in
MOVE FROM ds_Msg, WHEN Msg_In
;JUMP REL(msgin), IF 0x07 ; ** assume REJECT is for sync neg
INT 0x0000ff26, IF NOT 0x00 ; ** message byte != complete
CLEAR ACK
WAIT DISCONNECT
MOVE CTEST7 & 0xef TO CTEST7
MOVE SCRATCH0 | 0x00 TO SFBR ; ** check status byte
INT 0x0000fffc, IF 0x02 ; ** -> Check Condition
INT 0x0000fffb, IF 0x08 ; ** -> Busy
INT 0x0000fffd, IF 0x18 ; ** -> ??
INT 0x0000fffe, IF NOT 0x00 ; ** -> not good status
INT 0x0000ff00 ; ** -> normal completion
; **
; ** Should be in data out phase
; **
dataout:
MOVE FROM ds_Data, WHEN Data_Out
JUMP REL(chain_out), WHEN Data_Out
; **
; ** Check phase after data transfer
; **
x158:
JUMP REL(status), WHEN Status
JUMP REL(x230), IF Msg_In
INT 0x0000ff05 ; ** unexpected phase after data
; **
; ** Should be data in phase
; **
datain:
MOVE FROM ds_Data, WHEN Data_In
JUMP REL(chain_in), WHEN Data_In
JUMP REL(x158)
; **
; ** Got message in phase after sending message out
;
x180:
MOVE FROM ds_Msg, WHEN Msg_In
JUMP REL(x1a8), IF 0x01 ; ** -> Extended message
INT 0x0000ff08, IF 0x02 ; ** -> Save Data Pointer
JUMP REL(x1c0), IF 0x04 ; ** -> Disconnect
INT 0x0000ff06 ; ** Unexpected message
; **
; ** Extended message
; **
x1a8:
CLEAR ACK
MOVE FROM ds_MsgIn, WHEN Msg_In ; ** input message
INT 0x0000ff07 ; ** and interrupt
; **
; ** Disconnect message received
; **
x1c0:
CLEAR ACK
WAIT DISCONNECT
INT 0x0000ff09
; **
; ** Message in after command
; **
x1d8:
MOVE FROM ds_Msg, WHEN Msg_In ; ** get message byte
JUMP REL(x200), IF 0x01 ; ** -> Extended Message
INT 0x0000ff10, IF 0x02 ; ** -> Save Data Pointer
JUMP REL(x218), IF 0x04 ; ** -> Disconnect
INT 0x0000ff11 ; ** unexpected message
; **
; ** Extended message after command
; **
x200:
CLEAR ACK
MOVE FROM ds_MsgIn, WHEN Msg_In
INT 0x0000ff12
; **
; ** Disconnect after command
; **
x218:
CLEAR ACK
WAIT DISCONNECT
INT 0x0000ff13
; **
; ** Message in after data transfer
; **
x230:
MOVE FROM ds_Msg, WHEN Msg_In ; ** Get message byte
JUMP REL(x258), IF 0x01 ; ** -> Extended Message
INT 0x0000ff14, IF 0x02 ; ** -> Save Data Pointers
JUMP REL(x270), IF 0x04 ; ** -> Disconnected
INT 0x0000ff15 ; ** Unexpected message
; **
; ** Extended message after data transfer
; **
x258:
CLEAR ACK
MOVE FROM ds_MsgIn, WHEN Msg_In
INT 0x0000ff16
; **
; ** Disconnect after data transfer
; **
x270:
CLEAR ACK
WAIT DISCONNECT
INT 0x0000ff17
; **
; ** Selection aborted
; **
x288:
WAIT RESELECT REL (x2d0)
INT 0x0000ff18, WHEN NOT Msg_In
MOVE FROM ds_Msg, WHEN Msg_In
INT 0x0000ff19, WHEN Data_In
INT 0x0000ff20, IF Data_Out
INT 0x0000ff21, IF Msg_In
INT 0x0000ff22, IF Status
INT 0x0000ff23, IF Msg_Out
INT 0x0000ff24
x2d0:
INT 0x0000ff25
; **
; ** DMA chaining
; **
chain_in:
MOVE DSA0 + 8 TO SFBR
JUMP REL(chain_in1), IF NOT 00, AND MASK 0x07
MOVE DSA1 + 1 TO DSA1
chain_in1:
MOVE SFBR TO DSA0
MOVE FROM ds_Data, WHEN Data_In
JUMP REL(chain_in), WHEN Data_In
INT 0x0000ff27 ; ** DMA chain transfer complete
chain_out:
MOVE DSA0 + 8 TO SFBR
JUMP REL(chain_out1), IF NOT 00, AND MASK 0x07
MOVE DSA1 + 1 TO DSA1
chain_out1:
MOVE SFBR TO DSA0
MOVE FROM ds_Data, WHEN Data_Out
JUMP REL(chain_out), WHEN Data_Out
INT 0x0000ff27 ; ** DMA chain transfer complete

1
sys/arch/amiga/dev/a2091dma.c
View File

@ -299,6 +299,7 @@ dmago(unit, addr, count, flags)
dmatimo[unit] = 1;
#endif
DCIS(); /* push data cache */
dc->sc_hwaddr->CNTR = dc->sc_cmd;
scsi_int_mode[unit] = 1;
dc->sc_hwaddr->ACR = (u_int) dc->sc_cur->dc_addr;

1
sys/arch/amiga/dev/a3000dma.c
View File

@ -299,6 +299,7 @@ dmago(unit, addr, count, flags)
dmatimo[unit] = 1;
#endif
DCIS(); /* push data cache */
dc->sc_hwaddr->CNTR = dc->sc_cmd;
scsi_int_mode[unit] = 1;
dc->sc_hwaddr->ACR = (u_int) dc->sc_cur->dc_addr;

16
sys/arch/amiga/dev/device.h
View File

@ -125,6 +125,13 @@ struct amiga_hw {
#define PROD_GVP_SERIES_II 11
#define PROD_GVP_IV24 32
/* Progressive Peripherals Inc. */
#define MANUF_PPI 2026
#define PROD_PPI_ZEUS 150
/* CSA */
#define MANUF_CSA 1058
#define PROD_CSA_MAGNUM 17
/* bus types */
#define B_MASK 0xE000
@ -152,6 +159,15 @@ struct amiga_hw {
#define HW_ISSCSI(hw) (((hw)->hw_type & C_MASK) == C_SCSI)
#define HW_ISDEV(hw,d) (((hw)->hw_type & D_MASK) == (d))
/* doesn't belong here... */
/*
* Pseudo-device attach information (function + number of pseudo-devs).
*/
struct pdevinit {
void (*pdev_attach) __P((int));
int pdev_count;
};
#ifdef KERNEL
extern struct amiga_hw sc_table[];
extern struct amiga_ctlr amiga_cinit[];

172
sys/arch/amiga/dev/event.c Normal file
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@ -0,0 +1,172 @@
/*
* Copyright (c) 1992, 1993
* The Regents of the University of California. All rights reserved.
*
* This software was developed by the Computer Systems Engineering group
* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
* contributed to Berkeley.
*
* All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Lawrence Berkeley Laboratory.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)event.c 8.1 (Berkeley) 6/11/93
*
* from: Header: event.c,v 1.5 92/11/26 01:10:44 torek Exp (LBL)
* $Id: event.c,v 1.1 1994/01/26 21:05:41 mw Exp $
*/
/*
* Internal `Firm_event' interface for the keyboard and mouse drivers.
*/
#include "param.h"
#include "fcntl.h"
#include "malloc.h"
#include "proc.h"
#include "systm.h"
#include "vnode.h"
#include "vuid_event.h"
#include "event_var.h"
/*
* Initialize a firm_event queue.
*/
void
ev_init(ev)
register struct evvar *ev;
{
ev->ev_get = ev->ev_put = 0;
ev->ev_q = malloc((u_long)EV_QSIZE * sizeof(struct firm_event),
M_DEVBUF, M_WAITOK);
bzero((caddr_t)ev->ev_q, EV_QSIZE * sizeof(struct firm_event));
}
/*
* Tear down a firm_event queue.
*/
void
ev_fini(ev)
register struct evvar *ev;
{
free(ev->ev_q, M_DEVBUF);
}
/*
* User-level interface: read, select.
* (User cannot write an event queue.)
*/
int
ev_read(ev, uio, flags)
register struct evvar *ev;
struct uio *uio;
int flags;
{
int s, n, cnt, error;
/*
* Make sure we can return at least 1.
*/
if (uio->uio_resid < sizeof(struct firm_event))
return (EMSGSIZE); /* ??? */
s = splev();
while (ev->ev_get == ev->ev_put) {
if (flags & IO_NDELAY) {
splx(s);
return (EWOULDBLOCK);
}
ev->ev_wanted = 1;
error = tsleep((caddr_t)ev, PEVENT | PCATCH, "firm_event", 0);
if (error) {
splx(s);
return (error);
}
}
/*
* Move firm_events from tail end of queue (there is at least one
* there).
*/
if (ev->ev_put < ev->ev_get)
cnt = EV_QSIZE - ev->ev_get; /* events in [get..QSIZE) */
else
cnt = ev->ev_put - ev->ev_get; /* events in [get..put) */
splx(s);
n = howmany(uio->uio_resid, sizeof(struct firm_event));
if (cnt > n)
cnt = n;
error = uiomove((caddr_t)&ev->ev_q[ev->ev_get],
cnt * sizeof(struct firm_event), uio);
n -= cnt;
/*
* If we do not wrap to 0, used up all our space, or had an error,
* stop. Otherwise move from front of queue to put index, if there
* is anything there to move.
*/
if ((ev->ev_get = (ev->ev_get + cnt) % EV_QSIZE) != 0 ||
n == 0 || error || (cnt = ev->ev_put) == 0)
return (error);
if (cnt > n)
cnt = n;
error = uiomove((caddr_t)&ev->ev_q[0],
cnt * sizeof(struct firm_event), uio);
ev->ev_get = cnt;
return (error);
}
int
ev_select(ev, rw, p)
register struct evvar *ev;
int rw;
struct proc *p;
{
int s = splev();
switch (rw) {
case FREAD:
/* succeed if there is something to read */
if (ev->ev_get != ev->ev_put) {
splx(s);
return (1);
}
selrecord(p, &ev->ev_sel);
break;
case FWRITE:
return (1); /* always fails => never blocks */
}
splx(s);
return (0);
}

88
sys/arch/amiga/dev/event_var.h Normal file
View File

@ -0,0 +1,88 @@
/*
* Copyright (c) 1992, 1993
* The Regents of the University of California. All rights reserved.
*
* This software was developed by the Computer Systems Engineering group
* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
* contributed to Berkeley.
*
* All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Lawrence Berkeley Laboratory.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)event_var.h 8.1 (Berkeley) 6/11/93
*
* from: Header: event_var.h,v 1.5 92/11/26 01:11:51 torek Exp (LBL)
* $Id: event_var.h,v 1.1 1994/01/26 21:05:42 mw Exp $
*/
/*
* Internal `Firm_event' interface for the keyboard and mouse drivers.
* The drivers are expected not to place events in the queue above spltty(),
* i.e., are expected to run off serial ports.
*/
/* EV_QSIZE should be a power of two so that `%' is fast */
#define EV_QSIZE 256 /* may need tuning; this uses 2k */
struct evvar {
u_int ev_get; /* get (read) index (modified synchronously) */
volatile u_int ev_put; /* put (write) index (modified by interrupt) */
struct selinfo ev_sel; /* process selecting */
struct proc *ev_io; /* process that opened queue (can get SIGIO) */
char ev_wanted; /* wake up on input ready */
char ev_async; /* send SIGIO on input ready */
struct firm_event *ev_q;/* circular buffer (queue) of events */
};
#define splev() spltty()
#define EV_WAKEUP(ev) { \
selwakeup(&(ev)->ev_sel); \
if ((ev)->ev_wanted) { \
(ev)->ev_wanted = 0; \
wakeup((caddr_t)(ev)); \
} \
if ((ev)->ev_async) \
psignal((ev)->ev_io, SIGIO); \
}
void ev_init __P((struct evvar *));
void ev_fini __P((struct evvar *));
int ev_read __P((struct evvar *, struct uio *, int));
int ev_select __P((struct evvar *, int, struct proc *));
/*
* PEVENT is set just above PSOCK, which is just above TTIPRI, on the
* theory that mouse and keyboard `user' input should be quick.
*/
#define PEVENT 23

85
sys/arch/amiga/dev/grf.c
View File

@ -66,7 +66,7 @@
#include "vm/vm_page.h"
#include "vm/vm_pager.h"
#include "specdev.h"
#include "miscfs/specfs/specdev.h"
#include "vnode.h"
#include "mman.h"
@ -241,6 +241,11 @@ grfioctl(dev, cmd, data, flag, p)
error = 0;
switch (cmd) {
case OGRFIOCGINFO:
/* argl.. no bank-member.. */
bcopy((caddr_t)&gp->g_display, data, sizeof(struct grfinfo)-4);
break;
case GRFIOCGINFO:
bcopy((caddr_t)&gp->g_display, data, sizeof(struct grfinfo));
break;
@ -280,7 +285,22 @@ grfioctl(dev, cmd, data, flag, p)
case GRFGETNUMVM:
return grfdev[gp->g_type].gd_mode (gp, GM_GRFGETNUMVM, data);
/* these are all hardware dependant, and have to be resolved
in the respective driver. */
case GRFIOCPUTCMAP:
case GRFIOCGETCMAP:
case GRFIOCSSPRITEPOS:
case GRFIOCGSPRITEPOS:
case GRFIOCSSPRITEINF:
case GRFIOCGSPRITEINF:
case GRFIOCGSPRITEMAX:
return grfdev[gp->g_type].gd_mode (gp, GM_GRFIOCTL, cmd, data);
default:
/* check to see whether it's a command recognized by the
view code if the unit is 0 XXX */
if (GRFUNIT(dev) == 0)
return viewioctl (dev, cmd, data, flag, p);
error = EINVAL;
break;
@ -420,6 +440,10 @@ grfaddr(gp, off)
/* frame buffer */
if (off >= gi->gd_regsize && off < gi->gd_regsize+gi->gd_fbsize) {
off -= gi->gd_regsize;
#ifdef BANKEDDEVPAGER
if (gi->gd_bank_size)
off %= gi->gd_bank_size;
#endif
return(((u_int)gi->gd_fbaddr + off) >> PGSHIFT);
}
/* bogus */
@ -445,8 +469,18 @@ grfmmap(dev, addrp, p)
flags = MAP_FILE|MAP_SHARED;
if (*addrp)
flags |= MAP_FIXED;
else
*addrp = (caddr_t)0x1000000; /* XXX */
else {
/*
* XXX if no hint provided for a non-fixed mapping place it after
* the end of the largest possible heap.
*
* There should really be a pmap call to determine a reasonable
* location.
*/
*addrp = round_page(p->p_vmspace->vm_daddr + MAXDSIZ);
}
bzero (&vn, sizeof (vn));
bzero (&si, sizeof (si));
vn.v_type = VCHR; /* XXX */
vn.v_specinfo = &si; /* XXX */
vn.v_rdev = dev; /* XXX */
@ -476,5 +510,50 @@ grfunmmap(dev, addr, p)
return(rv == KERN_SUCCESS ? 0 : EINVAL);
}
#ifdef BANKEDDEVPAGER
int
grfbanked_get (dev, off, prot)
dev_t dev;
off_t off;
int prot;
{
int unit = GRFUNIT(dev);
struct grf_softc *gp = &grf_softc[unit];
int error, bank;
struct grfinfo *gi = &gp->g_display;
off -= gi->gd_regsize;
if (off < 0 || off >= gi->gd_fbsize)
return -1;
error = grfdev[gp->g_type].gd_mode (gp, GM_GRFGETBANK, &bank, off, prot);
return error ? -1 : bank;
}
int
grfbanked_cur (dev)
dev_t dev;
{
int unit = GRFUNIT(dev);
struct grf_softc *gp = &grf_softc[unit];
int error, bank;
error = grfdev[gp->g_type].gd_mode (gp, GM_GRFGETCURBANK, &bank);
return error ? -1 : bank;
}
int
grfbanked_set (dev, bank)
dev_t dev;
int bank;
{
int unit = GRFUNIT(dev);
struct grf_softc *gp = &grf_softc[unit];
return grfdev[gp->g_type].gd_mode (gp, GM_GRFSETBANK, bank) ? -1 : 0;
}
#endif /* BANKEDDEVPAGER */
#endif /* NGRF > 0 */

786
sys/arch/amiga/dev/grf_cc.c
View File

@ -3,566 +3,24 @@
/* Graphics routines for the AMIGA native custom chip set. */
#include "sys/param.h"
/* NOTE: this is now only a more or less rough interface to Chris Hopps'
view driver. Due to some design problems with RTG view can't
currently replace grf, but that's an option for the future. */
#include "param.h"
#include "vm/vm_param.h"
#include "sys/errno.h"
#include "ioctl.h"
#include "grfioctl.h"
#include "grfvar.h"
#include "grf_ccreg.h"
#include "../include/cpu.h"
#include "../amiga/custom.h"
#include "../amiga/cia.h"
extern caddr_t CHIPMEMADDR;
extern caddr_t chipmem_steal ();
struct ccfb ccfb = {
DEF_DISP_WIDTH,
DEF_DISP_HEIGHT,
DEF_DISP_X, DEF_DISP_Y,
DEF_DISP_Z,
0,
DEF_FB_WIDTH,
DEF_FB_HEIGHT,
0,
DEF_FB_X, DEF_FB_Y, DEF_FB_Z,
#if 0
DEF_DIWSTRT, DEF_DIWSTOP, DEF_DDFSTRT, DEF_DDFSTOP,
#endif
DEF_COL0, DEF_COL1, DEF_COL2, DEF_COL3, 0,0,0,0,0,0,0,0,0,0,0,0,
DEF_COL10, DEF_COL11, DEF_COL12, DEF_COL13, 0,0,0,0,0,0,0,0,0,0,0,0,
0, /* chip ram for beep sample */
DEF_PERIOD, DEF_VOLUME, /* beep sample period and volume */
0,DEF_ABEEP, /* beep timer, timer init value */
0,DEF_DBEEP, /* beep timer, timer init value */
0,0, /* cop1, cop2 */
0, /* pointer */
0,0, /* mouseH, mouseV */
0,0, /* lastMouseH, lastMouseV */
0,0, /* mouseX, mouseY */
0,0,0, /* mouseb1, mouseb2, mouseb3 */
0,0, /* joy1, joy2 */
DEF_SCREEN,DEF_MOUSE, /* screen/mouse blank timer init */
0,0, /* screenblank, mouseblank */
0,0, /* enableFlag, pad */
};
/*
* custom copper list structure. It replaces the macro method of
* building copper lists for a good reason. You want to change
* diwstrt in an ioctl() handler? well, with this struct, it is
* trivial :-)
*
* YOU DON'T WANT! ioctl's to the console should NOT use any
* implementation dependant data format to set values, they
* should pass hi-level information that is processed by
* the different console drivers. This driver would recalculate
* diwstrt (for example) from given disp_* values.
*/
typedef struct {
u_short planes[6][4]; /* move + hi word, move + lo word */
u_short bplcon0[2]; /* move + viewmode */
u_short bplcon1[2]; /* move + BPLCON1 */
u_short bpl1mod[2]; /* move + BPL1MOD */
u_short bpl2mod[2]; /* move + BPL2MOD */
u_short diwstrt[2]; /* move + DIWSTRT */
u_short diwstop[2]; /* move + DIWSTOP */
u_short ddfstrt[2]; /* move + DDFSTRT */
u_short ddfstop[2]; /* move + DDFSTOP */
u_short sprites[4*8]; /* 8 sprites (0 = mouseptr, 7 unused) */
u_short colors[32*2]; /* move + color, 32 color regs */
u_short copother[4]; /* move + COP1LC (to point to other copper list) */
u_short finish[6]; /* COPEND instruction, -or-
move + (COP2LC, COP2LC + 2, COPJMP2) */
} COPPERLIST;
/*
* custom struct to describe the mousepointer sprite in chipram.
* the header is tweaked by the vbl handler to move the mouse sprite
* around. the image[] array can be modified by the ioctl() handler
* to change the image for the sprite!
*
* Again, we should probably have a much higher resolution, generic
* sprite, and scale that down if necessary in the invidial drivers.
*/
typedef struct {
u_char header[4];
u_short image[16*2];
u_short footer[2];
} SPRITEPTR;
/*
* initializer values for the pointer struct in chip ram. It is a stupid
* crosshair sprite, in just one color. Do NOT change the first 4 bytes!
*/
static SPRITEPTR pointerInit = {
0x50,0x50,0x60,0x00, /* header */
0x0000,0x0000, /* image */
0x0080,0x0000,
0x0080,0x0000,
0x0080,0x0000,
0x0080,0x0000,
0x0080,0x0000,
0x0080,0x0000,
0x0080,0x0000,
0x7f7f,0x0000,
0x0080,0x0000,
0x0080,0x0000,
0x0080,0x0000,
0x0080,0x0000,
0x0080,0x0000,
0x0080,0x0000,
0x0080,0x0000,
0x0000,0x0000, /* footer */
};
/*
* void initbeep(struct ccfb *fb);
*
* synopsis:
* allocates 20 bytes for a sine wave sample (in chip ram) and
* initializes it. The audio hardware is turned on to play
* the sine wave sample in an infinite loop! The volume is just
* set to zero so you don't hear it... The sample is played in
* channels 0 and 1 so it goes out left+right audio jacks in the
* back of the machine. The DMA is not enabled here... it is
* enabled in cc_init() below... To make an audible beep, all
* that is needed is to turn on the volume, and then have the
* vbl handler turn off the volume after the desired beep duration
* has elapsed.
*
* The custom chip console should really be broken down into a
* physical and logical layer. The physical layer should have things
* like the bitplanes, copper list, mousepointer chipram, and the
* audible beep. The logical layers should have their own private
* mousepointer image, color palette, and beep parameters. The logical
* layer can keep an image of chipram for its own context - layers of
* sorts, in amigaos parlance.
*/
static inline void
initbeep (fb)
struct ccfb *fb;
{
static char sample[20] = {
0,39,75,103,121,127,121,103,75,39,0,
-39,-75,-103,-121,-127,-121,-103,-75,-39
};
short i;
char *ptr = chipmem_steal(20);
if (!ptr) panic("Can't chipmem_steal 20 bytes!\n");
fb->beepSample = ptr;
for (i=0; i<20; i++) *ptr++ = sample[i];
fb->beepTimer = fb->beepTime;
custom.aud[0].lc = custom.aud[1].lc =
(void *)((caddr_t)fb->beepSample - CHIPMEMADDR);
custom.aud[0].len = custom.aud[1].len = 10;
custom.aud[0].per = custom.aud[1].per = fb->beepPeriod;
custom.aud[0].vol = custom.aud[1].vol = 0;
fb->beepTimer = fb->dbeepTimer = 0;
/* make SURE to disallow any audio interrupts - we don't need them */
custom.intena = INTF_AUD0 | INTF_AUD1 | INTF_AUD2 | INTF_AUD3;
}
/*
* void initpointer (struct ccfb *fb);
*
* synopsis:
* this routine initializes the mouse pointer part of the ccfb.
* currently, it only needs to copy the initializer data to the
* allocated chip ram.
*/
static inline void
initpointer (fb)
struct ccfb *fb;
{
SPRITEPTR *pointer = (SPRITEPTR *)fb->pointer;
/* initialize pointer structure */
*pointer = pointerInit;
}
/*
* void initcop (COPPERLIST *cop, COPPERLIST *othercop, int shf,
* struct ccfb *fb);
*
* synopsis:
* this function initializes one copperlist, treated as short-
* frame list if SHF is TRUE.
* it is assumed that initpointer has been called by the time
* initcop() is called.
*
* This is REALLY basic stuff... even teenaged eurodemo coders
* understand it :-) Normally, I'd have done this in assembly
* as a bunch of dc.w statements... it is just translated into
* struct form here...
*
* (yep, since this *is no* eurodemo here :-)) Hey, and we
* even have symbolic names for registers too :-))
*/
static void inline
initcop (cop, othercop, shf, fb)
COPPERLIST *cop, *othercop;
int shf;
struct ccfb *fb;
{
SPRITEPTR *pointer = (SPRITEPTR *)fb->pointer;
unsigned long screen;
unsigned long rowbytes = fb->fb_width >> 3; /* width of display, in bytes */
u_short *plptr;
u_short c, i, strt, stop;
/* get PA of display area */
screen = (unsigned long) fb->fb - (unsigned long) CHIPMEMADDR;
fb->fb_planesize = fb->fb_height * rowbytes;
/* account for possible interlaced half-frame */
if (shf)
screen += rowbytes;
/* account for oversized framebuffers */
screen += (fb->fb_x >> 3) + (fb->fb_y * rowbytes);
#define MOVE COP_MOVE
/* initialize bitplane pointers for all planes */
for (plptr = &cop->planes[0][0], i = 0; i < fb->fb_z; i++)
{
MOVE (plptr, bplpth(i), HIADDR (screen));
plptr += 2;
MOVE (plptr, bplptl(i), LOADDR (screen));
plptr += 2;
screen += fb->fb_planesize;
}
/* set the other bitplane pointers to 0, I hate this fixed size array.. */
while (i < 6)
{
MOVE (plptr, bplpth(i), 0);
plptr += 2;
MOVE (plptr, bplptl(i), 0);
plptr += 2;
i++;
}
c = 0x8000 /* HIRES */
| ((fb->fb_z & 7) << 12) /* bitplane use */
| 0x0200 /* composite COLOR enable (whatever this is..) */
| 0x0004; /* LACE */
MOVE (cop->bplcon0, bplcon0, c);
MOVE (cop->bplcon1, bplcon1, 0); /* nothing */
/* modulo is one line for interlaced displays, plus difference between
virtual and effective framebuffer size */
MOVE (cop->bpl1mod, bpl1mod, (fb->fb_width + (fb->fb_width - fb->disp_width)) >> 3);
MOVE (cop->bpl2mod, bpl2mod, (fb->fb_width + (fb->fb_width - fb->disp_width)) >> 3);
/* these use pre-ECS register interpretation. Might want to go ECS ? */
strt = (((fb->disp_y >> 1) & 0xff)<<8) | ((fb->disp_x >> 1) & 0xff);
MOVE (cop->diwstrt, diwstrt, strt);
stop = (((((fb->disp_y + fb->disp_height + 1-shf)>>1) & 0xff)<<8)
| (((fb->disp_x + fb->disp_width)>>1) & 0xff));
MOVE (cop->diwstop, diwstop, stop);
/* NOTE: default values for strt: 0x2c81, stop: 0xf4c1 */
/* these are from from HW-manual.. */
strt = ((strt & 0xff) - 9) >> 1;
MOVE (cop->ddfstrt, ddfstrt, strt);
stop = strt + (((fb->disp_width >> 4) - 2) << 2);
MOVE (cop->ddfstop, ddfstop, stop);
/* sprites */
{
/* some cleverness... footer[0] is a ZERO longword in chip */
u_short *spr = &cop->sprites[0];
u_short addr = CUSTOM_OFS(sprpt[0]);
u_short i;
for (i=0; i<8; i++) { /* for all sprites (8 of em) do */
*spr++ = addr; *spr++ = HIADDR(&pointer->footer[0]);
addr += 2;
*spr++ = addr; *spr++ = LOADDR(&pointer->footer[0]);
addr += 2;
}
}
cop->sprites[0*4+1] = HIADDR((caddr_t)pointer-CHIPMEMADDR);
cop->sprites[0*4+3] = LOADDR((caddr_t)pointer-CHIPMEMADDR);
/* colors */
for (i = 0; i < 32; i++)
MOVE (cop->colors+i*2, color[i], fb->col[i]);
/* setup interlaced display by constantly toggling between two copperlists */
MOVE (cop->copother, cop1lch, HIADDR ((unsigned long) othercop - (unsigned long) CHIPMEMADDR));
MOVE (cop->copother+2, cop1lcl, LOADDR ((unsigned long) othercop - (unsigned long) CHIPMEMADDR));
/* terminate copper list */
COP_END (cop->finish);
}
/*
* Install a sprite.
* The sprites to be loaded on the alternate frames
* can be specified separately,
* so interlaced sprites are possible.
*/
cc_install_sprite(gp, num, spr1, spr2)
struct grf_softc *gp;
int num;
u_short *spr1, *spr2;
{
struct ccfb *fb = &ccfb;
COPPERLIST *cop;
cop = (COPPERLIST*)fb->cop1;
cop->sprites[num*4+1] = HIADDR((caddr_t)spr1-CHIPMEMADDR);
cop->sprites[num*4+3] = LOADDR((caddr_t)spr1-CHIPMEMADDR);
cop = (COPPERLIST*)fb->cop2;
cop->sprites[num*4+1] = HIADDR((caddr_t)spr2-CHIPMEMADDR);
cop->sprites[num*4+3] = LOADDR((caddr_t)spr2-CHIPMEMADDR);
}
/*
* Uninstall a sprite.
*/
cc_uninstall_sprite(gp, num)
struct grf_softc *gp;
int num;
{
struct ccfb *fb = &ccfb;
SPRITEPTR *pointer = (SPRITEPTR*)fb->pointer;
COPPERLIST *cop;
/* some cleverness... footer[0] is a ZERO longword in chip */
cop = (COPPERLIST*)fb->cop1;
cop->sprites[num*4+1] = HIADDR(&pointer->footer[0]);
cop->sprites[num*4+3] = LOADDR(&pointer->footer[0]);
cop = (COPPERLIST*)fb->cop2;
cop->sprites[num*4+1] = HIADDR(&pointer->footer[0]);
cop->sprites[num*4+3] = LOADDR(&pointer->footer[0]);
}
/*
* Install a copper list extension.
*/
cc_install_cop_ext(gp, cl1, cl2)
struct grf_softc *gp;
u_short *cl1, *cl2;
{
struct ccfb *fb = &ccfb;
COPPERLIST *cop;
cop = (COPPERLIST*)fb->cop1;
COP_MOVE (cop->finish+0, cop2lch, HIADDR((caddr_t)cl1-CHIPMEMADDR));
COP_MOVE (cop->finish+2, cop2lcl, LOADDR((caddr_t)cl1-CHIPMEMADDR));
COP_MOVE (cop->finish+4, copjmp2, 0);
cop = (COPPERLIST*)fb->cop2;
COP_MOVE (cop->finish+0, cop2lch, HIADDR((caddr_t)cl2-CHIPMEMADDR));
COP_MOVE (cop->finish+2, cop2lcl, LOADDR((caddr_t)cl2-CHIPMEMADDR));
COP_MOVE (cop->finish+4, copjmp2, 0);
}
/*
* Uninstall a copper list extension.
*/
cc_uninstall_cop_ext(gp, cl1, cl2)
struct grf_softc *gp;
u_short *cl1, *cl2;
{
register struct ccfb *fb = &ccfb;
COPPERLIST *cop;
cop = (COPPERLIST*)fb->cop1;
COP_END (cop->finish);
cop = (COPPERLIST*)fb->cop2;
COP_END (cop->finish);
}
/*
* Call this function any time a key is hit to ensure screen blanker unblanks
*/
void
cc_unblank ()
{
if (!ccfb.screenBlank) { /* screenblank timer 0 means blank! */
COPPERLIST *c1 = (COPPERLIST *)ccfb.cop1, *c2 = (COPPERLIST *)ccfb.cop2;
/* turn on sprite and raster DMA */
custom.dmacon = DMAF_SETCLR | DMAF_RASTER | DMAF_SPRITE;
ccfb.mouseBlank = ccfb.mouseTime; /* start mouseblank timer */
/* screen was black, reset background color to the one in ccfb! */
c1->colors[1] = c2->colors[1] = ccfb.col[0];
}
/* restart the screenblank timer */
ccfb.screenBlank = ccfb.screenTime;
}
/*
* void cc_bell(void);
*
* Synopsis:
* trigger audible bell
* Description
* Call this function to start a beep tone. The beep lasts for
* ccfb.beepTime 60ths of a second (can adjust it in the ccfb structure
* in an ioctl(). The sample is playing in left+right aud0+aud1 hardware
* channels all the time, just the volume is off when the beep isn't
* heard. So here we just turn on the volume (ccfb.beepVolume, it can
* also be set by ioctl() call) and set the timer (ccfb.beepTime can
* be set by ioctl() as well). The cc_vbl() routine counts down the
* timer and shuts off the volume when it reaches zero.
*/
void
cc_bell ()
{
custom.aud[0].vol = ccfb.beepVolume;
custom.aud[1].vol = ccfb.beepVolume;
ccfb.beepTimer = ccfb.beepTime;
}
/*
* void cc_vbl(void);
*
* synopsis:
* vertical blank service routine for the console.
* provides the following:
* samples mouse counters and positions mouse sprite
* samples joystick inputs
* counts down mouseblanker timer and blanks mouse if it is time
* counts down screenblanker timer and blanks if it is time
* counts down audio beep timer and shuts of the volume if the beep is done
* unblanks mouse/screen if mouse is moved
* not implemented yet:
* it should adjust color palette in copper list over time to effect
* display beep.
*
* There's black magic going on here with assembly-in-C.. Since this
* is an interrupt handler, and it should be fast, ignore the obscure but
* probably fast processing of the mouse for now...
*/
void
cc_vbl ()
{
u_short w0, w1;
u_char *b0 = (u_char *)&w0, *b1 = (u_char *)&w1;
SPRITEPTR *p = (SPRITEPTR *)ccfb.pointer;
ccfb.lastMouseH = ccfb.mouseH;
ccfb.lastMouseV = ccfb.mouseV;
/* horizontal mouse counter */
w1 = custom.joy0dat;
b0[1] = ccfb.mouseH; /* last counter val */
ccfb.mouseH = b1[1]; /* current is now last */
b1[1] -= b0[1]; /* current - last */
b1[0] = (b1[1] & 0x80) ? 0xff : 0x00; /* ext.w */
ccfb.mouseX += w1;
if (ccfb.mouseX < 0) ccfb.mouseX = 0;
if (ccfb.mouseX > ccfb.fb_width-1) ccfb.mouseX = ccfb.fb_width-1;
/* vertical mouse counter */
w1 = custom.joy0dat;
b1[1] = b1[0];
b0[1] = ccfb.mouseV;
ccfb.mouseV = b1[1];
b1[1] -= b0[1];
b1[0] = (b1[1] & 0x80) ? 0xff : 0x00; /* ext.w */
ccfb.mouseY += w1;
if (ccfb.mouseY < 0) ccfb.mouseY = 0;
if (ccfb.mouseY > ccfb.fb_height-1) ccfb.mouseY = ccfb.fb_height-1;
/* mouse buttons (should renumber them, middle button should be #2!) */
ccfb.mouseb1 = (ciaa.pra & (1<<6)) ? 0 : !0;
ccfb.mouseb2 = (custom.pot1dat & (1<<2)) ? 0 : !0;
ccfb.mouseb3 = (custom.pot1dat & (1<<0)) ? 0 : !0;
/* position pointer sprite */
w0 = ccfb.mouseY >> 1;
b0[1] += 0x24;
p->header[0] = b0[1];
b0[1] += 16;
p->header[2] = b0[1];
w0 = ccfb.mouseX >> 1;
w0 += 120;
if (w0 & 1) p->header[3] |= 1; else p->header[3] &= ~1;
w0 >>= 1;
p->header[1] = b0[1];
/* joystick #1 */
ccfb.joy0 = 0;
w0 = custom.joy1dat;
w1 = w0 >> 1;
w1 ^= w0;
if (w1 & (1<<9)) ccfb.joy0 |= JOYLEFT;
if (w1 & (1<<1)) ccfb.joy0 |= JOYRIGHT;
if (w1 & (1<<8)) ccfb.joy0 |= JOYUP;
if (w1 & (1<<0)) ccfb.joy0 |= JOYDOWN;
if ( (ciaa.pra & (1<<7)) == 0 ) ccfb.joy0 |= JOYBUTTON;
/* joystick #2 (normally mouse port) */
ccfb.joy1 = 0;
w0 = custom.joy0dat;
w1 = w0 >> 1;
w1 ^= w0;
if (w1 & (1<<9)) ccfb.joy1 |= JOYLEFT;
if (w1 & (1<<1)) ccfb.joy1 |= JOYRIGHT;
if (w1 & (1<<8)) ccfb.joy1 |= JOYUP;
if (w1 & (1<<0)) ccfb.joy1 |= JOYDOWN;
if ( (ciaa.pra & (1<<6)) == 0 ) ccfb.joy1 |= JOYBUTTON;
/* only do screenblanker/mouseblanker/display beep if screen is enabled */
if (ccfb.enableFlag) {
/* handle screen blanker */
if (ccfb.screenBlank) {
COPPERLIST *c1 = (COPPERLIST *)ccfb.cop1, *c2 = (COPPERLIST *)ccfb.cop2;
ccfb.screenBlank--;
if (!ccfb.screenBlank) {
custom.dmacon = DMAF_RASTER | DMAF_SPRITE;
c1->colors[1] = c2->colors[1] = 0; /* make screen BLACK */
}
}
/* handle mouse blanker */
if (ccfb.mouseBlank) {
ccfb.mouseBlank--;
if (!ccfb.mouseBlank) custom.dmacon = DMAF_SPRITE;
}
else if (ccfb.lastMouseH != ccfb.mouseH || ccfb.lastMouseV != ccfb.mouseV) {
cc_unblank();
ccfb.mouseBlank = ccfb.mouseTime;
custom.dmacon = DMAF_SETCLR | DMAF_SPRITE;
}
/* handle visual beep (not implemented yet) */
}
/* handle audible beep */
if (ccfb.beepTimer) ccfb.beepTimer--;
if (!ccfb.beepTimer) custom.aud[0].vol = custom.aud[1].vol = 0;
}
/* useful function for debugging.. */
int
amiga_mouse_button (num)
int num;
{
switch (num)
{
case 1:
return ccfb.mouseb1;
case 2:
return ccfb.mouseb2;
case 3:
return ccfb.mouseb3;
default:
return 0;
}
}
#include "../amiga/cc_types.h"
#include "grf/grf_types.h"
#include "grf/grf_bitmap.h"
#include "viewioctl.h"
/* Initialize hardware.
* Must point g_display at a grfinfo structure describing the hardware.
@ -572,143 +30,30 @@ cc_init(gp, ad)
struct grf_softc *gp;
struct amiga_device *ad;
{
register struct ccfb *fb = &ccfb;
bmap_t bm;
struct grfinfo *gi = &gp->g_display;
u_char *fbp, save;
int fboff, fbsize;
int s;
int rc;
long start, off;
struct view_size vs;
/* if already initialized, fail */
if (fb->fb) return 0;
/* disable dma */
custom.dmacon = DMAF_BLTDONE
| DMAF_BLTNZERO | DMAF_BLITHOG | DMAF_BLITTER | DMAF_DISK
| DMAF_AUD3 | DMAF_AUD2 | DMAF_AUD1 | DMAF_AUD0;
fb->mouseBlank = fb->mouseTime;
fb->screenBlank = fb->screenTime;
/* testing for the result is really redundant because chipmem_steal
panics if it runs out of memory.. */
fbsize = (fb->fb_width >> 3) * fb->fb_height * fb->fb_z;
if (! (fb->fb = (u_char *) chipmem_steal (fbsize))
|| !(fb->cop1 = (u_short *) chipmem_steal (sizeof(COPPERLIST)))
|| !(fb->cop2 = (u_short *) chipmem_steal (sizeof(COPPERLIST)))
|| !(fb->pointer = (u_short *)chipmem_steal (sizeof(SPRITEPTR)))
)
/* already initialized fail */
if (gp->g_data == 12345678)
return 0;
/* clear the display. bzero only likes regions up to 64k, so call multiple times */
for (fboff = 0; fboff < fbsize; fboff += 64*1024)
bzero (fb->fb + fboff, fbsize - fboff > 64*1024 ? 64*1024 : fbsize - fboff);
rc = grfcc_probe ();
if (! rc)
return 0;
/* init the audio beep */
initbeep(fb);
/* initialize the sprite pointer */
initpointer(fb);
viewprobe ();
/* initialize the copper lists */
initcop (fb->cop1, fb->cop2, 0, fb);
initcop (fb->cop2, fb->cop1, 1, fb);
/* now it gets REALLY nasty.. view[0] stays open for all time
now.. */
if (viewopen (0, 0))
return 0;
/* start the new display */
/* XXX 0 may need to change when virtual added */
XXX_grf_cc_on (0);
/* ok, this is a bit rough.. */
/* mtk: not any more! :-) */
/* mykes: phew, thanks :-) */
s = splhigh ();
/* install dummy, to get display going (for vposr to count.. ) */
custom.cop1lc = (void *) ((unsigned long)fb->cop1 - (unsigned long) CHIPMEMADDR);
custom.copjmp1 = 0;
/* enable DMA (so the copperlists are executed and eventually
cause a switch to an interlaced display on system not already booting that
way. THANKS HAMISH for finding this bug!!) */
custom.dmacon = DMAF_SETCLR | DMAF_MASTER | DMAF_RASTER |
DMAF_COPPER | DMAF_SPRITE | DMAF_AUD0 | DMAF_AUD1;
/* this is real simple: wait for LOF bit of vposr to go high - then start
the copper list! :-) */
while (custom.vposr & 0x8000);
while (!(custom.vposr & 0x8000));
custom.cop1lc = (void *) ((unsigned long)fb->cop1 - (unsigned long) CHIPMEMADDR);
custom.copjmp1 = 0;
custom.intreq = INTF_VERTB;
splx (s);
#if 0
/* tame the blitter. Copying one word onto itself should put it into
a consistent state. This is black magic... */
custom.bltapt =
custom.bltbpt =
custom.bltcpt =
custom.bltdpt = 0;
custom.bltamod =
custom.bltbmod =
custom.bltcmod =
custom.bltdmod = 0;
custom.bltafwm =
custom.bltalwn = 0xffff;
custom.bltcon0 = 0x09f0;
custom.bltcon1 = 0;
custom.bltsize = 1;
#endif
/* enable VBR interrupts. This is also done in the serial driver, but it
really belongs here.. */
custom.intena = INTF_SETCLR | INTF_VERTB; /* under amigaos, INTF_INTEN is needed */
#if 0
#ifdef DEBUG
/* prove the display is up.. */
for (fboff = 0; fboff < fbsize; fboff++)
{
fb->fb[fboff] = 0xff;
DELAY(10);
}
for (fboff = 0; fboff < fbsize; fboff++)
{
fb->fb[fboff] = 0;
DELAY(10);
}
#endif
#endif
gp->g_data = (caddr_t) fb;
gi->gd_regaddr = 0xdff000;
gi->gd_regsize = sizeof (custom);
gi->gd_fbaddr = fb->fb - (u_char *) CHIPMEMADDR;
#if 0
/* mykes kludges here to make gi look like 1 bitplane */
gi->gd_fbsize = fbsize/2;
#else
/* don't see why we should kludge here.. we have
disp_z to indicate the real depth of the display */
gi->gd_fbsize = fbsize;
#endif
gi->gd_colors = 1 << fb->disp_z;
gi->gd_planes = fb->disp_z;
gi->gd_fbwidth = fb->fb_width;
gi->gd_fbheight = fb->fb_height;
gi->gd_fbx = fb->fb_x;
gi->gd_fby = fb->fb_y;
gi->gd_dwidth = fb->disp_width;
gi->gd_dheight = fb->disp_height;
gi->gd_dx = fb->disp_x;
gi->gd_dy = fb->disp_y;
gp->g_regkva = 0; /* builtin */
gp->g_fbkva = fb->fb;
fb->enableFlag = !0;
return(1);
}
@ -716,16 +61,15 @@ cc_config(gp, di)
register struct grf_softc *gp;
struct grfdyninfo *di;
{
register struct ccfb *fb = &ccfb;
struct grfinfo *gi = &gp->g_display;
u_char *fbp, save;
int fboff, fbsize;
int s;
/* bottom missing... */
}
extern struct grf_softc grf_softc[];
#define GPUNIT(ip) (((u_long)ip-(u_long)grf_softc)/sizeof(struct grf_softc))
/*
* Change the mode of the display.
* Right now all we can do is grfon/grfoff.
@ -739,15 +83,11 @@ cc_mode(gp, cmd, arg)
switch (cmd)
{
case GM_GRFON:
ccfb.enableFlag = !0;
ccfb.screenBlank = ccfb.screenTime;
ccfb.mouseBlank = ccfb.mouseTime;
custom.dmacon = DMAF_SETCLR | DMAF_RASTER | DMAF_COPPER | DMAF_SPRITE;
XXX_grf_cc_on (GPUNIT (gp));
return 0;
case GM_GRFOFF:
ccfb.enableFlag = 0;
custom.dmacon = DMAF_RASTER | DMAF_COPPER | DMAF_SPRITE;
XXX_grf_cc_off (GPUNIT (gp));
return 0;
case GM_GRFCONFIG:
@ -760,5 +100,67 @@ cc_mode(gp, cmd, arg)
return EINVAL;
}
/* nasty nasty hack. right now grf's unit == ite's unit == view's unit. */
/* to make X work (I guess) we need to update the grf structure's HW */
/* address to the current view (as this may change without grf knowing.) */
/* Thanks to M Hitch. for finding this one. */
XXX_grf_cc_on (unit)
int unit;
{
struct grf_softc *gp = &grf_softc[unit];
struct grfinfo *gi = &gp->g_display;
bmap_t bm;
struct view_size vs;
viewioctl (unit, VIEW_GETBITMAP, &bm, 0, -1);
gp->g_data = 12345678; /* not particularly clean.. */
gi->gd_regaddr = 0xdff000; /* no need to look at regs */
gi->gd_regsize = round_page(sizeof (custom)); /* I mean it X people, for CC */
/* use the view device. That way */
/* we can have both X and a console. */
/* and flip between them. People */
/* will be unhappy if this feature */
/* is so easy and yet not availble. */
/* (if you wern't using them then */
/* thanks.) */
/**** I will remove these soon.****/
gi->gd_fbaddr = bm.hardware_address;
gi->gd_fbsize = bm.depth*bm.bytes_per_row*bm.rows;
if (viewioctl (unit, VIEW_GETSIZE, &vs, 0, -1))
{
/* fill in some default values... XXX */
vs.width = 640; vs.height = 400; vs.depth = 2;
}
gi->gd_colors = 1 << vs.depth;
gi->gd_planes = vs.depth;
gi->gd_fbwidth = vs.width;
gi->gd_fbheight = vs.height;
gi->gd_fbx = 0;
gi->gd_fby = 0;
gi->gd_dwidth = vs.width;
gi->gd_dheight = vs.height;
gi->gd_dx = 0;
gi->gd_dy = 0;
gp->g_regkva = 0; /* builtin */
gp->g_fbkva = 0; /* not needed, view internal */
viewioctl (unit, VIEW_DISPLAY, NULL, 0, -1);
}
XXX_grf_cc_off (unit)
int unit;
{
viewioctl (unit, VIEW_REMOVE, NULL, 0, -1);
}
#endif

719
sys/arch/amiga/dev/grf_rt.c
View File

@ -4,12 +4,13 @@
/* Graphics routines for the Retina board,
using the NCR 77C22E+ VGA controller. */
#include "sys/param.h"
#include "sys/errno.h"
#include <sys/param.h>
#include <sys/errno.h>
#include <sys/ioctl.h>
#include "grfioctl.h"
#include "grfvar.h"
#include "grf_rtreg.h"
#include "../include/cpu.h"
#include <machine/cpu.h>
#include "device.h"
extern caddr_t ZORRO2ADDR;
@ -104,6 +105,10 @@ unsigned char NCRStdPalette[16*3] = {
/* Depth, PAL, TX, TY, XY,FontX, FontY, FontData, FLo, Fhi */
4, NCRStdPalette, 80, 64, 5120, 8, 8, kernel_font, 32, 255};
struct MonDef MON_640_480_62_G = { 50000000, 4, 640, 480, 161,171,184,196,195, 481, 484, 492, 502, 502,
8, NCRStdPalette,640,480, 5120, 8, 8, kernel_font, 32, 255};
/* Enter higher values here ^ ^ for panning! */
/* horizontal 38kHz */
struct MonDef MON_768_600_60 = { 75000000, 28, 768, 600, 97, 99,107,120,117, 601, 615, 625, 638, 638,
@ -114,13 +119,12 @@ unsigned char NCRStdPalette[16*3] = {
struct MonDef MON_768_600_80 = { 50000000, 24, 768, 600, 97,104,112,122,119, 601, 606, 616, 628, 628,
4, NCRStdPalette, 96, 75, 7200, 8, 8, kernel_font, 32, 255};
#if 0
struct MonDef MON_1024_768_80 = { 90000000, 24, 1024, 768, 129,130,141,172,169, 769, 770, 783, 804, 804,
4, NCRStdPalette,128, 96, 12288, 8, 8, kernel_font, 32, 255};
#else
struct MonDef MON_1024_768_80 = { 90000000, 0, 1024, 768, 257,258,278,321,320, 769, 770, 783, 804, 804,
4, NCRStdPalette,128, 96, 12288, 8, 8, kernel_font, 32, 255};
#endif
/* FQ FLG MW MH HBS HSS HSE HBE HT VBS VSS VSE VBE VT */
struct MonDef MON_1024_768_80_G = { 90000000, 0, 1024, 768, 257,258,280,344,343, 769, 770, 783, 804, 804,
8, NCRStdPalette, 1024, 768, 12288, 8, 8, kernel_font, 32, 255};
struct MonDef MON_1024_1024_59= { 90000000, 24, 1024,1024, 129,130,141,173,170,1025,1059,1076,1087,1087,
4, NCRStdPalette,128, 128, 16384, 8, 8, kernel_font, 32, 255};
@ -132,6 +136,9 @@ unsigned char NCRStdPalette[16*3] = {
struct MonDef MON_1280_1024_60= {110000000, 24, 1280,1024, 161,162,176,211,208,1025,1026,1043,1073,1073,
4, NCRStdPalette,160, 128, 20480, 8, 8, kernel_font, 32, 255};
struct MonDef MON_1280_1024_60_G= {110000000, 0, 1280,1024, 321,322,349,422,421,1025,1026,1043,1073,1073,
8, NCRStdPalette,1280,1024, 20480, 8, 8, kernel_font, 32, 255};
/* horizontal 75kHz */
struct MonDef MON_1280_1024_69= {120000000, 24, 1280,1024, 161,162,175,200,197,1025,1026,1043,1073,1073,
@ -154,51 +161,28 @@ struct MonDef monitor_defs[] = {
{ 50000000, 24, 768, 600, 97,104,112,122,119, 601, 606, 616, 628, 628,
4, NCRStdPalette, 96, 75, 7200, 8, 8, kernel_font, 32, 255},
{ 90000000, 24, 1024, 768, 129,130,141,172,169, 769, 770, 783, 804, 804,
4, NCRStdPalette,128, 96, 12288, 8, 8, kernel_font, 32, 255},
{ 100000000, 24, 1024, 768, 129,130,141,172,169, 769, 770, 783, 804, 804,
4, NCRStdPalette,128, 96, 12288, 8, 8, kernel_font, 32, 255},
/* GFX modes */
{ 110000000, 24, 1024, 768, 129,130,141,172,169, 769, 770, 783, 804, 804,
4, NCRStdPalette,128, 96, 12288, 8, 8, kernel_font, 32, 255},
/* horizontal 31.5 kHz */
{ 120000000, 24, 1024, 768, 129,130,141,172,169, 769, 770, 783, 804, 804,
4, NCRStdPalette,128, 96, 12288, 8, 8, kernel_font, 32, 255},
{ 50000000, 4, 640, 480, 161,171,184,196,195, 481, 484, 492, 502, 502,
8, NCRStdPalette,640, 480, 5120, 8, 8, kernel_font, 32, 255},
{ 13000000, 24, 1024, 768, 129,130,141,172,169, 769, 770, 783, 804, 804,
4, NCRStdPalette,128, 96, 12288, 8, 8, kernel_font, 32, 255},
/* horizontal 64kHz */
{ 72000000, 24, 1024, 768, 129,130,141,172,169, 769, 770, 783, 804, 804,
4, NCRStdPalette,128, 96, 12288, 8, 8, kernel_font, 32, 255},
{ 75000000, 24, 1024, 768, 129,130,141,172,169, 769, 770, 783, 804, 804,
4, NCRStdPalette,128, 96, 12288, 8, 8, kernel_font, 32, 255},
{ 90000000, 24, 1024, 768, 129,130,139,161,160, 769, 770, 783, 804, 804,
4, NCRStdPalette,128, 96, 12288, 8, 8, kernel_font, 32, 255},
{ 90000000, 24, 1024,1024, 129,130,141,173,170,1025,1059,1076,1087,1087,
4, NCRStdPalette,128, 128, 16384, 8, 8, kernel_font, 32, 255},
{ 90000000, 0, 1024, 768, 257,258,280,344,343, 769, 770, 783, 804, 804,
8, NCRStdPalette, 1024, 768, 12288, 8, 8, kernel_font, 32, 255},
/* WARNING: THE FOLLOWING MONITOR MODES EXCEED THE 90-MHz LIMIT THE PROCESSOR
HAS BEEN SPECIFIED FOR. USE AT YOUR OWN RISK (AND THINK ABOUT
MOUNTING SOME COOLING DEVICE AT THE PROCESSOR AND RAMDAC)! */
{110000000, 24, 1280,1024, 161,162,176,211,208,1025,1026,1043,1073,1073,
4, NCRStdPalette,160, 128, 20480, 8, 8, kernel_font, 32, 255},
/* horizontal 75kHz */
{120000000, 24, 1280,1024, 161,162,175,200,197,1025,1026,1043,1073,1073,
4, NCRStdPalette,160, 128, 20480, 8, 8, kernel_font, 32, 255},
{110000000, 0, 1280,1024, 321,322,349,422,421,1025,1026,1043,1073,1073,
8, NCRStdPalette,1280,1024, 20480, 8, 8, kernel_font, 32, 255},
};
static const char *monitor_descr[] = {
@ -206,15 +190,17 @@ static const char *monitor_descr[] = {
"96x75 (768x600) 38kHz",
"96x75 (768x600) 64kHz",
"128x96 (1024x768) 64kHz",
"128x128 (1024x1024) 64kHz",
"160x128 (1280x1024) 64kHz ***EXCEEDS CHIP LIMIT!!!***",
"160x128 (1280x1024) 75kHz ***EXCEEDS CHIP LIMIT!!!***",
"GFX (640x480) 31.5kHz",
"GFX (1024x768) 64kHz",
"GFX (1280x1024) 64kHz ***EXCEEDS CHIP LIMIT!!!***",
};
int retina_mon_max = sizeof (monitor_defs)/sizeof (monitor_defs[0]);
/* patchable */
int retina_default_mon = 2;
int retina_default_gfx = 5;
#endif
@ -253,47 +239,51 @@ static int rt_load_mon (struct grf_softc *gp, struct MonDef *md)
ba = gp->g_regkva;;
fb = gp->g_fbkva;
FW = 0;
if (md->DEP == 4) {
switch (md->FX) {
case 4:
FW = 0;
break;
case 7:
FW = 1;
break;
case 8:
FW = 2;
break;
case 9:
FW = 3;
break;
case 10:
FW = 4;
break;
case 11:
FW = 5;
break;
case 12:
FW = 6;
break;
case 13:
FW = 7;
break;
case 14:
FW = 8;
break;
case 15:
FW = 9;
break;
case 16:
FW = 11;
break;
default:
return 0;
break;
};
}
switch (md->FX) {
case 4:
FW = 0;
break;
case 7:
FW = 1;
break;
case 8:
FW = 2;
break;
case 9:
FW = 3;
break;
case 10:
FW = 4;
break;
case 11:
FW = 5;
break;
case 12:
FW = 6;
break;
case 13:
FW = 7;
break;
case 14:
FW = 8;
break;
case 15:
FW = 9;
break;
case 16:
FW = 11;
break;
default:
return 0;
break;
};
HDE = (md->MW+md->FX-1)/md->FX;
if (md->DEP == 4) HDE = (md->MW+md->FX-1)/md->FX;
else HDE = (md->MW+3)/4;
VDE = md->MH-1;
/* hmm... */
@ -345,8 +335,8 @@ static int rt_load_mon (struct grf_softc *gp, struct MonDef *md)
/* bank0 */
WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, 0x00);
WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, 0x00);
WSeq (ba, 0x1a , 0x00); /* these are reserved, really set them to 0 ??? */
WSeq (ba, 0x1b , 0x00); /* these are reserved, really set them to 0 ??? */
WSeq (ba, SEQ_ID_DISP_OFF_HI , 0x00);
WSeq (ba, SEQ_ID_DISP_OFF_LO , 0x00);
/* bank0 */
WSeq (ba, SEQ_ID_SEC_HOST_OFF_HI, 0x00);
WSeq (ba, SEQ_ID_SEC_HOST_OFF_LO, 0x00);
@ -356,10 +346,17 @@ static int rt_load_mon (struct grf_softc *gp, struct MonDef *md)
/* set font width + rest of clocks */
WSeq (ba, SEQ_ID_EXT_CLOCK_MODE, 0x30 | (FW & 0x0f) | ((clksel & 4) / 4 * 0x40) );
#endif
/* no ext-chain4 + no host-addr-bit-16 */
WSeq (ba, SEQ_ID_EXT_VIDEO_ADDR, 0x00);
/* no packed/nibble + no 256bit gfx format */
WSeq (ba, SEQ_ID_EXT_PIXEL_CNTL, 0x00);
if (md->DEP == 4) {
/* no ext-chain4 + no host-addr-bit-16 */
WSeq (ba, SEQ_ID_EXT_VIDEO_ADDR, 0x00);
/* no packed/nibble + no 256bit gfx format */
WSeq (ba, SEQ_ID_EXT_PIXEL_CNTL, 0x00);
}
else {
WSeq (ba, SEQ_ID_EXT_VIDEO_ADDR, 0x02);
/* 256bit gfx format */
WSeq (ba, SEQ_ID_EXT_PIXEL_CNTL, 0x01);
}
/* AT-interface */
WSeq (ba, SEQ_ID_BUS_WIDTH_FEEDB, 0x06);
/* see fg/bg color expansion */
@ -396,10 +393,18 @@ static int rt_load_mon (struct grf_softc *gp, struct MonDef *md)
| ((md->VT & 0x100) / 0x100 )));
WCrt (ba, CRT_ID_PRESET_ROW_SCAN, 0x00);
WCrt (ba, CRT_ID_MAX_SCAN_LINE, (( (md->FLG & MDF_DBL)/ MDF_DBL * 0x80)
| 0x40
| ((md->VBS & 0x200)/0x200 * 0x20)
| ((md->FY-1) & 0x1f)));
if (md->DEP == 4) {
WCrt (ba, CRT_ID_MAX_SCAN_LINE, (( (md->FLG & MDF_DBL)/ MDF_DBL * 0x80)
| 0x40
| ((md->VBS & 0x200)/0x200 * 0x20)
| ((md->FY-1) & 0x1f)));
}
else {
WCrt (ba, CRT_ID_MAX_SCAN_LINE, (( (md->FLG & MDF_DBL)/ MDF_DBL * 0x80)
| 0x40
| ((md->VBS & 0x200)/0x200 * 0x20)
| (0 & 0x1f)));
}
WCrt (ba, CRT_ID_CURSOR_START, (md->FY & 0x1f) - 2);
WCrt (ba, CRT_ID_CURSOR_END, (md->FY & 0x1f) - 1);
@ -413,7 +418,11 @@ static int rt_load_mon (struct grf_softc *gp, struct MonDef *md)
WCrt (ba, CRT_ID_START_VER_RETR, md->VSS & 0xff);
WCrt (ba, CRT_ID_END_VER_RETR, (md->VSE & 0x0f) | 0x80 | 0x20);
WCrt (ba, CRT_ID_VER_DISP_ENA_END, VDE & 0xff);
WCrt (ba, CRT_ID_OFFSET, (HDE / 2) & 0xff);
if (md->DEP == 4)
WCrt (ba, CRT_ID_OFFSET, (HDE / 2) & 0xff);
else
WCrt (ba, CRT_ID_OFFSET, (md->TX / 8) & 0xff);
WCrt (ba, CRT_ID_UNDERLINE_LOC, (md->FY-1) & 0x1f);
WCrt (ba, CRT_ID_START_VER_BLANK, md->VBS & 0xff);
WCrt (ba, CRT_ID_END_VER_BLANK, md->VBE & 0xff);
@ -429,7 +438,10 @@ static int rt_load_mon (struct grf_softc *gp, struct MonDef *md)
| ((md->HBS & 0x100) / 0x100 * 0x04)
| ((md->HSS & 0x100) / 0x100 * 0x08)));
WCrt (ba, CRT_ID_EXT_START_ADDR, (((HDE / 2) & 0x100)/0x100 * 16));
if (md->DEP == 4)
WCrt (ba, CRT_ID_EXT_START_ADDR, (((HDE / 2) & 0x100)/0x100 * 16));
else
WCrt (ba, CRT_ID_EXT_START_ADDR, (((md->TX / 8) & 0x100)/0x100 * 16));
WCrt (ba, CRT_ID_EXT_HOR_TIMING2, ( ((md->HT & 0x200)/ 0x200 * 0x01)
| (((HDE-1) & 0x200)/ 0x200 * 0x02)
@ -451,8 +463,11 @@ static int rt_load_mon (struct grf_softc *gp, struct MonDef *md)
WGfx (ba, GCT_ID_COLOR_COMPARE, 0x00);
WGfx (ba, GCT_ID_DATA_ROTATE, 0x00);
WGfx (ba, GCT_ID_READ_MAP_SELECT, 0x00);
WGfx (ba, GCT_ID_GRAPHICS_MODE, 0x00);
WGfx (ba, GCT_ID_MISC, 0x04);
WGfx (ba, GCT_ID_GRAPHICS_MODE, 0x00);
if (md->DEP == 4)
WGfx (ba, GCT_ID_MISC, 0x04);
else
WGfx (ba, GCT_ID_MISC, 0x05);
WGfx (ba, GCT_ID_COLOR_XCARE, 0xff);
WGfx (ba, GCT_ID_BITMASK, 0xff);
@ -476,7 +491,10 @@ static int rt_load_mon (struct grf_softc *gp, struct MonDef *md)
WAttr (ba, ACT_ID_PALETTE15, 0x0f);
vgar (ba, GREG_STATUS1_R);
WAttr (ba, ACT_ID_ATTR_MODE_CNTL, 0x08);
if (md->DEP == 4)
WAttr (ba, ACT_ID_ATTR_MODE_CNTL, 0x08);
else
WAttr (ba, ACT_ID_ATTR_MODE_CNTL, 0x09);
WAttr (ba, ACT_ID_OVERSCAN_COLOR, 0x00);
WAttr (ba, ACT_ID_COLOR_PLANE_ENA, 0x0f);
@ -487,11 +505,17 @@ static int rt_load_mon (struct grf_softc *gp, struct MonDef *md)
/* I have *NO* idea what strobing reg-0x20 might do... */
vgaw (ba, ACT_ADDRESS_W, 0x20);
WCrt (ba, CRT_ID_MAX_SCAN_LINE, ( ((md->FLG & MDF_DBL)/ MDF_DBL * 0x80)
if (md->DEP == 4)
WCrt (ba, CRT_ID_MAX_SCAN_LINE, ( ((md->FLG & MDF_DBL)/ MDF_DBL * 0x80)
| 0x40
| ((md->VBS & 0x200)/0x200 * 0x20)
| ((md->FY-1) & 0x1f)));
| ((md->FY-1) & 0x1f)));
else
WCrt (ba, CRT_ID_MAX_SCAN_LINE, ( ((md->FLG & MDF_DBL)/ MDF_DBL * 0x80)
| 0x40
| ((md->VBS & 0x200)/0x200 * 0x20)
| (0 & 0x1f)));
/* not it's time for guessing... */
@ -515,12 +539,24 @@ static int rt_load_mon (struct grf_softc *gp, struct MonDef *md)
} while (x--);
if (md->DEP != 4) {
short x = 256-17;
unsigned char col = 16;
do {
vgaw(ba, VDAC_REG_DATA, col);
vgaw(ba, VDAC_REG_DATA, col);
vgaw(ba, VDAC_REG_DATA, col);
col++;
} while (x--);
}
}
/* now load the font into maps 2 (and 3 for fonts wider than 8 pixels) */
{
if (md->DEP == 4) {
/* first set the whole font memory to a test-pattern, so we
can see if something that shouldn't be drawn IS drawn.. */
@ -595,8 +631,13 @@ static int rt_load_mon (struct grf_softc *gp, struct MonDef *md)
/* select map 0 */
WGfx (ba, GCT_ID_READ_MAP_SELECT, 0);
/* allow writes into maps 0 and 1 */
WSeq (ba, SEQ_ID_MAP_MASK, 3);
if (md->DEP == 4)
/* allow writes into maps 0 and 1 */
WSeq (ba, SEQ_ID_MAP_MASK, 3);
else
/* allow writes into all maps */
WSeq (ba, SEQ_ID_MAP_MASK, 0x0f);
/* select extended chain4 addressing:
!A0/!A1 map 0 character to be displayed
!A1/ A1 map 1 attribute of that character
@ -604,7 +645,7 @@ static int rt_load_mon (struct grf_softc *gp, struct MonDef *md)
A0/ A1 map 3 not used (masked out, ignored) */
WSeq (ba, SEQ_ID_EXT_VIDEO_ADDR, RSeq(ba, SEQ_ID_EXT_VIDEO_ADDR) | 0x02);
{
if (md->DEP == 4) {
/* position in display memory */
unsigned short * c = (unsigned short *) fb;
@ -628,17 +669,23 @@ static int rt_load_mon (struct grf_softc *gp, struct MonDef *md)
c += 2;
} while (x--);
}
}
else if (md->DEP == 8) {
/* could clear the gfx screen here, but that's what the X server does anyway */
;
}
gp->g_data = (caddr_t) md;
gi->gd_regaddr = (long)ba - (long)ZORRO2ADDR + (long)ZORRO2BASE;;
gi->gd_regsize = 64*1024;
gi->gd_fbaddr = (long)fb - (long)ZORRO2ADDR + (long)ZORRO2BASE;
#ifdef BANKEDDEVPAGER
gi->gd_fbsize = 4*1024*1024; /* XXX */
gi->gd_bank_size = 64*1024;
#else
gi->gd_fbsize = 64*1024; /* larger, but that's whats mappable */
#endif
gi->gd_colors = 1 << md->DEP;
gi->gd_planes = md->DEP;
@ -666,7 +713,8 @@ int rt_init (struct grf_softc *gp, struct amiga_device *ad, struct amiga_hw *ahw
gp->g_fbkva = ahw->hw_kva + 64*1024;
/* don't let them patch it out of bounds */
if ((unsigned)retina_default_mon >= retina_mon_max)
if ((unsigned)retina_default_mon >= retina_mon_max
|| monitor_defs[retina_default_mon].DEP == 8)
retina_default_mon = 0;
current_mon = monitor_defs + retina_default_mon;
@ -710,38 +758,48 @@ rt_getvmode (gp, vm)
static int
rt_setvmode (gp, mode)
rt_setvmode (gp, mode, txtonly)
struct grf_softc *gp;
unsigned mode;
int txtonly;
{
struct MonDef *md;
int error;
if (!mode || mode > retina_mon_max)
return EINVAL;
if (txtonly && monitor_defs[mode-1].DEP == 8)
return EINVAL;
current_mon = monitor_defs + (mode - 1);
return rt_load_mon (gp, current_mon) ? 0 : EINVAL;
error = rt_load_mon (gp, current_mon) ? 0 : EINVAL;
return error;
}
/*
* Change the mode of the display.
* Right now all we can do is grfon/grfoff.
* Return a UNIX error number or 0 for success.
*/
rt_mode(gp, cmd, arg)
rt_mode(gp, cmd, arg, a2, a3)
register struct grf_softc *gp;
int cmd;
void *arg;
int a2, a3;
{
/* implement these later... */
switch (cmd)
{
case GM_GRFON:
rt_setvmode (gp, retina_default_gfx + 1, 0);
return 0;
case GM_GRFOFF:
rt_setvmode (gp, retina_default_mon + 1, 0);
return 0;
case GM_GRFCONFIG:
@ -751,12 +809,27 @@ rt_mode(gp, cmd, arg)
return rt_getvmode (gp, (struct grfvideo_mode *) arg);
case GM_GRFSETVMODE:
return rt_setvmode (gp, *(unsigned *) arg);
return rt_setvmode (gp, *(unsigned *) arg, 1);
case GM_GRFGETNUMVM:
*(int *)arg = retina_mon_max;
return 0;
#ifdef BANKEDDEVPAGER
case GM_GRFGETBANK:
*(int *)arg = rt_getbank (gp, a2, a3);
return 0;
case GM_GRFGETCURBANK:
*(int *)arg = rt_getcurbank (gp);
return 0;
case GM_GRFSETBANK:
return rt_setbank (gp, arg);
#endif
case GM_GRFIOCTL:
return rt_ioctl (gp, arg, a2);
default:
break;
}
@ -764,4 +837,418 @@ rt_mode(gp, cmd, arg)
return EINVAL;
}
int
rt_ioctl (gp, cmd, data)
register struct grf_softc *gp;
int cmd;
void *data;
{
switch (cmd)
{
case GRFIOCGSPRITEPOS:
return rt_getspritepos (gp, (struct grf_position *) data);
case GRFIOCSSPRITEPOS:
return rt_setspritepos (gp, (struct grf_position *) data);
case GRFIOCSSPRITEINF:
return rt_setspriteinfo (gp, (struct grf_spriteinfo *) data);
case GRFIOCGSPRITEINF:
return rt_getspriteinfo (gp, (struct grf_spriteinfo *) data);
case GRFIOCGSPRITEMAX:
return rt_getspritemax (gp, (struct grf_position *) data);
case GRFIOCGETCMAP:
return rt_getcmap (gp, (struct grf_colormap *) data);
case GRFIOCPUTCMAP:
return rt_putcmap (gp, (struct grf_colormap *) data);
case GRFIOCBITBLT:
return rt_bitblt (gp, (struct grf_bitblt *) data);
}
return EINVAL;
}
#ifdef BANKEDDEVPAGER
/* Retina banks can overlap. Don't use this information (yet?), and
only switch 64k sized banks. */
int
rt_getbank (gp, offs, prot)
struct grf_softc *gp;
off_t offs;
int prot;
{
/* XXX */
if (offs < 0 || offs >= 4*1024*1024)
return -1;
else
return offs >> 16;
}
int
rt_getcurbank (gp)
struct grf_softc *gp;
{
struct grfinfo *gi = &gp->g_display;
volatile unsigned char *ba;
int bank;
ba = gp->g_regkva;
bank = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO) | (RSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI) << 8);
/* bank register is multiple of 64 byte, make this multiple of 64k */
bank >>= 10;
return bank;
}
int
rt_setbank (gp, bank)
struct grf_softc *gp;
int bank;
{
volatile unsigned char *ba;
ba = gp->g_regkva;
/* bank register is multiple of 64 byte, make this multiple of 64k */
bank <<= 10;
WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, (unsigned char) bank);
bank >>= 8;
WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, (unsigned char) bank);
return 0;
}
#endif
int
rt_getcmap (gfp, cmap)
struct grf_softc *gfp;
struct grf_colormap *cmap;
{
volatile unsigned char *ba;
u_char red[256], green[256], blue[256], *rp, *gp, *bp;
short x;
int error;
if (cmap->count == 0 || cmap->index >= 256)
return 0;
if (cmap->index + cmap->count > 256)
cmap->count = 256 - cmap->index;
ba = gfp->g_regkva;
/* first read colors out of the chip, then copyout to userspace */
vgaw (ba, VDAC_REG_SELECT, cmap->index);
x = cmap->count - 1;
rp = red + cmap->index;
gp = green + cmap->index;
bp = blue + cmap->index;
do
{
*rp++ = vgar (ba, VDAC_REG_DATA);
*gp++ = vgar (ba, VDAC_REG_DATA);
*bp++ = vgar (ba, VDAC_REG_DATA);
}
while (x--);
if (!(error = copyout (red + cmap->index, cmap->red, cmap->count))
&& !(error = copyout (green + cmap->index, cmap->green, cmap->count))
&& !(error = copyout (blue + cmap->index, cmap->blue, cmap->count)))
return 0;
return error;
}
int
rt_putcmap (gfp, cmap)
struct grf_softc *gfp;
struct grf_colormap *cmap;
{
volatile unsigned char *ba;
u_char red[256], green[256], blue[256], *rp, *gp, *bp;
short x;
int error;
if (cmap->count == 0 || cmap->index >= 256)
return 0;
if (cmap->index + cmap->count > 256)
cmap->count = 256 - cmap->index;
/* first copy the colors into kernelspace */
if (!(error = copyin (cmap->red, red + cmap->index, cmap->count))
&& !(error = copyin (cmap->green, green + cmap->index, cmap->count))
&& !(error = copyin (cmap->blue, blue + cmap->index, cmap->count)))
{
ba = gfp->g_regkva;
vgaw (ba, VDAC_REG_SELECT, cmap->index);
x = cmap->count - 1;
rp = red + cmap->index;
gp = green + cmap->index;
bp = blue + cmap->index;
do
{
vgaw (ba, VDAC_REG_DATA, *rp++);
vgaw (ba, VDAC_REG_DATA, *gp++);
vgaw (ba, VDAC_REG_DATA, *bp++);
}
while (x--);
return 0;
}
else
return error;
}
int
rt_getspritepos (gp, pos)
struct grf_softc *gp;
struct grf_position *pos;
{
volatile unsigned char *ba;
ba = gp->g_regkva;
pos->x = vgar (ba, SEQ_ID_CURSOR_X_LOC_LO) | (vgar (ba, SEQ_ID_CURSOR_X_LOC_HI) << 8);
pos->y = vgar (ba, SEQ_ID_CURSOR_Y_LOC_LO) | (vgar (ba, SEQ_ID_CURSOR_Y_LOC_HI) << 8);
return 0;
}
int
rt_setspritepos (gp, pos)
struct grf_softc *gp;
struct grf_position *pos;
{
volatile unsigned char *ba;
ba = gp->g_regkva;
vgaw (ba, SEQ_ID_CURSOR_X_LOC_LO, pos->x & 0xff);
vgaw (ba, SEQ_ID_CURSOR_X_LOC_HI, (pos->x >> 8) & 0x07);
vgaw (ba, SEQ_ID_CURSOR_Y_LOC_LO, pos->y & 0xff);
vgaw (ba, SEQ_ID_CURSOR_Y_LOC_HI, (pos->y >> 8) & 0x07);
return 0;
}
/* assume an at least 2M retina (XXX), sprite is last in memory.
According to the bogus docs, the cursor can be at most 128 lines
in height, and the x-hostspot can be placed at most at pos 31,
this gives width of a long */
#define SPRITE_ADDR (2*1024*1024 - 128*4)
int
rt_getspriteinfo (gp, info)
struct grf_softc *gp;
struct grf_spriteinfo *info;
{
volatile unsigned char *ba, *fb;
ba = gp->g_regkva;
fb = gp->g_fbkva;
if (info->set & GRFSPRSET_ENABLE)
info->enable = vgar (ba, SEQ_ID_CURSOR_CONTROL) & 0x01;
if (info->set & GRFSPRSET_POS)
rt_getspritepos (gp, &info->pos);
if (info->set & GRFSPRSET_HOT)
{
info->hot.x = vgar (ba, SEQ_ID_CURSOR_X_INDEX) & 0x1f;
info->hot.y = vgar (ba, SEQ_ID_CURSOR_Y_INDEX) & 0x7f;
}
if (info->set & GRFSPRSET_CMAP)
{
struct grf_colormap cmap;
int index;
cmap.index = 0;
cmap.count = 256;
rt_getcmap (gp, &cmap);
index = vgar (ba, SEQ_ID_CURSOR_COLOR0);
info->cmap.red[0] = cmap.red[index];
info->cmap.green[0] = cmap.green[index];
info->cmap.blue[0] = cmap.blue[index];
index = vgar (ba, SEQ_ID_CURSOR_COLOR1);
info->cmap.red[1] = cmap.red[index];
info->cmap.green[1] = cmap.green[index];
info->cmap.blue[1] = cmap.blue[index];
}
if (info->set & GRFSPRSET_SHAPE)
{
int saved_bank_lo = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO);
int saved_bank_hi = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI);
int last_bank = SPRITE_ADDR >> 6;
int last_bank_lo = last_bank & 0xff;
int last_bank_hi = last_bank >> 8;
u_char mask;
WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, last_bank_lo);
WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, last_bank_hi);
copyout (fb, info->image, 128*4);
mask = RSeq (ba, SEQ_ID_CURSOR_PIXELMASK);
WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, saved_bank_lo);
WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, saved_bank_hi);
copyout (&mask, info->mask, 1);
info->size.x = 32; /* ??? */
info->size.y = (RSeq (ba, SEQ_ID_CURSOR_CONTROL) & 6) << 4;
}
}
int
rt_setspriteinfo (gp, info)
struct grf_softc *gp;
struct grf_spriteinfo *info;
{
volatile unsigned char *ba, *fb;
u_char control;
ba = gp->g_regkva;
fb = gp->g_fbkva;
control = vgar (ba, SEQ_ID_CURSOR_CONTROL);
if (info->set & GRFSPRSET_ENABLE)
{
if (info->enable)
control |= 1;
else
control &= ~1;
vgaw (ba, SEQ_ID_CURSOR_CONTROL, control);
}
if (info->set & GRFSPRSET_POS)
rt_setspritepos (gp, &info->pos);
if (info->set & GRFSPRSET_HOT)
{
vgaw (ba, SEQ_ID_CURSOR_X_INDEX, info->hot.x & 0x1f);
vgaw (ba, SEQ_ID_CURSOR_Y_INDEX, info->hot.y & 0x7f);
}
if (info->set & GRFSPRSET_CMAP)
{
/* hey cheat a bit here.. XXX */
vgaw (ba, SEQ_ID_CURSOR_COLOR0, 0);
vgaw (ba, SEQ_ID_CURSOR_COLOR1, 1);
}
if (info->set & GRFSPRSET_SHAPE)
{
int saved_bank_lo = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO);
int saved_bank_hi = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI);
int last_bank = SPRITE_ADDR >> 6;
int last_bank_lo = last_bank & 0xff;
int last_bank_hi = last_bank >> 8;
u_char mask;
WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, last_bank_lo);
WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, last_bank_hi);
copyin (info->image, fb, 128*4);
WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, saved_bank_lo);
WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, saved_bank_hi);
copyin (info->mask, &mask, 1);
WSeq (ba, SEQ_ID_CURSOR_PIXELMASK, mask);
/* info->size.x = 32; *//* ??? */
info->size.y = (RSeq (ba, SEQ_ID_CURSOR_CONTROL) & 6) << 4;
control = (control & ~6) | ((info->size.y >> 4) & 6);
vgaw (ba, SEQ_ID_CURSOR_CONTROL, control);
/* sick intel bull-addressing.. */
WSeq (ba, SEQ_ID_CURSOR_STORE_LO, SPRITE_ADDR & 0x0f);
WSeq (ba, SEQ_ID_CURSOR_STORE_HI, 0);
WSeq (ba, SEQ_ID_CURSOR_ST_OFF_LO, (SPRITE_ADDR >> 4) & 0xff);
WSeq (ba, SEQ_ID_CURSOR_ST_OFF_HI, ((SPRITE_ADDR >> 4) >> 8) & 0xff);
}
return 0;
}
int
rt_getspritemax (gp, pos)
struct grf_softc *gp;
struct grf_position *pos;
{
pos->x = 32;
pos->y = 128;
return 0;
}
/*
* !!! THIS AREA UNDER CONSTRUCTION !!!
*/
int
rt_bitblt (gp, bb)
struct grf_softc *gp;
struct grf_bitblt *bb;
{
return EINVAL;
#if 0
volatile unsigned char *ba, *fb;
u_char control;
u_char saved_bank_lo;
u_char saved_bank_hi;
u_char src_bank_lo, src_bank_hi;
u_char dst_bank_lo, dst_bank_hi;
u_long src_offset, dst_offset;
u_short src_bank, dst_bank;
u_char *srcp, *dstp;
short x, y;
u_long tot;
ba = gp->g_regkva;
fb = gp->g_fbkva;
saved_bank_lo = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO);
saved_bank_hi = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI);
/* for now, only GRFBBcopy is supported, and only for depth 8. No
clipping is performed, either... */
if (bb->op != GRFBBcopy && gp->g_display.gd_planes != 8)
return EINVAL;
src_offset = op->src_x + op->src_y * gp->g_display.gd_fbwidth;
dst_offset = op->dst_x + op->dst_y * gp->g_display.gd_fbwidth;
tot = op->w * op->h;
/* set write mode 1, "[...] data in the read latches is written
to memory during CPU memory write cycles. [...]" */
WGfx (ba, GCT_ID_GRAPHICS_MODE, (RGfx(ba, GCT_ID_GRAPHICS_MODE) & 0xfc) | 1);
/* write to primary, read from secondary */
WSeq (ba, SEQ_ID_EXTENDED_MEM_ENA, (RSeq(ba, SEQ_ID_EXTENDED_MEM_ENA) & 0x1f) | 0 );
if (src_offset < dst_offset)
{
/* start at end */
src_offset += tot;
dst_offset += tot;
}
src_bank_lo = (src_offset >> 6) & 0xff;
src_bank_hi = (src_offset >> 14) & 0xff;
dst_bank_lo = (dst_offset >> 6) & 0xff;
dst_bank_hi = (dst_offset >> 14) & 0xff;
while (tot)
{
WSeq (ba, SEQ_ID_SEC_HOST_OFF_LO, src_bank_lo);
WSeq (ba, SEQ_ID_SEC_HOST_OFF_HI, src_bank_hi);
WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, dst_bank_lo);
WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, dst_bank_hi);
if (src_offset < dst_offset)
{
}
else
{
}
}
#endif
}
#endif /* NGRF */

160
sys/arch/amiga/dev/grf_rtreg.h
View File

@ -42,6 +42,10 @@ struct MonDef {
unsigned char FLG;
unsigned short MW; /* screen width in pixels */
/* has to be at least a multiple of 8, */
/* has to be a multiple of 64 in 256-color mode */
/* if you want to use some great tricks */
/* to speed up the vertical scrolling */
unsigned short MH; /* screen height in pixels */
unsigned short HBS;
@ -56,21 +60,38 @@ struct MonDef {
unsigned short VT;
unsigned short DEP; /* Color-depth, 4 for text-mode */
/* values != 4 currently not supported */
/* 8 enables 256-color graphics-mode, */
/* 16 and 24bit gfx not supported yet */
unsigned char * PAL; /* points to n*3 byte RGB-palette data */
/* n=16 for the text-mode */
unsigned char * PAL; /* points to 16*3 byte RGB-palette data */
/* use LoadPalette() to set colors 0..255 */
/* in 256-color-gfx mode */
/* all following entries are text-specific in
any way. Make sure your monitor
/* all following entries are font-specific in
text mode. Make sure your monitor
parameters are calculated for the
appropriate font width and height!
*/
unsigned short TX; /* screen-width in characters */
/* currently, TX has to be a */
/* multiple of 16! */
unsigned short TY; /* screen-height in characters */
unsigned short TX; /* Text-mode (DEP=4): */
/* screen-width in characters */
/* currently, TX has to be a */
/* multiple of 16! */
/* Gfx-mode (DEP > 4) */
/* "logical" screen-width, */
/* use values > MW to allow */
/* hardware-panning */
/* has to be a multiple of 8 */
unsigned short TY; /* Text-mode: */
/* screen-height in characters */
/* Gfx-mode: "logical" screen */
/* height for panning */
/* the following values are currently unused for gfx-mode */
unsigned short XY; /* TX*TY (speeds up some calcs.) */
unsigned short FX; /* font-width (valid values: 4,7-16) */
@ -122,17 +143,23 @@ extern struct MonDef MON_1280_1024_69;
and used by the standard monitor-definitions above */
extern unsigned char NCRStdPalette[];
/* The prototypes for C
/* The prototypes for C
with a little explanation
unsigned char * InitNCR(volatile void * BoardAdress, struct MonDef * md = &MON_640_512_60);
This routine initialises the Retina hardware, opens a
text-mode screen, and sets the cursor to position 0.
text- or gfx-mode screen, depending on the the value of MonDef.DEP,
and sets the cursor to position 0.
It takes as arguments a pointer to the hardware-base
address as it is denoted in the DevConf structure
of the AmigaDOS, and a pointer to a struct MonDef
which describes the screen-mode parameters.
The routine returns 0 if it was unable to open the screen,
or an unsigned char * to the display/attribute memory
when it succeeded. The organisation of the display memory
is a little strange (Intel-typically...) :
is a little strange in text-mode (Intel-typically...) :
Byte 00 01 02 03 04 05 06 etc.
Char0 Attr0 -- -- Char1 Attr1 -- etc.
@ -173,34 +200,74 @@ extern unsigned char NCRStdPalette[];
unsigned char * c = DispMem + x*4 + y*md->TX*4;
*c++ = chr;
*c++ = attr;
*c = attr;
}
In Gfx-mode, the memory organisation is rather simple,
1 byte per pixel in 256-color mode, one pixel after
each other, line by line.
Currently, InitNCR() disables the Retina VBLANK IRQ,
but beware: When running the Retina WB-Emu under
AmigaDOS, the VBLANK IRQ is ENABLED.
void SetCursorPos(unsigned short pos);
This routine sets the hardware-cursor position
to the screen location pos. pos can be calculated
as (x + y * md->TY).
Text-mode only!
void ScreenUp(void);
A somewhat optimized routine that scrolls the whole
screen up one row. A good idea to compile this piece
of code with optimization enabled.
Text-mode only!
void ScreenDown(void);
A somewhat optimized routine that scrolls the whole
screen down one row. A good idea to compile this piece
of code with optimization enabled.
Text-mode only!
unsigned char * SetSegmentPtr(unsigned long adress);
Sets the beginning of the 64k-memory segment to the
adress specified by the unsigned long. If adress MOD 64
is != 0, the return value will point to the segments
start in the Amiga adress space + (adress MOD 64).
Don't use more than (65536-64) bytes in the segment
you set if you aren't sure that (adress MOD 64) == 0.
See retina.doc from MS for further information.
void ClearScreen(unsigned char color);
Fills the whole screen with "color" - 256-color mode only!
void LoadPalette(unsigned char * pal, unsigned char firstcol,
unsigned char colors);
Loads the palette-registers. "pal" points to an array of unsigned char
triplets, for the red, green and blue component. "firstcol" determines the
number of the first palette-register to load (256 available). "colors"
is the number of colors you want to put in the palette registers.
void SetPalette(unsigned char colornum, unsigned char red,
unsigned char green, unsigned char blue);
Allows you to set a single color in the palette, "colornum" is the number
of the palette entry (256 available), "red", "green" and "blue" are the
three components.
void SetPanning(unsigned short xoff, unsigned short yoff);
Moves the logical coordinate (xoff, yoff) to the upper left corner
of your screen. Of course, you shouldn't specify excess values that would
show garbage in the lower right area of your screen... SetPanning()
does NOT check for boundaries.
*/
/* -------------- START OF CODE -------------- */
@ -277,7 +344,10 @@ extern unsigned char NCRStdPalette[];
#define SEQ_ID_CHAR_MAP_SELECT 0x03
#define SEQ_ID_MEMORY_MODE 0x04
#define SEQ_ID_EXTENDED_ENABLE 0x05 /* down from here, all seq registers are NCR extensions */
#define SEQ_ID_UNKNOWN1 0x06 /* it does exist so it's probably usefull */
#define SEQ_ID_UNKNOWN2 0x07 /* it does exist so it's probably usefull */
#define SEQ_ID_CHIP_ID 0x08
#define SEQ_ID_UNKNOWN3 0x09 /* it does exist so it's probably usefull */
#define SEQ_ID_CURSOR_COLOR1 0x0A
#define SEQ_ID_CURSOR_COLOR0 0x0B
#define SEQ_ID_CURSOR_CONTROL 0x0C
@ -287,12 +357,15 @@ extern unsigned char NCRStdPalette[];
#define SEQ_ID_CURSOR_Y_LOC_LO 0x10
#define SEQ_ID_CURSOR_X_INDEX 0x11
#define SEQ_ID_CURSOR_Y_INDEX 0x12
#define SEQ_ID_CURSOR_STORE_HI 0x13 /* printed manual is wrong about these.. */
#define SEQ_ID_CURSOR_STORE_LO 0x14
#define SEQ_ID_CURSOR_STORE_HI 0x15
#define SEQ_ID_CURSOR_STORE_MID 0x16
#define SEQ_ID_CURSOR_ST_OFF_HI 0x15
#define SEQ_ID_CURSOR_ST_OFF_LO 0x16
#define SEQ_ID_CURSOR_PIXELMASK 0x17
#define SEQ_ID_PRIM_HOST_OFF_HI 0x18
#define SEQ_ID_PRIM_HOST_OFF_LO 0x19
#define SEQ_ID_DISP_OFF_HI 0x1A
#define SEQ_ID_DISP_OFF_LO 0x1B
#define SEQ_ID_SEC_HOST_OFF_HI 0x1C
#define SEQ_ID_SEC_HOST_OFF_LO 0x1D
#define SEQ_ID_EXTENDED_MEM_ENA 0x1E
@ -307,6 +380,9 @@ extern unsigned char NCRStdPalette[];
#define SEQ_ID_MISC_FEATURE_SEL 0x27
#define SEQ_ID_COLOR_KEY_CNTL 0x28
#define SEQ_ID_COLOR_KEY_MATCH 0x29
#define SEQ_ID_UNKNOWN4 0x2A
#define SEQ_ID_UNKNOWN5 0x2B
#define SEQ_ID_UNKNOWN6 0x2C
#define SEQ_ID_CRC_CONTROL 0x2D
#define SEQ_ID_CRC_DATA_LOW 0x2E
#define SEQ_ID_CRC_DATA_HIGH 0x2F
@ -340,6 +416,29 @@ extern unsigned char NCRStdPalette[];
#define CRT_ID_END_VER_BLANK 0x16
#define CRT_ID_MODE_CONTROL 0x17
#define CRT_ID_LINE_COMPARE 0x18
#define CRT_ID_UNKNOWN1 0x19 /* are these register really void ? */
#define CRT_ID_UNKNOWN2 0x1A
#define CRT_ID_UNKNOWN3 0x1B
#define CRT_ID_UNKNOWN4 0x1C
#define CRT_ID_UNKNOWN5 0x1D
#define CRT_ID_UNKNOWN6 0x1E
#define CRT_ID_UNKNOWN7 0x1F
#define CRT_ID_UNKNOWN8 0x20
#define CRT_ID_UNKNOWN9 0x21
#define CRT_ID_UNKNOWN10 0x22
#define CRT_ID_UNKNOWN11 0x23
#define CRT_ID_UNKNOWN12 0x24
#define CRT_ID_UNKNOWN13 0x25
#define CRT_ID_UNKNOWN14 0x26
#define CRT_ID_UNKNOWN15 0x27
#define CRT_ID_UNKNOWN16 0x28
#define CRT_ID_UNKNOWN17 0x29
#define CRT_ID_UNKNOWN18 0x2A
#define CRT_ID_UNKNOWN19 0x2B
#define CRT_ID_UNKNOWN20 0x2C
#define CRT_ID_UNKNOWN21 0x2D
#define CRT_ID_UNKNOWN22 0x2E
#define CRT_ID_UNKNOWN23 0x2F
#define CRT_ID_EXT_HOR_TIMING1 0x30 /* down from here, all crt registers are NCR extensions */
#define CRT_ID_EXT_START_ADDR 0x31
#define CRT_ID_EXT_HOR_TIMING2 0x32
@ -352,24 +451,19 @@ extern unsigned char NCRStdPalette[];
#define VDAC_REG_DATA 0x8003 /* dito.. */
#define WGfx(ba, idx, val) \
vgaw(ba, GCT_ADDRESS, idx);\
vgaw(ba, GCT_ADDRESS_W , val)\
do { vgaw(ba, GCT_ADDRESS, idx); vgaw(ba, GCT_ADDRESS_W , val); } while (0)
#define WSeq(ba, idx, val)\
vgaw(ba, SEQ_ADDRESS, idx);\
vgaw(ba, SEQ_ADDRESS_W , val)
#define WSeq(ba, idx, val) \
do { vgaw(ba, SEQ_ADDRESS, idx); vgaw(ba, SEQ_ADDRESS_W , val); } while (0)
#define WCrt(ba, idx, val)\
vgaw(ba, CRT_ADDRESS, idx);\
vgaw(ba, CRT_ADDRESS_W , val)
#define WCrt(ba, idx, val) \
do { vgaw(ba, CRT_ADDRESS, idx); vgaw(ba, CRT_ADDRESS_W , val); } while (0)
#define WAttr(ba, idx, val)\
vgaw(ba, ACT_ADDRESS, idx);\
vgaw(ba, ACT_ADDRESS_W, val)
#define WAttr(ba, idx, val) \
do { vgaw(ba, ACT_ADDRESS, idx); vgaw(ba, ACT_ADDRESS_W, val); } while (0)
#define Map(m)\
WGfx(ba, GCT_ID_READ_MAP_SELECT, m & 3 );\
WSeq(ba, SEQ_ID_MAP_MASK, (1 << (m & 3)))\
#define Map(m) \
do { WGfx(ba, GCT_ID_READ_MAP_SELECT, m & 3 ); WSeq(ba, SEQ_ID_MAP_MASK, (1 << (m & 3))); } while (0)
static inline unsigned char RAttr(volatile void * ba, short idx) {
vgaw (ba, ACT_ADDRESS, idx);

92
sys/arch/amiga/dev/grfioctl.h
View File

@ -71,6 +71,9 @@ struct grfinfo {
#define gd_dheight gd_dyn.gdi_dheight
#define gd_dx gd_dyn.gdi_dx
#define gd_dy gd_dyn.gdi_dy
/* new for banked pager support */
int gd_bank_size; /* size of a bank (or 0) */
};
@ -100,6 +103,7 @@ struct grfvideo_mode {
/*
* BSD ioctls
*/
#define OGRFIOCGINFO 0x40344700 /* to keep compat for a while... */
#define GRFIOCGINFO _IOR('G', 0, struct grfinfo) /* get info on device */
#define GRFIOCON _IO('G', 1) /* turn graphics on */
#define GRFIOCOFF _IO('G', 2) /* turn graphics off */
@ -117,4 +121,92 @@ struct grfvideo_mode {
#define GRFGETNUMVM _IOR('G', 43, int)
/*
* generic framebuffer-related ioctls. These are somewhat
* similar to SunOS fb-ioctls since I liked them reading
* thru the X11-server code.
*/
/*
* colormap related information. Every grf has an associated
* colormap. Depending on the capabilities of the hardware, more
* or less of the information provided may be used.
* Maxium value of "index" can be deduced from grfinfo->gd_colors.
*/
struct grf_colormap {
int index; /* start at red[index],green[index],blue[index] */
int count; /* till < red[index+count],... */
u_char *red;
u_char *green;
u_char *blue;
};
/* write the selected slots into the active colormap */
#define GRFIOCPUTCMAP _IOW('G', 50, struct grf_colormap)
/* retrieve the selected slots from the active colormap */
#define GRFIOCGETCMAP _IOWR('G', 51, struct grf_colormap)
/*
* support a possibly available hardware sprite. calls just fail
* if a given grf doesn't implement hardware sprites.
*/
struct grf_position {
u_short x, y; /* 0,0 is upper left corner */
};
#define GRFIOCSSPRITEPOS _IOW('G', 52, struct grf_position)
#define GRFIOCGSPRITEPOS _IOR('G', 53, struct grf_position)
struct grf_spriteinfo {
u_short set;
#define GRFSPRSET_ENABLE (1<<0)
#define GRFSPRSET_POS (1<<1)
#define GRFSPRSET_HOT (1<<2)
#define GRFSPRSET_CMAP (1<<3)
#define GRFSPRSET_SHAPE (1<<4)
#define GRFSPRSET_ALL 0x1f
u_short enable; /* sprite is displayed if == 1 */
struct grf_position pos; /* sprite location */
struct grf_position hot; /* sprite hot spot */
struct grf_colormap cmap; /* colormap for the sprite. */
struct grf_position size; /* x == width, y == height */
u_char *image, *mask; /* sprite bitmap and mask */
};
#define GRFIOCSSPRITEINF _IOW('G', 54, struct grf_spriteinfo)
#define GRFIOCGSPRITEINF _IOR('G', 55, struct grf_spriteinfo)
/* get maximum sprite size hardware can display */
#define GRFIOCGSPRITEMAX _IOR('G', 56, struct grf_position)
/* support for a BitBlt operation. The op-codes are identical
to X11 GCs */
#define GRFBBOPclear 0x0 /* 0 */
#define GRFBBOPand 0x1 /* src AND dst */
#define GRFBBOPandReverse 0x2 /* src AND NOT dst */
#define GRFBBOPcopy 0x3 /* src */
#define GRFBBOPandInverted 0x4 /* NOT src AND dst */
#define GRFBBOPnoop 0x5 /* dst */
#define GRFBBOPxor 0x6 /* src XOR dst */
#define GRFBBOPor 0x7 /* src OR dst */
#define GRFBBOPnor 0x8 /* NOT src AND NOT dst */
#define GRFBBOPequiv 0x9 /* NOT src XOR dst */
#define GRFBBOPinvert 0xa /* NOT dst */
#define GRFBBOPorReverse 0xb /* src OR NOT dst */
#define GRFBBOPcopyInverted 0xc /* NOT src */
#define GRFBBOPorInverted 0xd /* NOT src OR dst */
#define GRFBBOPnand 0xe /* NOT src OR NOT dst */
#define GRFBBOPset 0xf /* 1 */
struct grf_bitblt {
u_short op; /* see above */
u_short src_x, src_y; /* upper left corner of source-region */
u_short dst_x, dst_y; /* upper left corner of dest-region */
u_short w, h; /* width, height of region */
u_short mask; /* bitmask to apply */
};
#define GRFIOCBITBLT _IOR('G', 57, struct grf_bitblt)

4
sys/arch/amiga/dev/grfvar.h
View File

@ -92,6 +92,10 @@ struct grfdev {
#define GM_GRFGETVMODE 6
#define GM_GRFSETVMODE 7
#define GM_GRFGETNUMVM 8
#define GM_GRFGETBANK 9
#define GM_GRFSETBANK 10
#define GM_GRFGETCURBANK 11
#define GM_GRFIOCTL 12
/* minor device interpretation */
#define GRFOVDEV 0x10 /* overlay planes */

1
sys/arch/amiga/dev/gvp11dma.c
View File

@ -293,6 +293,7 @@ dmago(unit, addr, count, flags)
dmatimo[unit] = 1;
#endif
DCIS(); /* push data cache */
dc->sc_hwaddr->CNTR = dc->sc_cmd;
scsi_int_mode[unit] = 1;
dc->sc_hwaddr->ACR = (u_int) dc->sc_cur->dc_addr;

2
sys/arch/amiga/dev/if_le.c
View File

@ -31,7 +31,7 @@
* SUCH DAMAGE.
*
* from: @(#)if_le.c 7.6 (Berkeley) 5/8/91
* $Id: if_le.c,v 1.2 1993/10/30 23:41:14 mw Exp $
* $Id: if_le.c,v 1.3 1994/01/26 21:05:52 mw Exp $
*/
#include "le.h"

2
sys/arch/amiga/dev/if_lereg.h
View File

@ -31,7 +31,7 @@
* SUCH DAMAGE.
*
* from: @(#)if_lereg.h 7.1 (Berkeley) 5/8/90
* $Id: if_lereg.h,v 1.2 1993/10/30 23:41:15 mw Exp $
* $Id: if_lereg.h,v 1.3 1994/01/26 21:05:53 mw Exp $
*/
#define LEID 21

35
sys/arch/amiga/dev/ite.c
View File

@ -38,7 +38,7 @@
* from: Utah $Hdr: ite.c 1.1 90/07/09$
*
* from: @(#)ite.c 7.6 (Berkeley) 5/16/91
* $Id: ite.c,v 1.4 1993/10/30 23:41:17 mw Exp $
* $Id: ite.c,v 1.5 1994/01/26 21:05:54 mw Exp $
*
* Original author: unknown
* Amiga author:: Markus Wild
@ -97,7 +97,7 @@ extern int itecninit (struct consdev *cp);
extern int itecngetc (dev_t dev);
extern int itecnputc (dev_t dev, int c);
static void repeat_handler (int a0, int a1);
static void inline ite_reset(struct ite_softc *ip);
void ite_reset(struct ite_softc *ip);
static void ite_dnchar (struct ite_softc *ip, struct itesw *sp, int n);
static void ite_inchar (struct ite_softc *ip, struct itesw *sp, int n);
static void ite_clrtoeol (struct ite_softc *ip, struct itesw *sp);
@ -126,8 +126,11 @@ static int strncmp (const char *a, const char *b, int l);
extern int nodev();
int ite_view_init(), ite_view_deinit();
#if 0
int customc_scroll(), customc_init(), customc_deinit();
int customc_clear(), customc_putc(), customc_cursor();
#endif
int tiga_scroll(), tiga_init(), tiga_deinit();
int tiga_clear(), tiga_putc(), tiga_cursor();
@ -137,7 +140,7 @@ int retina_clear(), retina_putc(), retina_cursor();
struct itesw itesw[] =
{
customc_init, customc_deinit, 0,
ite_view_init, ite_view_deinit, 0,
0, 0, 0,
tiga_init, tiga_deinit, tiga_clear,
@ -437,6 +440,7 @@ iteioctl(dev, cmd, addr, flag)
caddr_t addr;
{
register struct tty *tp = ite_tty[UNIT(dev)];
struct ite_softc *ip = &ite_softc[UNIT(dev)];
int error;
if (! tp)
@ -472,6 +476,10 @@ iteioctl(dev, cmd, addr, flag)
}
/* XXX */
if (UNIT(dev) == 0)
return ite_grf_ioctl (ip, cmd, addr, flag);
return (ENOTTY);
}
@ -505,7 +513,8 @@ itestart(tp)
hiwat++;
cc = iteburst;
}
(*itesw[ip->type].ite_cursor)(ip, START_CURSOROPT);
if ((ip->flags & (ITE_ACTIVE|ITE_INGRF)) == ITE_ACTIVE)
(*itesw[ip->type].ite_cursor)(ip, START_CURSOROPT);
while (--cc >= 0) {
register int c;
@ -523,7 +532,8 @@ itestart(tp)
iteputchar(c, tp->t_dev);
spltty();
}
(*itesw[ip->type].ite_cursor)(ip, END_CURSOROPT);
if ((ip->flags & (ITE_ACTIVE|ITE_INGRF)) == ITE_ACTIVE)
(*itesw[ip->type].ite_cursor)(ip, END_CURSOROPT);
if (hiwat) {
tp->t_state |= TS_TIMEOUT;
timeout((timeout_t) ttrstrt, (caddr_t) tp, 1);
@ -661,6 +671,14 @@ itefilter(c, caller)
splx (s);
return -1;
}
else if (tout_pending && last_char != c)
{
/* not the same character remove the repeater and continue
* to process this key. -ch*/
untimeout ((timeout_t) repeat_handler, 0);
tout_pending = 0;
last_char = 0;
}
/* intercept LAlt-LMeta-F1 here to switch back to original ascii-keymap.
@ -1140,7 +1158,7 @@ strncmp (a, b, l)
return 0;
}
static void inline
void
ite_reset(ip)
struct ite_softc *ip;
{
@ -1964,7 +1982,6 @@ doesc:
}
}
switch (c) {
case VT: /* VT is treated like LF */
@ -2280,4 +2297,8 @@ itecnputc(dev, c)
}
iteputchar(c, dev);
}
void
iteattach() {}
#endif

1300
sys/arch/amiga/dev/ite_cc.c
View File

File diff suppressed because it is too large Load Diff

33
sys/arch/amiga/dev/ite_rt.c
View File

@ -64,6 +64,9 @@ static void screen_up (struct ite_softc *ip, int top, int bottom, int lines)
volatile u_char * ba = ip->grf->g_regkva;
volatile u_char * fb = ip->grf->g_fbkva;
const struct MonDef * md = (struct MonDef *) ip->priv;
#ifdef BANKEDDEVPAGER
int bank;
#endif
/* do some bounds-checking here.. */
if (top >= bottom)
@ -76,6 +79,13 @@ static void screen_up (struct ite_softc *ip, int top, int bottom, int lines)
}
#ifdef BANKEDDEVPAGER
/* make sure to save/restore active bank (and if it's only
for tests of the feature in text-mode..) */
bank = (RSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO)
| (RSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI) << 8));
#endif
/* the trick here is to use a feature of the NCR chip. It can
optimize data access in various read/write modes. One of
the modes is able to read/write from/to different zones.
@ -182,7 +192,13 @@ static void screen_up (struct ite_softc *ip, int top, int bottom, int lines)
WGfx (ba, GCT_ID_GRAPHICS_MODE, (RGfx(ba, GCT_ID_GRAPHICS_MODE) & 0xfc) | 0);
/* extended chain4 enable */
WSeq (ba, SEQ_ID_EXT_VIDEO_ADDR , RSeq(ba, SEQ_ID_EXT_VIDEO_ADDR) | 0x02);
#ifdef BANKEDDEVPAGER
/* restore former bank */
WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, (unsigned char) bank);
bank >>= 8;
WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, (unsigned char) bank);
#endif
};
static void screen_down (struct ite_softc *ip, int top, int bottom, int lines)
@ -190,6 +206,9 @@ static void screen_down (struct ite_softc *ip, int top, int bottom, int lines)
volatile u_char * ba = ip->grf->g_regkva;
volatile u_char * fb = ip->grf->g_fbkva;
const struct MonDef * md = (struct MonDef *) ip->priv;
#ifdef BANKEDDEVPAGER
int bank;
#endif
/* do some bounds-checking here.. */
if (top >= bottom)
@ -201,6 +220,12 @@ static void screen_down (struct ite_softc *ip, int top, int bottom, int lines)
return;
}
#ifdef BANKEDDEVPAGER
/* make sure to save/restore active bank (and if it's only
for tests of the feature in text-mode..) */
bank = (RSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO)
| (RSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI) << 8));
#endif
/* see screen_up() for explanation of chip-tricks */
/* write to primary, read from secondary */
@ -299,6 +324,12 @@ static void screen_down (struct ite_softc *ip, int top, int bottom, int lines)
/* extended chain4 enable */
WSeq (ba, SEQ_ID_EXT_VIDEO_ADDR , RSeq(ba, SEQ_ID_EXT_VIDEO_ADDR) | 0x02);
#ifdef BANKEDDEVPAGER
/* restore former bank */
WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, (unsigned char) bank);
bank >>= 8;
WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, (unsigned char) bank);
#endif
};
void retina_deinit(struct ite_softc *ip)

30
sys/arch/amiga/dev/iteioctl.h
View File

@ -43,3 +43,33 @@
#define ITESWITCH _IOW('Z',0x69, int) /* XXX */
#define ITELOADKMAP _IOW('Z',0x70, struct kbdmap)
#define ITEGETKMAP _IOR('Z',0x71, struct kbdmap)
/* don't use these in new code, just included to get
view code to compile!! There's got to be a more generic,
not so cc-concentrated approach! */
struct ite_window_size {
int x;
int y;
int width;
int height;
int depth;
};
struct ite_bell_values {
int volume;
int period;
int time;
};
#define ITE_GET_WINDOW_SIZE _IOR('Z',0x72, struct ite_window_size)
#define ITE_SET_WINDOW_SIZE _IOW('Z',0x73, struct ite_window_size)
#define ITE_DISPLAY_WINDOW _IO('Z', 0x74)
#define ITE_REMOVE_WINDOW _IO('Z', 0x75)
#define ITE_GET_BELL_VALUES _IOR('Z', 0x76, struct ite_bell_values)
#define ITE_SET_BELL_VALUES _IOW('Z', 0x77, struct ite_bell_values)

4
sys/arch/amiga/dev/itevar.h
View File

@ -67,7 +67,7 @@ struct ite_softc {
u_char font_lo, font_hi;
short rows, cols;
short cpl;
short ftheight, ftwidth;
short ftheight, ftwidth, ftbaseline, ftboldsmear;
short attribute;
u_char *attrbuf;
short planemask;
@ -82,6 +82,8 @@ struct ite_softc {
char emul_level, eightbit_C1;
int top_margin, bottom_margin, inside_margins;
short save_curx, save_cury, save_attribute;
/* needed by view code */
void *view;
};
/* emulation levels: */

150
sys/arch/amiga/dev/kbd.c
View File

@ -55,6 +55,19 @@
#include "../amiga/custom.h"
#include "../amiga/cia.h"
/* for sun-like event mode, if you go thru /dev/kbd. */
#include "event_var.h"
#include "vuid_event.h"
struct kbd_softc {
int k_event_mode; /* if true, collect events, else pass to ite */
struct evvar k_events; /* event queue state */
} kbd_softc;
/* definitions for amiga keyboard encoding. */
#define KEY_CODE(c) ((c) & 0x7f)
#define KEY_UP(c) ((c) & 0x80)
void
kbdenable ()
{
@ -65,16 +78,109 @@ kbdenable ()
custom.intena = INTF_SETCLR | INTF_PORTS;
ciaa.icr = CIA_ICR_IR_SC | CIA_ICR_SP; /* SP interrupt enable */
ciaa.cra &= ~(1<<6); /* serial line == input */
kbd_softc.k_event_mode = 0;
kbd_softc.k_events.ev_io = 0;
splx (s);
}
int
kbdopen (dev_t dev, int flags, int mode, struct proc *p)
{
int s, error;
if (kbd_softc.k_events.ev_io)
return EBUSY;
kbd_softc.k_events.ev_io = p;
ev_init(&kbd_softc.k_events);
return (0);
}
int
kbdclose (dev_t dev, int flags, int mode, struct proc *p)
{
/* Turn off event mode, dump the queue */
kbd_softc.k_event_mode = 0;
ev_fini(&kbd_softc.k_events);
kbd_softc.k_events.ev_io = NULL;
return (0);
}
int
kbdread (dev_t dev, struct uio *uio, int flags)
{
return ev_read (&kbd_softc.k_events, uio, flags);
}
/* this routine should not exist, but is convenient to write here for now */
int
kbdwrite (dev_t dev, struct uio *uio, int flags)
{
return EOPNOTSUPP;
}
int
kbdioctl (dev_t dev, int cmd, register caddr_t data, int flag, struct proc *p)
{
register struct kbd_softc *k = &kbd_softc;
switch (cmd)
{
case KIOCTRANS:
if (*(int *)data == TR_UNTRANS_EVENT)
return 0;
break;
case KIOCGTRANS:
/*
* Get translation mode
*/
*(int *)data = TR_UNTRANS_EVENT;
return 0;
case KIOCSDIRECT:
k->k_event_mode = *(int *)data;
return 0;
case FIONBIO: /* we will remove this someday (soon???) */
return 0;
case FIOASYNC:
k->k_events.ev_async = *(int *)data != 0;
return 0;
case TIOCSPGRP:
if (*(int *)data != k->k_events.ev_io->p_pgid)
return EPERM;
return 0;
default:
return ENOTTY;
}
/*
* We identified the ioctl, but we do not handle it.
*/
return EOPNOTSUPP; /* misuse, but what the heck */
}
int
kbdselect (dev_t dev, int rw, struct proc *p)
{
return ev_select (&kbd_softc.k_events, rw, p);
}
int
kbdintr (mask)
int mask;
{
u_char c, in;
struct kbd_softc *k = &kbd_softc;
struct firm_event *fe;
int put;
/* now only invoked from generic CIA interrupt handler if there *is*
a keyboard interrupt pending */
@ -82,23 +188,47 @@ kbdintr (mask)
in = ciaa.sdr;
/* ack */
ciaa.cra |= (1 << 6); /* serial line output */
/* wait 85 microseconds */
DELAY(85);
/* wait 200 microseconds (for bloody Cherry keyboards..) */
DELAY(200);
ciaa.cra &= ~(1 << 6);
c = ~in; /* keyboard data is inverted */
/* process the character.
/* process the character */
Should implement RAW mode for X11 later here !! */
c = (c >> 1) | (c << 7); /* rotate right once */
itefilter (c, ITEFILT_TTY);
/* XXX THIS IS WRONG!!! The screenblanker should route thru ite.c, which
should call thru it's driver table, ie. we need a new driver-dependant
function for this feature! */
cc_unblank ();
/* if not in event mode, deliver straight to ite to process key stroke */
if (! k->k_event_mode)
{
itefilter (c, ITEFILT_TTY);
return;
}
/* Keyboard is generating events. Turn this keystroke into an
event and put it in the queue. If the queue is full, the
keystroke is lost (sorry!). */
put = k->k_events.ev_put;
fe = &k->k_events.ev_q[put];
put = (put + 1) % EV_QSIZE;
if (put == k->k_events.ev_get)
{
log(LOG_WARNING, "keyboard event queue overflow\n"); /* ??? */
return;
}
fe->id = KEY_CODE(c);
fe->value = KEY_UP(c) ? VKEY_UP : VKEY_DOWN;
fe->time = time;
k->k_events.ev_put = put;
EV_WAKEUP(&k->k_events);
}
@ -124,8 +254,8 @@ kbdgetcn ()
/* ack */
ciaa.cra |= (1 << 6); /* serial line output */
ciaa.sdr = 0xff; /* ack */
/* wait 85 microseconds */
DELAY(85); /* XXXX only works as long as DELAY doesn't use a timer and waits.. */
/* wait 200 microseconds */
DELAY(200); /* XXXX only works as long as DELAY doesn't use a timer and waits.. */
ciaa.cra &= ~(1 << 6);
ciaa.sdr = in;
@ -133,10 +263,12 @@ kbdgetcn ()
c = (c >> 1) | (c << 7);
/* take care that no CIA-interrupts are lost */
if (mask)
dispatch_cia_ints (0, mask);
if (ints)
dispatch_cia_ints (0, ints);
return c;
}
void
kbdattach() {}
#endif

34
sys/arch/amiga/dev/kbdreg.h
View File

@ -1,6 +1,17 @@
/*
* Copyright (c) 1982, 1986, 1990 Regents of the University of California.
* All rights reserved.
* losely based on:
*
* Copyright (c) 1992, 1993
* The Regents of the University of California. All rights reserved.
*
* This software was developed by the Computer Systems Engineering group
* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
* contributed to Berkeley.
*
* All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Lawrence Berkeley Laboratory.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@ -30,16 +41,15 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)dcareg.h 7.3 (Berkeley) 5/7/91
* @(#)kbio.h 8.1 (Berkeley) 6/11/93
*
* from: Header: kbio.h,v 1.4 92/11/26 01:16:32 torek Exp (LBL)
* $Id: kbdreg.h,v 1.4 1994/01/26 21:06:02 mw Exp $
*/
struct kbddevice {
int dummy;
};
/*
* WARNING: Serial console is assumed to be at SC9
* and CONUNIT must be 0.
*/
#define CONUNIT (0)
#define KIOCTRANS _IOW('k', 0, int) /* set translation mode */
/* (we only accept TR_UNTRANS_EVENT) */
#define KIOCGTRANS _IOR('k', 5, int) /* get translation mode */
#define KIOCSDIRECT _IOW('k', 10, int) /* keys to console? */
#define TR_UNTRANS_EVENT 3

11
sys/arch/amiga/dev/kernel_font.c.distrib
View File

@ -13,9 +13,12 @@
* 3-Sep-90 Alessandro Forin (af) at Carnegie-Mellon University
* Created.
* $Log: kernel_font.c.distrib,v $
* Revision 1.2 1993/10/30 23:41:27 mw
* new tree for amiga, replacing the bogous previous one.
* SunOS support works for a lot of executables now (static and dynamic).
* Revision 1.3 1994/01/26 21:06:03 mw
* Integrate recent changes done to the amiga branch. Includes support
* for the '40.
* Support for more scsi controllers (zeus, magnum)
* Support for more tapes (in st.c)
* New custom chip console code integrated.
*
* Revision 2.6 91/06/19 11:46:19 rvb
* File moved here from mips/PMAX since it tries to be generic;
@ -71,6 +74,8 @@ unsigned char kernel_font_width = 8;
unsigned char kernel_font_height = 15;
unsigned char kernel_font_lo = 0x20;
unsigned char kernel_font_hi = 0xbd + 0x20;
unsigned char kernel_font_baseline = 11;
short kernel_font_boldsmear = 1;
unsigned char kernel_cursor[] = {

49
sys/arch/amiga/dev/magnumdma.c Normal file
View File

@ -0,0 +1,49 @@
/*
* Copyright (c) 1982, 1990 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)dma.c
*/
/*
* dummy CSA Magnum DMA driver
*/
#include "magnumscsi.h"
#if NMAGNUMSCSI > 0
void
magnumdmainit ()
{
}
#endif

369
sys/arch/amiga/dev/ms.c Normal file
View File

@ -0,0 +1,369 @@
/*
* based on:
*
* Copyright (c) 1992, 1993
* The Regents of the University of California. All rights reserved.
*
* This software was developed by the Computer Systems Engineering group
* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
* contributed to Berkeley.
*
* All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Lawrence Berkeley Laboratory.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)ms.c 8.1 (Berkeley) 6/11/93
*
* from: Header: ms.c,v 1.5 92/11/26 01:28:47 torek Exp (LBL)
* $Id: ms.c,v 1.1 1994/01/26 21:06:05 mw Exp $
*/
/*
* Mouse driver.
*/
#include "param.h"
#include "conf.h"
#include "ioctl.h"
#include "kernel.h"
#include "proc.h"
#include "syslog.h"
#include "systm.h"
#include "tty.h"
#include "event_var.h"
#include "vuid_event.h"
#include "../amiga/custom.h"
#include "../amiga/cia.h"
#include "mouse.h"
#if NMOUSE > 0
/* there's really no more physical ports on an amiga.. */
#if NMOUSE > 2
#undef NMOUSE
#define NMOUSE 2
#endif
void msintr (int unit);
/* Amiga mice are hooked up to one of the two "game" ports, where
the main mouse is usually on the first port, and port 2 can
be used by a joystick. Nevertheless, we support two mouse
devices, /dev/mouse0 and /dev/mouse1 (with a link of /dev/mouse to
the device that represents the port of the mouse in use). */
struct ms_softc {
u_char ms_horc; /* horizontal counter on last scan */
u_char ms_verc; /* vertical counter on last scan */
char ms_mb; /* mouse button state */
char ms_ub; /* user button state */
int ms_dx; /* delta-x */
int ms_dy; /* delta-y */
volatile int ms_ready; /* event queue is ready */
struct evvar ms_events; /* event queue state */
} ms_softc[NMOUSE];
/* enable scanner, called when someone opens the device.
Assume caller already validated range of dev. */
void
ms_enable (dev_t dev)
{
int unit = minor (dev);
struct ms_softc *ms = &ms_softc[unit];
/* use this as flag to the "interrupt" to tell it when to
shut off (when it's reset to 0). */
ms->ms_ready = 1;
timeout ((timeout_t) msintr, (caddr_t) unit, 2);
}
/* disable scanner. Just set ms_ready to 0, and after the next
timeout taken, no further timeouts will be initiated. */
void
ms_disable (dev_t dev)
{
struct ms_softc *ms = &ms_softc[minor (dev)];
int s = splhigh ();
ms->ms_ready = 0;
/* sync with the interrupt */
tsleep ((caddr_t) ms, PZERO - 1, "mouse-disable", 0);
splx (s);
}
void
msintr (int unit)
{
struct ms_softc *ms = &ms_softc[unit];
register struct firm_event *fe;
register int mb, ub, d, get, put, any;
static const char to_one[] = { 1, 2, 2, 4, 4, 4, 4 };
static const int to_id[] = { MS_RIGHT, MS_MIDDLE, 0, MS_LEFT };
u_short pot;
u_char pra;
u_short count;
u_char *horc = ((u_char *) &count) + 1;
u_char *verc = (u_char *) &count;
short dx, dy;
/* BTW: we're emulating a mousesystems serial mouse here.. */
/* first read the three buttons. */
pot = custom.potgor;
pra = ciaa.pra;
pot >>= unit == 0 ? 8 : 12; /* contains right and middle button */
pra >>= unit == 0 ? 6 : 7; /* contains left button */
mb = (pot & 4) / 4 + (pot & 1) * 2 + (pra & 1) * 4;
mb ^= 0x07;
/* read current values of counter registers */
count = unit == 0 ? custom.joy0dat : custom.joy1dat;
/* take care of wraparound */
dx = *horc - ms->ms_horc;
if (dx < -127)
dx += 255;
else if (dx > 127)
dx -= 255;
dy = *verc - ms->ms_verc;
if (dy < -127)
dy += 255;
else if (dy > 127)
dy -= 255;
/* remember current values for next scan */
ms->ms_horc = *horc;
ms->ms_verc = *verc;
ms->ms_dx = dx;
ms->ms_dy = dy;
ms->ms_mb = mb;
if (dx || dy || ms->ms_ub != ms->ms_mb)
{
/* We have at least one event (mouse button, delta-X, or
delta-Y; possibly all three, and possibly three separate
button events). Deliver these events until we are out
of changes or out of room. As events get delivered,
mark them `unchanged'. */
any = 0;
get = ms->ms_events.ev_get;
put = ms->ms_events.ev_put;
fe = &ms->ms_events.ev_q[put];
/* NEXT prepares to put the next event, backing off if necessary */
#define NEXT \
if ((++put) % EV_QSIZE == get) \
{ \
put--; \
goto out; \
}
/* ADVANCE completes the `put' of the event */
#define ADVANCE \
fe++; \
if (put >= EV_QSIZE) \
{ \
put = 0; \
fe = &ms->ms_events.ev_q[0]; \
} \
any = 1
mb = ms->ms_mb;
ub = ms->ms_ub;
while ((d = mb ^ ub) != 0)
{
/* Mouse button change. Convert up to three changes
to the `first' change, and drop it into the event queue. */
NEXT;
d = to_one[d - 1]; /* from 1..7 to {1,2,4} */
fe->id = to_id[d - 1]; /* from {1,2,4} to ID */
fe->value = mb & d ? VKEY_DOWN : VKEY_UP;
fe->time = time;
ADVANCE;
ub ^= d;
}
if (ms->ms_dx)
{
NEXT;
fe->id = LOC_X_DELTA;
fe->value = ms->ms_dx;
fe->time = time;
ADVANCE;
ms->ms_dx = 0;
}
if (ms->ms_dy)
{
NEXT;
fe->id = LOC_Y_DELTA;
fe->value = ms->ms_dy;
fe->time = time;
ADVANCE;
ms->ms_dy = 0;
}
out:
if (any)
{
ms->ms_ub = ub;
ms->ms_events.ev_put = put;
EV_WAKEUP(&ms->ms_events);
}
}
/* reschedule handler, or if terminating, handshake with ms_disable */
if (ms->ms_ready)
timeout ((timeout_t) msintr, (caddr_t) unit, 2);
else
wakeup ((caddr_t) ms);
}
int
msopen (dev, flags, mode, p)
dev_t dev;
int flags, mode;
struct proc *p;
{
int unit = minor (dev);
struct ms_softc *ms = &ms_softc[unit];
int s, error;
if (unit >= NMOUSE)
return EXDEV;
if (ms->ms_events.ev_io)
return EBUSY;
ms->ms_events.ev_io = p;
ev_init (&ms->ms_events); /* may cause sleep */
ms_enable (dev);
return 0;
}
int
msclose (dev, flags, mode, p)
dev_t dev;
int flags, mode;
struct proc *p;
{
int unit = minor (dev);
struct ms_softc *ms = &ms_softc[unit];
ms_disable (dev);
ev_fini (&ms->ms_events);
ms->ms_events.ev_io = NULL;
return 0;
}
int
msread (dev, uio, flags)
dev_t dev;
struct uio *uio;
int flags;
{
int unit = minor (dev);
struct ms_softc *ms = &ms_softc[unit];
return ev_read (&ms->ms_events, uio, flags);
}
/* this routine should not exist, but is convenient to write here for now */
int
mswrite (dev, uio, flags)
dev_t dev;
struct uio *uio;
int flags;
{
return EOPNOTSUPP;
}
int
msioctl (dev, cmd, data, flag, p)
dev_t dev;
int cmd;
register caddr_t data;
int flag;
struct proc *p;
{
int unit = minor (dev);
struct ms_softc *ms = &ms_softc[unit];
switch (cmd)
{
case FIONBIO: /* we will remove this someday (soon???) */
return 0;
case FIOASYNC:
ms->ms_events.ev_async = *(int *)data != 0;
return 0;
case TIOCSPGRP:
if (*(int *)data != ms->ms_events.ev_io->p_pgid)
return EPERM;
return 0;
case VUIDGFORMAT:
/* we only do firm_events */
*(int *)data = VUID_FIRM_EVENT;
return 0;
case VUIDSFORMAT:
if (*(int *)data != VUID_FIRM_EVENT)
return EINVAL;
return 0;
}
return ENOTTY;
}
int
msselect (dev, rw, p)
dev_t dev;
int rw;
struct proc *p;
{
int unit = minor (dev);
struct ms_softc *ms = &ms_softc[unit];
return ev_select (&ms->ms_events, rw, p);
}
void
mouseattach() {}
#endif /* NMOUSE > 0 */

2
sys/arch/amiga/dev/par.c
View File

@ -31,7 +31,7 @@
* SUCH DAMAGE.
*
* from: @(#)ppi.c 7.3 (Berkeley) 12/16/90
* $Id: par.c,v 1.2 1993/10/30 23:41:28 mw Exp $
* $Id: par.c,v 1.3 1994/01/26 21:06:07 mw Exp $
*/
/*

2
sys/arch/amiga/dev/parioctl.h
View File

@ -31,7 +31,7 @@
* SUCH DAMAGE.
*
* from: @(#)ppiioctl.h 7.2 (Berkeley) 12/16/90
* $Id: parioctl.h,v 1.2 1993/10/30 23:41:29 mw Exp $
* $Id: parioctl.h,v 1.3 1994/01/26 21:06:07 mw Exp $
*/
#ifndef _IOCTL_

2
sys/arch/amiga/dev/rtclocka_var.h
View File

@ -46,7 +46,7 @@ struct rtclock3000 {
#define BBC_READ_REG 0xc3
#define NUM_BBC_REGS 12
#define leapyear(year) ((year) % 4 == 0)
#define leapyear(y) (((y)%4)==0 && ((y)%100)!=0 || ((y)%400) == 0)
#define range_test(n, l, h) if ((n) < (l) || (n) > (h)) return(0)
#define days_in_year(a) (leapyear(a) ? 366 : 365)
#define days_in_month(a) (month_days[(a) - 1])

2
sys/arch/amiga/dev/rtclockb_var.h
View File

@ -39,7 +39,7 @@ struct rtclock2000 {
#define SECDAY 86400L
#define SECYR (SECDAY * 365)
#define leapyear(year) ((year) % 4 == 0)
#define leapyear(y) (((y)%4)==0 && ((y)%100)!=0 || ((y)%400) == 0)
#define range_test(n, l, h) if ((n) < (l) || (n) > (h)) return(0)
#define days_in_year(a) (leapyear(a) ? 366 : 365)
#define days_in_month(a) (month_days[(a) - 1])

1240
sys/arch/amiga/dev/rz.c Normal file
View File

File diff suppressed because it is too large Load Diff

80
sys/arch/amiga/dev/scsi.c
View File

@ -50,7 +50,7 @@
#if NSCSI > 0
#ifndef lint
static char rcsid[] = "$Header: /cvsroot/src/sys/arch/amiga/dev/Attic/scsi.c,v 1.4 1993/10/30 23:41:33 mw Exp $";
static char rcsid[] = "$Header: /cvsroot/src/sys/arch/amiga/dev/Attic/scsi.c,v 1.5 1994/01/26 21:06:13 mw Exp $";
#endif
#include "sys/param.h"
@ -76,7 +76,7 @@ static int ixfer_out (register volatile sbic_padded_regmap_t *regs, int len, reg
static void ixfer_in (register volatile sbic_padded_regmap_t *regs, int len, register u_char *buf);
static int scsiicmd (struct scsi_softc *dev, int target, u_char *cbuf, int clen, u_char *buf, int len, u_char xferphase);
static void finishxfer (struct scsi_softc *dev, register volatile sbic_padded_regmap_t *regs, int target);
static int check_dma_buf (char *buffer, u_long len);
/*
@ -116,6 +116,8 @@ struct driver a2091scsidriver = {
a2091scsiinit, "a2091scsi", (int (*)())scsistart, scsigo, scsiintr,
(int (*)())scsidone,
};
int a2091_dmabounce = 0;
#endif
#if NGVP11SCSI > 0
@ -125,6 +127,8 @@ struct driver gvp11scsidriver = {
gvp11scsiinit, "GVPIIscsi", (int (*)())scsistart, scsigo, scsiintr,
(int (*)())scsidone,
};
int gvp11_dmabounce = 0;
#endif
@ -182,7 +186,7 @@ scsi_period_to_sbic(dev, regs, p)
}
/* default to not inhibit sync negotiation on any drive */
u_char inhibit_sync[NSCSI][8] = { 0, 0, 0, 0, 1, 0, 0 }; /* initialize, so patchable */
u_char inhibit_sync[NSCSI][8] = { 1, 1, 1, 1, 1, 1, 1 }; /* initialize, so patchable */
int scsi_no_dma = 0;
#ifdef DEBUG
@ -390,6 +394,12 @@ a2091scsiinit(ac)
/* initialize dma */
a2091dmainit (ac, &dev->dmareq, &dev->dmafree, &dev->dmago,
&dev->dmanext, &dev->dmastop);
dev->sc_flags |= SCSI_DMA24; /* can only DMA in ZorroII memory */
if (a2091_dmabounce) {
/* XXX should do this dynamically when needed? */
dev->dmabuffer = (char *) alloc_z2mem (MAXPHYS);
printf ("a2091scsi: dma bounce buffer at %08x\n", dev->dmabuffer);
}
/* advance ac->amiga_addr to point to the real sbic-registers */
ac->amiga_addr = (caddr_t) ((int)ac->amiga_addr + 0x91);
@ -437,6 +447,12 @@ gvp11scsiinit(ac)
/* initialize dma */
gvp11dmainit (ac, &dev->dmareq, &dev->dmafree, &dev->dmago,
&dev->dmanext, &dev->dmastop);
dev->sc_flags |= SCSI_DMA24; /* can only DMA in ZorroII memory */
if (gvp11_dmabounce) {
/* XXX should do this dynamically when needed? */
dev->dmabuffer = (char *) alloc_z2mem (MAXPHYS);
printf ("gvp11scsi: dma bounce buffer at %08x\n", dev->dmabuffer);
}
/* advance ac->amiga_addr to point to the real sbic-registers */
ac->amiga_addr = (caddr_t) ((int)ac->amiga_addr + 0x61);
@ -642,6 +658,7 @@ wait_for_select(dev, regs)
QPRINTF (("%02x ", csr));
}
while (csr != (SBIC_CSR_MIS_2|MESG_OUT_PHASE)
&& csr != (SBIC_CSR_MIS_2|CMD_PHASE)
&& csr != SBIC_CSR_SEL_TIMEO);
/* Send identify message (SCSI-2 requires an identify msg (?)) */
@ -707,6 +724,8 @@ wait_for_select(dev, regs)
if (csr != SBIC_CSR_SEL_TIMEO)
dev->sc_flags |= SCSI_SELECTED;
else if (csr == (SBIC_CSR_MIS_2|CMD_PHASE))
dev->sc_flags |= SCSI_SELECTED; /* device ignored ATN */
}
QPRINTF(("\n"));
@ -1394,6 +1413,7 @@ scsigo(ctlr, slave, unit, bp, cdb, pad)
(sbic_padded_regmap_t *)dev->sc_ac->amiga_addr;
int i, dmaflags;
u_char phase, csr, asr, cmd;
char *addr;
cdb->cdb[1] |= unit << 5;
@ -1403,7 +1423,9 @@ scsigo(ctlr, slave, unit, bp, cdb, pad)
/* XXXX do all with polled I/O */
if (scsi_no_dma || (((int)bp->b_un.b_addr & 3) || (bp->b_bcount & 1)))
if (scsi_no_dma || (((int)bp->b_un.b_addr & 3) || (bp->b_bcount & 1))
|| (dev->sc_flags & SCSI_DMA24 && check_dma_buf (bp->b_un.b_addr,
bp->b_bcount) && dev->dmabuffer == NULL))
{
register struct devqueue *dq;
@ -1417,7 +1439,7 @@ scsigo(ctlr, slave, unit, bp, cdb, pad)
bp->b_flags & B_READ ? DATA_IN_PHASE : DATA_OUT_PHASE);
dq = dev->sc_sq.dq_forw;
dev->sc_flags &=~ SCSI_IO;
dev->sc_flags &=~ (SCSI_IO | SCSI_READ24);
(dq->dq_driver->d_intr)(dq->dq_unit, dev->sc_stat[0]);
return dev->sc_stat[0];
}
@ -1487,7 +1509,7 @@ scsigo(ctlr, slave, unit, bp, cdb, pad)
dev->dmafree(&dev->sc_dq);
finishxfer (dev, regs, slave);
dq = dev->sc_sq.dq_forw;
dev->sc_flags &=~ SCSI_IO;
dev->sc_flags &=~ (SCSI_IO | SCSI_READ24);
(dq->dq_driver->d_intr)(dq->dq_unit, dev->sc_stat[0]);
return 0;
@ -1537,9 +1559,23 @@ out:
panic ("not long-aligned buffer address in scsi_go");
if (bp->b_bcount & 1)
panic ("odd transfer count in scsi_go");
addr = bp->b_un.b_addr;
if (dev->sc_flags & SCSI_DMA24 && check_dma_buf (addr, bp->b_bcount)) {
if (bp->b_bcount > MAXPHYS)
printf ("dmago: bp->b_bcount > MAXPHYS %08x\n", bp->b_bcount);
if (dmaflags & DMAGO_READ) {
dev->sc_flags |= SCSI_READ24; /* need to copy after read */
dev->dmausrbuf = addr; /* save address */
dev->dmausrlen = bp->b_bcount; /* and length */
}
else { /* write: copy to dma buffer */
bcopy (addr, dev->dmabuffer, bp->b_bcount);
}
addr = dev->dmabuffer; /* and use dma buffer */
}
/* dmago() also enables interrupts for the sbic */
i = dev->dmago(ctlr, bp->b_un.b_addr, bp->b_bcount, dmaflags);
i = dev->dmago(ctlr, addr, bp->b_bcount, dmaflags);
SBIC_TC_PUT (regs, (unsigned)i);
SET_SBIC_cmd (regs, SBIC_CMD_XFER_INFO);
@ -1593,7 +1629,9 @@ QPRINTF(("[0x%x]", csr));
*/
dq = dev->sc_sq.dq_forw;
finishxfer(dev, regs, dq->dq_slave);
dev->sc_flags &=~ SCSI_IO;
if (dev->sc_flags & SCSI_READ24)
bcopy (dev->dmabuffer, dev->dmausrbuf, dev->dmausrlen);
dev->sc_flags &=~ (SCSI_IO | SCSI_READ24);
dev->dmafree (&dev->sc_dq);
(dq->dq_driver->d_intr)(dq->dq_unit, dev->sc_stat[0]);
}
@ -1615,7 +1653,7 @@ QPRINTF(("[0x%x]", csr));
scsiabort(dev, regs, "intr");
if (dev->sc_flags & SCSI_IO)
{
dev->sc_flags &=~ SCSI_IO;
dev->sc_flags &=~ (SCSI_IO| SCSI_READ24);
dev->dmafree (&dev->sc_dq);
dq = dev->sc_sq.dq_forw;
(dq->dq_driver->d_intr)(dq->dq_unit, -1);
@ -1637,6 +1675,30 @@ scsifree(dq)
(dq->dq_driver->d_start)(dq->dq_unit);
}
/*
* Check if DMA can not be used with specified buffer
*/
static int
check_dma_buf (char *buffer, u_long len)
{
u_long phy_buf;
u_long phy_len;
if (len == 0)
return (0);
while (len) {
phy_buf = kvtop(buffer);
if (len < (phy_len = NBPG - ((int) buffer & PGOFSET)))
phy_len = len;
if (phy_buf & 0xff000000)
return (1); /* can't use DMA here */
buffer += phy_len;
len -= phy_len;
}
return (0); /* DMA is ok */
}
/*
* (XXX) The following routine is needed for the SCSI tape driver
* to read odd-size records.

6
sys/arch/amiga/dev/scsireg.h
View File

@ -308,12 +308,6 @@
#define sbic_isa_select(cmd) (((cmd)>0x5)&&((cmd)<0xa))
#define PAD(n) char n;
#ifdef A3000
#define SBIC_CLOCK_FREQUENCY 143 /* according to A3000T service manual */
#endif
#ifdef A2091
#define SBIC_CLOCK_FREQUENCY 77
#endif
#define SBIC_MACHINE_DMA_MODE SBIC_CTL_DMA
typedef struct {

7
sys/arch/amiga/dev/scsivar.h
View File

@ -45,6 +45,9 @@ struct scsi_softc {
dmago_t dmago;
dmanext_t dmanext;
dmastop_t dmastop;
char *dmabuffer;
char *dmausrbuf;
u_long dmausrlen;
u_char sc_flags;
u_long sc_clock_freq;
/* one for each target */
@ -65,6 +68,10 @@ struct scsi_softc {
#endif
#define SCSI_SELECTED 0x04 /* bus is in selected state. Needed for
correct abort procedure. */
#define SCSI_DMA24 0x10 /* controller can only DMA to ZorroII
address space */
#define SCSI_READ24 0x20 /* DMA input needs to be copied from
ZorroII buffer to real buffer */
/* sync states */
#define SYNC_START 0 /* no sync handshake started */

75
sys/arch/amiga/dev/sd.c
View File

@ -43,7 +43,7 @@
#if NSD > 0
#ifndef lint
static char rcsid[] = "$Header: /cvsroot/src/sys/arch/amiga/dev/Attic/sd.c,v 1.4 1993/10/30 23:41:36 mw Exp $";
static char rcsid[] = "$Header: /cvsroot/src/sys/arch/amiga/dev/Attic/sd.c,v 1.5 1994/01/26 21:06:17 mw Exp $";
#endif
#include "sys/param.h"
@ -174,8 +174,8 @@ struct scsi_fmt_sense sdsense[NSD];
static struct scsi_fmt_cdb sd_read_cmd = { 10, CMD_READ_EXT };
static struct scsi_fmt_cdb sd_write_cmd = { 10, CMD_WRITE_EXT };
#define sdunit(x) (minor(x) >> 3)
#define sdpart(x) (minor(x) & 0x7)
#define sdunit(x) (minor (x) >> 3 & 0x7)
#define sdpart(x) (minor (x) & 0x7 | minor (x) >> 3 & 0x18)
#define sdpunit(x) ((x) & 7)
#define b_cylin b_resid
@ -286,8 +286,10 @@ retry_TUR:
case 7: /* Magneto-optical */
break;
default: /* not a disk */
#ifdef DEBUG
if (sddebug)
printf ("Unit %d unknown scsi-type: %d\n", slave, inqbuf.type);
#endif
goto failed;
}
/*
@ -365,7 +367,7 @@ sdinit(ad)
static u_int block [DEV_BSIZE / 4];
struct RigidDiskBlock *rdb = (struct RigidDiskBlock *) block;
struct PartitionBlock *pb = (struct PartitionBlock *) block;
int bnum, npbnum, num_bsd_part = 0;
int bnum, npbnum, num_bsd_part = 0, num_part = 0, non_bsd_part = 8;
struct disklabel *dl;
int s;
@ -448,11 +450,11 @@ no_rdb:
/* ok, go thru the partition blocks, and check for BSD ID's */
for (npbnum = rdb->rdb_PartitionList; npbnum; )
for (npbnum = rdb->rdb_PartitionList; npbnum != 0xffffffff; )
{
u_int start_block, end_block, nblocks;
u_int reserved;
int part;
int part, bsd_part;
if (scsi_tt_read (ad->amiga_ctlr, ad->amiga_slave, sc->sc_punit,
(char *) block, DEV_BSIZE, npbnum, sc->sc_bshift))
@ -466,9 +468,11 @@ no_rdb:
npbnum = pb->pb_Next;
start_block = pb->pb_Environment[DE_LOWCYL] * dl->d_secpercyl;
reserved = pb->pb_Environment[DE_RESERVEDBLKS];
end_block = pb->pb_Environment[DE_UPPERCYL] * dl->d_secpercyl;
end_block =
(1 + pb->pb_Environment[DE_UPPERCYL]) * dl->d_secpercyl - 1;
part = -1;
bsd_part = 1;
switch (pb->pb_Environment[DE_DOSTYPE])
{
case DOSTYPE_BSD_ROOT:
@ -526,30 +530,69 @@ no_rdb:
if (! dl->d_partitions[7].p_size)
part = 7;
break;
default:
/* Not a BSD partition, let's put it at a minor device number
above 0x3f (== 077 == 63). */
part = non_bsd_part++;
bsd_part = 0;
if (part >= MAXPARTITIONS)
{
printf ("Ignoring partition at %d due to sd slave table "
"overflow.\n", start_block);
part = -1;
}
break;
}
if (part >= 0)
{
num_bsd_part++;
dl->d_partitions[part].p_offset = start_block + reserved;
dl->d_partitions[part].p_size = end_block - start_block - reserved;
num_part++;
if (bsd_part)
{
num_bsd_part++;
dl->d_partitions[part].p_offset = start_block + reserved;
}
else
dl->d_partitions[part].p_offset = start_block;
dl->d_partitions[part].p_size
= end_block - dl->d_partitions[part].p_offset + 1;
/* for now, have this static.. XXX */
dl->d_partitions[part].p_fsize = 1024;
dl->d_partitions[part].p_fstype = part == 1 ? FS_SWAP : FS_BSDFFS;
dl->d_partitions[part].p_fstype
= bsd_part ? part == 1 ? FS_SWAP : FS_BSDFFS : FS_ADOS;
dl->d_partitions[part].p_frag = 8;
dl->d_partitions[part].p_cpg = 0; /* XXX */
#ifdef DEBUG
if (sddebug)
printf ("%c @%d - %d = %d\n", part + 'A',
start_block, end_block, end_block - start_block - reserved);
if (bsd_part)
printf ("BSD partition %c @%d - %d size %d\n", part + 'A',
start_block, end_block,
dl->d_partitions[part].p_size);
else
printf ("Non-BSD partition %d @%d - %d size %d\n",
part - 8, start_block, end_block,
dl->d_partitions[part].p_size);
#endif
}
}
dl->d_npartitions = num_bsd_part;
/* This slot is obviously overloaded to mean both the actual count
of partitions (that's our view) and the maximum index of the
d_partition table incremented by one (this is the view presented
by the dkcksum function in ufs_disksubr.c). If we want to go
that way, change num_part to non_bsd_part. XXX */
#if 0
dl->d_npartitions = num_part;
#else
dl->d_npartitions = non_bsd_part;
#endif
#ifdef DEBUG
if (sddebug)
printf ("total %d BSD-partitions.\n", num_bsd_part);
printf ("total %d partitions (%d BSD).\n", num_part, num_bsd_part);
#endif
/* C gets everything */
dl->d_partitions[2].p_size = sc->sc_blks;

1261
sys/arch/amiga/dev/ser.c
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9
sys/arch/amiga/dev/serreg.h
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@ -58,3 +58,12 @@ struct serdevice {
#define SERBRD(val) ((3579545/val-1) < 32768 ? 3579545/val-1 : 0)
#define SER_VBL_PRIORITY (1)
/* unit is in lower 7 bits (for now, only one unit:-))
dialin: open blocks until carrier present, hangup on carrier drop
dialout: carrier is ignored */
#define SERUNIT(dev) (minor(dev) & 0x7f)
#define DIALIN(dev) ((minor(dev) & 0x80) == 0x80)
#define DIALOUT(dev) ((minor(dev) & 0x80) == 0x00)

1345
sys/arch/amiga/dev/siop.c Normal file
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668
sys/arch/amiga/dev/siopreg.h Normal file
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@ -0,0 +1,668 @@
/*
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* Van Jacobson of Lawrence Berkeley Laboratory.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)scsireg.h 7.3 (Berkeley) 2/5/91
*/
/*
* NCR 53C710 SCSI interface hardware description.
*
*/
typedef struct {
volatile unsigned char siop_sien; /* rw: SCSI Interrupt Enable */
volatile unsigned char siop_sdid; /* rw: SCSI Destination ID */
volatile unsigned char siop_scntl1; /* rw: SCSI control reg 1 */
volatile unsigned char siop_scntl0; /* rw: SCSI control reg 0 */
volatile unsigned char siop_socl; /* rw: SCSI Output Control Latch */
volatile unsigned char siop_sodl; /* rw: SCSI Output Data Latch */
volatile unsigned char siop_sxfer; /* rw: SCSI Transfer reg */
volatile unsigned char siop_scid; /* rw: SCSI Chip ID reg */
volatile unsigned char siop_sbcl; /* ro: SCSI Bus Control Lines */
volatile unsigned char siop_sbdl; /* ro: SCSI Bus Data Lines */
volatile unsigned char siop_sidl; /* ro: SCSI Input Data Latch */
volatile unsigned char siop_sfbr; /* ro: SCSI First Byte Received */
volatile unsigned char siop_sstat2; /* ro: SCSI status reg 2 */
volatile unsigned char siop_sstat1; /* ro: SCSI status reg 1 */
volatile unsigned char siop_sstat0; /* ro: SCSI status reg 0 */
volatile unsigned char siop_dstat; /* ro: DMA status */
volatile unsigned long siop_dsa; /* rw: Data Structure Address */
volatile unsigned char siop_ctest3; /* ro: Chip test register 3 */
volatile unsigned char siop_ctest2; /* ro: Chip test register 2 */
volatile unsigned char siop_ctest1; /* ro: Chip test register 1 */
volatile unsigned char siop_ctest0; /* ro: Chip test register 0 */
volatile unsigned char siop_ctest7; /* rw: Chip test register 7 */
volatile unsigned char siop_ctest6; /* rw: Chip test register 6 */
volatile unsigned char siop_ctest5; /* rw: Chip test register 5 */
volatile unsigned char siop_ctest4; /* rw: Chip test register 4 */
volatile unsigned long siop_temp; /* rw: Temporary Stack reg */
volatile unsigned char siop_lcrc; /* rw: LCRC value */
volatile unsigned char siop_ctest8; /* rw: Chip test register 8 */
volatile unsigned char siop_istat; /* rw: Interrupt Status reg */
volatile unsigned char siop_dfifo; /* rw: DMA FIFO */
volatile unsigned char siop_dcmd; /* rw: DMA Command Register */
volatile unsigned char siop_dbc2; /* rw: DMA Byte Counter reg */
volatile unsigned char siop_dbc1;
volatile unsigned char siop_dbc0;
volatile unsigned long siop_dnad; /* rw: DMA Next Address */
volatile unsigned long siop_dsp; /* rw: DMA SCRIPTS Pointer reg */
volatile unsigned long siop_dsps; /* rw: DMA SCRIPTS Pointer Save reg */
volatile unsigned long siop_scratch; /* rw: Scratch Register */
volatile unsigned char siop_dcntl; /* rw: DMA Control reg */
volatile unsigned char siop_dwt; /* rw: DMA Watchdog Timer */
volatile unsigned char siop_dien; /* rw: DMA Interrupt Enable */
volatile unsigned char siop_dmode; /* rw: DMA Mode reg */
volatile unsigned long siop_addr;
} siop_regmap_t;
/*
* Register defines
*/
/* Scsi control register 0 (scntl0) */
#define SIOP_SCNTL0_ARB 0xc0 /* Arbitration mode */
# define SIOP_ARB_SIMPLE 0x00
# define SIOP_ARB_FULL 0xc0
#define SIOP_SCNTL0_START 0x20 /* Start Sequence */
#define SIOP_SCNTL0_WATN 0x10 /* (Select) With ATN */
#define SIOP_SCNTL0_EPC 0x08 /* Enable Parity Checking */
#define SIOP_SCNTL0_EPG 0x04 /* Enable Parity Generation */
#define SIOP_SCNTL0_AAP 0x02 /* Assert ATN on Parity Error */
#define SIOP_SCNTL0_TRG 0x01 /* Target Mode */
/* Scsi control register 1 (scntl1) */
#define SIOP_SCNTL1_EXC 0x80 /* Extra Clock Cycle of data setup */
#define SIOP_SCNTL1_ADB 0x40 /* Assert Data Bus */
#define SIOP_SCNTL1_ESR 0x20 /* Enable Selection/Reselection */
#define SIOP_SCNTL1_CON 0x10 /* Connected */
#define SIOP_SCNTL1_RST 0x08 /* Assert RST */
#define SIOP_SCNTL1_PAR 0x04 /* Force bad Parity */
#define SIOP_SCNTL1_SND 0x02 /* Start Send operation */
#define SIOP_SCNTL1_RCV 0x01 /* Start Receive operation */
/* Scsi interrupt enable register (sien) */
#define SIOP_SIEN_M_A 0x80 /* Phase Mismatch or ATN active */
#define SIOP_SIEN_FC 0x40 /* Function Complete */
#define SIOP_SIEN_STO 0x20 /* (Re)Selection timeout */
#define SIOP_SIEN_SEL 0x10 /* (Re)Selected */
#define SIOP_SIEN_SGE 0x08 /* SCSI Gross Error */
#define SIOP_SIEN_UDC 0x04 /* Unexpected Disconnect */
#define SIOP_SIEN_RST 0x02 /* RST asserted */
#define SIOP_SIEN_PAR 0x01 /* Parity Error */
/* Scsi chip ID (scid) */
#define SIOP_SCID_VALUE(i) (1<<i)
/* Scsi transfer register (sxfer) */
#define SIOP_SXFER_DHP 0x80 /* Disable Halt on Parity error/ ATN asserted */
#define SIOP_SXFER_TP 0x70 /* Synch Transfer Period */
/* see specs for formulas:
Period = TCP * (4 + XFERP )
TCP = 1 + CLK + 1..2;
*/
#define SIOP_SXFER_MO 0x0f /* Synch Max Offset */
# define SIOP_MAX_OFFSET 8
/* Scsi output data latch register (sodl) */
/* Scsi output control latch register (socl) */
#define SIOP_REQ 0x80 /* SCSI signal <x> asserted */
#define SIOP_ACK 0x40
#define SIOP_BSY 0x20
#define SIOP_SEL 0x10
#define SIOP_ATN 0x08
#define SIOP_MSG 0x04
#define SIOP_CD 0x02
#define SIOP_IO 0x01
#define SIOP_PHASE(socl) SCSI_PHASE(socl)
/* Scsi first byte received register (sfbr) */
/* Scsi input data latch register (sidl) */
/* Scsi bus data lines register (sbdl) */
/* Scsi bus control lines register (sbcl). Same as socl */
/* DMA status register (dstat) */
#define SIOP_DSTAT_DFE 0x80 /* DMA FIFO empty */
#define SIOP_DSTAT_RES 0x60
#define SIOP_DSTAT_ABRT 0x10 /* Aborted */
#define SIOP_DSTAT_SSI 0x08 /* SCRIPT Single Step */
#define SIOP_DSTAT_SIR 0x04 /* SCRIPT Interrupt Instruction */
#define SIOP_DSTAT_WTD 0x02 /* Watchdog Timeout Detected */
#define SIOP_DSTAT_OPC 0x01 /* Invalid SCRIPTS Opcode */
/* Scsi status register 0 (sstat0) */
#define SIOP_SSTAT0_M_A 0x80 /* Phase Mismatch or ATN active */
#define SIOP_SSTAT0_FC 0x40 /* Function Complete */
#define SIOP_SSTAT0_STO 0x20 /* (Re)Selection timeout */
#define SIOP_SSTAT0_SEL 0x10 /* (Re)Selected */
#define SIOP_SSTAT0_SGE 0x08 /* SCSI Gross Error */
#define SIOP_SSTAT0_UDC 0x04 /* Unexpected Disconnect */
#define SIOP_SSTAT0_RST 0x02 /* RST asserted */
#define SIOP_SSTAT0_PAR 0x01 /* Parity Error */
/* Scsi status register 1 (sstat1) */
#define SIOP_SSTAT1_ILF 0x80 /* Input latch (sidl) full */
#define SIOP_SSTAT1_ORF 0x40 /* output reg (sodr) full */
#define SIOP_SSTAT1_OLF 0x20 /* output latch (sodl) full */
#define SIOP_SSTAT1_AIP 0x10 /* Arbitration in progress */
#define SIOP_SSTAT1_LOA 0x08 /* Lost arbitration */
#define SIOP_SSTAT1_WOA 0x04 /* Won arbitration */
#define SIOP_SSTAT1_RST 0x02 /* SCSI RST current value */
#define SIOP_SSTAT1_SDP 0x01 /* SCSI SDP current value */
/* Scsi status register 2 (sstat2) */
#define SIOP_SSTAT2_FF 0xf0 /* SCSI FIFO flags (bytecount) */
# define SIOP_SCSI_FIFO_DEEP 8
#define SIOP_SSTAT2_SDP 0x08 /* Latched (on REQ) SCSI SDP */
#define SIOP_SSTAT2_MSG 0x04 /* Latched SCSI phase */
#define SIOP_SSTAT2_CD 0x02
#define SIOP_SSTAT2_IO 0x01
/* Chip test register 0 (ctest0) */
#define SIOP_CTEST0_RES 0xfc
#define SIOP_CTEST0_RTRG 0x02 /* Real Target mode */
#define SIOP_CTEST0_DDIR 0x01 /* Xfer direction (1-> from SCSI bus) */
/* Chip test register 1 (ctest1) */
#define SIOP_CTEST1_FMT 0xf0 /* Byte empty in DMA FIFO bottom (high->byte3) */
#define SIOP_CTEST1_FFL 0x0f /* Byte full in DMA FIFO top, same */
/* Chip test register 2 (ctest2) */
#define SIOP_CTEST2_RES 0xc0
#define SIOP_CTEST2_SOFF 0x20 /* Synch Offset compare (1-> zero Init, max Tgt */
#define SIOP_CTEST2_SFP 0x10 /* SCSI FIFO Parity */
#define SIOP_CTEST2_DFP 0x08 /* DMA FIFO Parity */
#define SIOP_CTEST2_TEOP 0x04 /* True EOP (a-la 5380) */
#define SIOP_CTEST2_DREQ 0x02 /* DREQ status */
#define SIOP_CTEST2_DACK 0x01 /* DACK status */
/* Chip test register 3 (ctest3) read-only, top of SCSI FIFO */
/* Chip test register 4 (ctest4) */
#define SIOP_CTEST4_RES 0x80
#define SIOP_CTEST4_ZMOD 0x40 /* High-impedance outputs */
#define SIOP_CTEST4_SZM 0x20 /* ditto, SCSI "outputs" */
#define SIOP_CTEST4_SLBE 0x10 /* SCSI loobpack enable */
#define SIOP_CTEST4_SFWR 0x08 /* SCSI FIFO write enable (from sodl) */
#define SIOP_CTEST4_FBL 0x07 /* DMA FIFO Byte Lane select (from ctest6)
4->0, .. 7->3 */
/* Chip test register 5 (ctest5) */
#define SIOP_CTEST5_ADCK 0x80 /* Clock Address Incrementor */
#define SIOP_CTEST5_BBCK 0x40 /* Clock Byte counter */
#define SIOP_CTEST5_ROFF 0x20 /* Reset SCSI offset */
#define SIOP_CTEST5_MASR 0x10 /* Master set/reset pulses (of bits 3-0) */
#define SIOP_CTEST5_DDIR 0x08 /* (re)set internal DMA direction */
#define SIOP_CTEST5_EOP 0x04 /* (re)set internal EOP */
#define SIOP_CTEST5_DREQ 0x02 /* (re)set internal REQ */
#define SIOP_CTEST5_DACK 0x01 /* (re)set internal ACK */
/* Chip test register 6 (ctest6) DMA FIFO access */
/* Chip test register 7 (ctest7) */
#define SIOP_CTEST7_RES 0xe0
#define SIOP_CTEST7_STD 0x10 /* Disable selection timeout */
#define SIOP_CTEST7_DFP 0x08 /* DMA FIFO parity bit */
#define SIOP_CTEST7_EVP 0x04 /* Even parity (to host bus) */
#define SIOP_CTEST7_DC 0x02 /* Drive DC pin low on SCRIPT fetches */
#define SIOP_CTEST7_DIFF 0x01 /* Differential mode */
/* DMA FIFO register (dfifo) */
#define SIOP_DFIFO_FLF 0x80 /* Flush (spill) DMA FIFO */
#define SIOP_DFIFO_CLF 0x40 /* Clear DMA and SCSI FIFOs */
#define SIOP_DFIFO_BO 0x3f /* FIFO byte offset counter */
/* Interrupt status register (istat) */
#define SIOP_ISTAT_ABRT 0x80 /* Abort operation */
#define SIOP_ISTAT_RES 0x70
#define SIOP_ISTAT_CON 0x08 /* Connected */
#define SIOP_ISTAT_PRE 0x04 /* Pointer register empty */
#define SIOP_ISTAT_SIP 0x02 /* SCSI Interrupt pending */
#define SIOP_ISTAT_DIP 0x01 /* DMA Interrupt pending */
/* DMA Mode register (dmode) */
#define SIOP_DMODE_BL_MASK 0xc0 /* 0->1 1->2 2->4 3->8 */
#define SIOP_DMODE_BW16 0x20 /* Bus Width is 16 bits */
#define SIOP_DMODE_286 0x10 /* 286 mode */
#define SIOP_DMODE_IO_M 0x08 /* xfer data to memory or I/O space */
#define SIOP_DMODE_FAM 0x04 /* fixed address mode */
#define SIOP_DMODE_PIPE 0x02 /* SCRIPTS in Pipeline mode */
#define SIOP_DMODE_MAN 0x01 /* SCRIPTS in Manual start mode */
/* DMA interrupt enable register (dien) */
#define SIOP_DIEN_RES 0xe0
#define SIOP_DIEN_ABRT 0x10 /* On Abort */
#define SIOP_DIEN_SSI 0x08 /* On SCRIPTS sstep */
#define SIOP_DIEN_SIR 0x04 /* On SCRIPTS intr instruction */
#define SIOP_DIEN_WTD 0x02 /* On watchdog timeout */
#define SIOP_DIEN_OPC 0x01 /* On SCRIPTS illegal opcode */
/* DMA control register (dcntl) */
#define SIOP_DCNTL_CF_MASK 0xc0 /* Clock frequency dividers:
0 --> 37.51..50.00 Mhz, div=2
1 --> 25.01..37.50 Mhz, div=1.5
2 --> 16.67..25.00 Mhz, div=1
3 --> reserved
*/
#define SIOP_DCNTL_S16 0x20 /* SCRIPTS fetches 16bits at a time */
#define SIOP_DCNTL_SSM 0x10 /* Single step mode */
#define SIOP_DCNTL_LLM 0x08 /* Enable Low-level mode */
#define SIOP_DCNTL_STD 0x04 /* Start SCRIPTS operation */
#define SIOP_DCNTL_RES 0x02
#define SIOP_DCNTL_RST 0x01 /* Software reset */
/* psns/pctl phase lines as bits */
#define PHASE_MSG 0x04
#define PHASE_CD 0x02 /* =1 if 'command' */
#define PHASE_IO 0x01 /* =1 if data inbound */
/* Phase lines as values */
#define PHASE 0x07 /* mask for psns/pctl phase */
#define DATA_OUT_PHASE 0x00
#define DATA_IN_PHASE 0x01
#define CMD_PHASE 0x02
#define STATUS_PHASE 0x03
#define BUS_FREE_PHASE 0x04
#define ARB_SEL_PHASE 0x05 /* Fuji chip combines arbitration with sel. */
#define MESG_OUT_PHASE 0x06
#define MESG_IN_PHASE 0x07
/* SCSI Messages */
#define MSG_CMD_COMPLETE 0x00
#define MSG_EXT_MESSAGE 0x01
#define MSG_SAVE_DATA_PTR 0x02
#define MSG_RESTORE_PTR 0x03
#define MSG_DISCONNECT 0x04
#define MSG_INIT_DETECT_ERROR 0x05
#define MSG_ABORT 0x06
#define MSG_REJECT 0x07
#define MSG_NOOP 0x08
#define MSG_PARITY_ERROR 0x09
#define MSG_BUS_DEVICE_RESET 0x0C
#define MSG_IDENTIFY 0x80
#define MSG_IDENTIFY_DR 0xc0 /* (disconnect/reconnect allowed) */
#define MSG_SYNC_REQ 0x01
/* SCSI Commands */
#define CMD_TEST_UNIT_READY 0x00
#define CMD_REQUEST_SENSE 0x03
#define CMD_INQUIRY 0x12
#define CMD_SEND_DIAGNOSTIC 0x1D
#define CMD_REWIND 0x01
#define CMD_FORMAT_UNIT 0x04
#define CMD_READ_BLOCK_LIMITS 0x05
#define CMD_REASSIGN_BLOCKS 0x07
#define CMD_READ 0x08
#define CMD_WRITE 0x0A
#define CMD_WRITE_FILEMARK 0x10
#define CMD_SPACE 0x11
#define CMD_MODE_SELECT 0x15
#define CMD_RELEASE_UNIT 0x17
#define CMD_ERASE 0x19
#define CMD_MODE_SENSE 0x1A
#define CMD_LOADUNLOAD 0x1B
#define CMD_RECEIVE_DIAG 0x1C
#define CMD_SEND_DIAG 0x1D
#define CMD_P_A_MEDIA_REMOVAL 0x1E
#define CMD_READ_CAPACITY 0x25
#define CMD_READ_EXT 0x28
#define CMD_WRITE_EXT 0x2A
#define CMD_READ_DEFECT_DATA 0x37
#define SD_MANUFAC_DEFECTS 0x14000000
#define SD_GROWN_DEFECTS 0x0c000000
#define CMD_READ_BUFFER 0x3B
#define CMD_WRITE_BUFFER 0x3C
#define CMD_READ_FULL 0xF0
#define CMD_MEDIA_TEST 0xF1
#define CMD_ACCESS_LOG 0xF2
#define CMD_WRITE_FULL 0xFC
#define CMD_MANAGE_PRIMARY 0xFD
#define CMD_EXECUTE_DATA 0xFE
/* SCSI status bits */
#define STS_CHECKCOND 0x02 /* Check Condition (ie., read sense) */
#define STS_CONDMET 0x04 /* Condition Met (ie., search worked) */
#define STS_BUSY 0x08
#define STS_INTERMED 0x10 /* Intermediate status sent */
#define STS_EXT 0x80 /* Extended status valid */
/* command descriptor blocks */
struct scsi_cdb6 {
u_char cmd; /* command code */
u_char lun: 3, /* logical unit on ctlr */
lbah: 5; /* msb of read/write logical block addr */
u_char lbam; /* middle byte of l.b.a. */
u_char lbal; /* lsb of l.b.a. */
u_char len; /* transfer length */
u_char xtra;
};
struct scsi_cdb10 {
u_char cmd; /* command code */
u_char lun: 3, /* logical unit on ctlr */
: 4,
rel: 1; /* l.b.a. is relative addr if =1 */
u_char lbah; /* msb of read/write logical block addr */
u_char lbahm; /* high middle byte of l.b.a. */
u_char lbalm; /* low middle byte of l.b.a. */
u_char lbal; /* lsb of l.b.a. */
u_char reserved;
u_char lenh; /* msb transfer length */
u_char lenl; /* lsb transfer length */
u_char xtra;
};
/* basic sense data */
struct scsi_sense {
u_char valid: 1, /* l.b.a. is valid */
class: 3,
code: 4;
u_char vu: 4, /* vendor unique */
lbah: 4;
u_char lbam;
u_char lbal;
};
struct scsi_xsense {
u_char valid: 1, /* l.b.a. is valid */
class: 3,
code: 4;
u_char segment;
u_char filemark: 1,
eom: 1,
ili: 1, /* illegal length indicator */
rsvd: 1,
key: 4;
u_char info1;
u_char info2;
u_char info3;
u_char info4;
u_char len; /* additional sense length */
};
/* inquiry data */
struct scsi_inquiry {
u_char type;
u_char qual;
u_char version;
u_char rsvd;
u_char len;
char class[3];
char vendor_id[8];
char product_id[16];
char rev[4];
};
struct scsi_format_parms { /* physical BFI format */
u_short reserved;
u_short list_len;
struct defect {
unsigned cyl : 24;
unsigned head : 8;
long bytes_from_index;
} defect[127];
} format_parms;
struct scsi_reassign_parms {
u_short reserved;
u_short list_len; /* length in bytes of defects only */
struct new_defect {
unsigned lba; /* logical block address */
} new_defect[2];
} reassign_parms;
struct scsi_modesel_hdr {
u_char rsvd1;
u_char media_type;
u_char rsvd2;
u_char block_desc_len;
u_int density : 8;
u_int number_blocks :24;
u_int rsvd3 : 8;
u_int block_length :24;
};
struct scsi_modesense_hdr {
u_char len;
u_char media_type;
u_char wp : 1;
u_char rsvd1 : 7;
u_char block_desc_len;
u_int density : 8;
u_int number_blocks :24;
u_int rsvd2 : 8;
u_int block_length :24;
};
/*
* Mode Select / Mode sense "pages"
*/
/*
* Page One - Error Recovery Parameters
*/
struct scsi_err_recovery {
u_char page_savable : 1; /* save parameters */
u_char reserved : 1;
u_char page_code : 6; /* = 0x01 */
u_char page_length; /* = 6 */
u_char awre : 1; /* auto write realloc enabled */
u_char arre : 1; /* auto read realloc enabled */
u_char tb : 1; /* transfer block */
u_char rc : 1; /* read continuous */
u_char eec : 1; /* enable early correction */
u_char per : 1; /* post error */
u_char dte : 1; /* disable transfer on error */
u_char dcr : 1; /* disable correction */
u_char retry_count;
u_char correction_span;
u_char head_offset_count;
u_char strobe_offset_count;
u_char recovery_time_limit;
};
/*
* Page Two - Disconnect / Reconnect Control Parameters
*/
struct scsi_disco_reco {
u_char page_savable : 1; /* save parameters */
u_char rsvd : 1;
u_char page_code : 6; /* = 0x02 */
u_char page_length; /* = 10 */
u_char buffer_full_ratio; /* write, how full before reconnect? */
u_char buffer_empty_ratio; /* read, how full before reconnect? */
u_short bus_inactivity_limit; /* how much bus time for busy */
u_short disconnect_time_limit; /* min to remain disconnected */
u_short connect_time_limit; /* min to remain connected */
u_short reserved_1;
};
/*
* Page Three - Direct Access Device Format Parameters
*/
struct scsi_format {
u_char page_savable : 1; /* save parameters */
u_char rsvd : 1;
u_char page_code : 6; /* = 0x03 */
u_char page_length; /* = 22 */
u_short tracks_per_zone; /* Handling of Defects Fields */
u_short alt_sect_zone;
u_short alt_tracks_zone;
u_short alt_tracks_vol;
u_short sect_track; /* Track Format Field */
u_short data_sect; /* Sector Format Fields */
u_short interleave;
u_short track_skew_factor;
u_short cyl_skew_factor;
u_char ssec : 1; /* Drive Type Field */
u_char hsec : 1;
u_char rmb : 1;
u_char surf : 1;
u_char ins : 1;
u_char reserved_1 : 3;
u_char reserved_2;
u_char reserved_3;
u_char reserved_4;
};
/*
* Page Four - Rigid Disk Drive Geometry Parameters
*/
struct scsi_geometry {
u_char page_savable : 1; /* save parameters */
u_char rsvd : 1;
u_char page_code : 6; /* = 0x04 */
u_char page_length; /* = 18 */
u_char cyl_ub; /* number of cylinders */
u_char cyl_mb;
u_char cyl_lb;
u_char heads; /* number of heads */
u_char precomp_cyl_ub; /* cylinder to start precomp */
u_char precomp_cyl_mb;
u_char precomp_cyl_lb;
u_char current_cyl_ub; /* cyl to start reduced current */
u_char current_cyl_mb;
u_char current_cyl_lb;
u_short step_rate; /* drive step rate */
u_char landing_cyl_ub; /* landing zone cylinder */
u_char landing_cyl_mb;
u_char landing_cyl_lb;
u_char reserved_1;
u_char reserved_2;
u_char reserved_3;
};
/*
* Page 0x38 - Cache Control Parameters
*/
struct scsi_cache {
u_char page_savable : 1; /* save parameters */
u_char rsvd : 1;
u_char page_code : 6; /* = 0x38 */
u_char page_length; /* = 14 */
u_char rsvd_1 : 1;
u_char wie : 1; /* write index enable */
u_char rsvd_2 : 1;
u_char ce : 1; /* cache enable */
u_char table_size : 4;
u_char prefetch_threshold;
u_char maximum_threshold;
u_char maximumprefetch_multiplier;
u_char minimum_threshold;
u_char minimum_prefetch_multiplier;
u_char reserved[8];
};
/*
* Driver ioctl's for various scsi operations.
*/
#ifndef _IOCTL_
#include "ioctl.h"
#endif
/*
* Control for SCSI "format" mode.
*
* "Format" mode allows a privileged process to issue direct SCSI
* commands to a drive (it is intended primarily to allow on-line
* formatting). SDIOCSFORMAT with a non-zero arg will put the drive
* into format mode; a zero arg will take it out. When in format
* mode, only the process that issued the SDIOCFORMAT can read or
* write the drive.
*
* In format mode, process is expected to
* - do SDIOCSCSICOMMAND to supply cdb for next SCSI op
* - do read or write as appropriate for cdb
* - if i/o error, optionally do SDIOCSENSE to get completion
* status and sense data from last scsi operation.
*/
struct scsi_fmt_cdb {
int len; /* cdb length (in bytes) */
u_char cdb[28]; /* cdb to use on next read/write */
};
struct scsi_fmt_sense {
u_int status; /* completion status of last op */
u_char sense[28]; /* sense data (if any) from last op */
};
#define SDIOCSFORMAT _IOW('S', 0x1, int)
#define SDIOCGFORMAT _IOR('S', 0x2, int)
#define SDIOCSCSICOMMAND _IOW('S', 0x3, struct scsi_fmt_cdb)
#define SDIOCSENSE _IOR('S', 0x4, struct scsi_fmt_sense)
extern void siopreset (int unit);
extern void siopstart (int unit);
extern int siopgo (int ctlr, int slave, int unit, struct buf *bp, struct scsi_fmt_cdb *cdb, int pad);
extern void siopdone (int unit);
#if 0
extern int siopintr2 (int unit);
#else
extern int siopintr2 (void);
#endif

94
sys/arch/amiga/dev/siopvar.h Normal file
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@ -0,0 +1,94 @@
/*
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* Van Jacobson of Lawrence Berkeley Laboratory.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)siopvar.h 7.1 (Berkeley) 5/8/90
*/
struct siop_ds { /* Data Structure */
long scsi_addr; /* SCSI ID & sync */
long idlen; /* Identify message */
char *idbuf;
long cmdlen; /* SCSI command */
char *cmdbuf;
long stslen; /* Status */
char *stsbuf;
long msglen; /* Message */
char *msgbuf;
long sdtrolen; /* Sync Data Transfer Request out */
char *sdtrobuf;
long sdtrilen; /* Sync Data Transfer Request in */
char *sdtribuf;
struct {
long datalen;
char *databuf;
} chain[MAXPHYS/NBPG+1];
};
struct siop_softc {
struct amiga_ctlr *sc_ac;
struct devqueue sc_dq;
struct devqueue sc_sq;
/* should have one for each target? */
u_char sc_istat;
u_char sc_dstat;
u_char sc_sstat0;
u_char sc_sstat1;
struct siop_ds sc_ds;
u_char sc_flags;
u_char sc_lun;
u_long sc_clock_freq;
/* one for each target */
struct syncpar {
u_char state;
u_char period, offset;
} sc_sync[8];
u_char sc_slave;
u_char sc_scsi_addr;
u_char sc_stat[2];
u_char sc_msg[8];
};
/* sc_flags */
#define SIOP_DMA 0x80 /* DMA I/O in progress */
#define SIOP_ALIVE 0x01 /* controller initialized */
#define SIOP_SELECTED 0x04 /* bus is in selected state. Needed for
correct abort procedure. */
/* sync states */
#define SYNC_START 0 /* no sync handshake started */
#define SYNC_SENT 1 /* we sent sync request, no answer yet */
#define SYNC_DONE 2 /* target accepted our (or inferior) settings,
or it rejected the request and we stay async */

532
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# This is a shell archive. Save it in a file, remove anything before
# this line, and then unpack it by entering "sh file". Note, it may
# create directories; files and directories will be owned by you and
# have default permissions.
#
# This archive contains:
#
# Makefile
# st.4
# st.0
#
echo x - Makefile
sed 's/^X//' >Makefile << 'END-of-Makefile'
X#
X# @(#)Makefile 5.15 (Berkeley) 5/27/92
X#
X
XBINGRP= kmem
XBINOWN= root
XBINMODE=755
XMAN4 = st.0
X
X.include <bsd.prog.mk>
X
X
END-of-Makefile
echo x - st.4
sed 's/^X//' >st.4 << 'END-of-st.4'
X.\" Copyright (c) 1990, 1991 The Regents of the University of California.
X.\" All rights reserved.
X.\"
X.\" This code is derived from software contributed to Berkeley by
X.\" the Systems Programming Group of the University of Utah Computer
X.\" Science Department.
X.\"
X.\" Redistribution and use in source and binary forms, with or without
X.\" modification, are permitted provided that the following conditions
X.\" are met:
X.\" 1. Redistributions of source code must retain the above copyright
X.\" notice, this list of conditions and the following disclaimer.
X.\" 2. Redistributions in binary form must reproduce the above copyright
X.\" notice, this list of conditions and the following disclaimer in the
X.\" documentation and/or other materials provided with the distribution.
X.\" 3. All advertising materials mentioning features or use of this software
X.\" must display the following acknowledgement:
X.\" This product includes software developed by the University of
X.\" California, Berkeley and its contributors.
X.\" 4. Neither the name of the University nor the names of its contributors
X.\" may be used to endorse or promote products derived from this software
X.\" without specific prior written permission.
X.\"
X.\" THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
X.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
X.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
X.\" ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
X.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
X.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
X.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
X.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
X.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
X.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
X.\" SUCH DAMAGE.
X.\"
X.\" from: @(#)st.4 5.3 (Berkeley) 7/31/91
X.\" $Id: st-man,v 1.1 1994/01/26 21:06:24 mw Exp $
X.\"
X.Dd November 27, 1993
X.Dt ST 4 amiga
X.Os
X.Sh NAME
X.Nm \&st
X.Nd
X.Tn CCS SCSI
Xtape driver
X.Sh SYNOPSIS
X.Cd "tape st0 at scsi? slave ?"
X.Sh DESCRIPTION
XThe
X.Nm \&st
Xdriver was written especially to support the Exabyte
X.Tn EXB-8200 8MM
XCartridge
XTape Subsystem. It has several extensions specific to the Exabyte,
Xbut should support other tape drives as long as they follow
Xthe
X.Tn ANSI SCSI-I
Xspecification. Besides extensive use with
Xan Exabyte 8200, the driver has been tested with an
XArchive
X.Tn QIC-24
Xtape drive, an Archive
X.Tn Viper QIC-150
X, an Archive
X.Tn Viper 2525,
Xan Archive
X.Tn Python 27216 and 25501,
Xa Caliper
X.Tn CP150,
Xa HP35450A,
Xa Wangtek
X.Tn 5150ES,
Xa Wangtek 5099ES,
Xand a Wangtek 5150ES, which is also currently the default drive type.
XThe
X.Nm \&st
Xtape interface provides a standard tape drive interface
Xas described in
X.Xr mtio 4
Xwith the following exceptions:
X.Bl -enum
X.It
XDensity is dependent on device type. Current Exabyte hardware has
Xonly one density. The
X.Tn EXB-8500
Xdrive, when released, will have a high
Xdensity format of
X.Tn 5.6GB .
XOn an Archive
X.Tn QIC-24
Xdrive the driver reads both
X.Tn QIC-11
Xand
X.Tn QIC-24
Xformats
Xbut writes only
X.Tn QIC-24. On an Archive
X.Tn Viper QIC-150
Xdrive the driver reads and writes only
X.Tn QIC-150
Xformats, it should also be able to read
X.Tn QIC-11
Xand
X.Tn QIC-24
Xbut this has not been verified.
XOn an Archive
X.Tn Viper 2525
Xthe drive can read and write
X.Tn QIC-525, QIC-150, QIC-120
Xand can also read
X.Tn QIC-24
Xtapes.
X.It
XOnly the ``raw'' interface is supported.
X.El
X.Pp
XSpecial Exabyte Support:
X.Pp
XThe
X.Dv MTIOCGET
X.Xr ioctl 2
Xcall on an Exabyte returns this structure:
X.Bd -literal
Xstruct mtget {
X short mt_type; /* type of magtape device */
X /* the following two registers are grossly device dependent */
X short mt_dsreg; /* sc_flags, ``drive status'' register */
X short mt_erreg; /* high 8 bytes error status, ``error'' register */
X /* low 8 bytes percentage of Rewrites
X if writing, ECC errors if reading */
X /* end device-dependent registers */
X short mt_resid; /* Mbyte until end of tape ,residual count */
X /* the following two are not yet implemented */
X daddr_t mt_fileno; /* file number of current position */
X daddr_t mt_blkno; /* block number of current position */
X /* end not yet implemented */
X};
X
X
X.Ed
X.Pp
XBits 3 and 4 in the minor device are used to select tape density.
XOften when these bits are zero, as in the case of the Archive
X.Tn Viper 2525,
Xthe drive will automatically determine the tape type and
Xformat when reading. When writing should these bits be zero, the drive
Xwill write the highest valid density for a given tape type. For the Archive
X.Tn Viper 2525
Xusing unit 0 with density = 0x01, which is /dev/rst8 assumes the tape is a QIC-24,
Xdensity = 0x10 which is /dev/rst16 assumes the tape is a QIC-120,
Xdensity = 0x11 which is /dev/rst24 assumes the tape is a QIC-150,
Xdensity = 0x00 which is /dev/rst0 will allow the use of a QIC-525 with a 6525 tape.
XThis density mapping will vary depending on the drive
Xtype.
X
XBit 5 in the minor device number is used
Xto select long filemarks or short filemarks. A long filemark occupies
X2.12 MBytes of space on the tape, while a short filemark occupies 488 KBytes.
XA long filemark includes an erase gap while the short filemark does not.
XThe tape can be positioned on the
X.Tn BOT
Xside of a long filemark allowing
Xdata to be appended with a write operation. Since the short filemark does not
Xcontain an erase gap which would allow writing it is considered to be
Xnon-erasable. If either type of filemark is followed by blank tape,
Xdata may be appended on its
X.Tn EOT
Xside.
X.Pp
XBit 6 in the minor device number selects fixed block mode with a block
Xsize of 1K. Variable length records are the default if bit 6 is not
Xset.
X.Pp
XFor unit 0 here are the effects of minor device bits 2,3,4,5,6. For other
Xunits add the
X.Em unit#
Xto each of the device names.
X.Bl -column norewind density0 density1 filemarks fixed-block -offset indent
X.Em norewind short fixed-block
X.Em density0 density1 filemarks mode
Xrst0
Xnrst0 X
Xrst8 X
Xnrst8 X X
Xrst16 X
Xnrst16 X X
Xrst24 X X
Xnrst24 X X X
Xrst32 X
Xnrst32 X X
Xrst40 X X
Xnrst40 X X X
Xrst48 X X
Xnrst48 X X X
Xrst56 X X X
Xnrst56 X X X X
Xrst64 X
Xnrst64 X X
Xrst72 X X
Xnrst72 X X X
Xrst80 X X
Xnrst80 X X X
Xrst88 X X X
Xnrst88 X X X X
Xrst96 X X
Xnrst96 X X X
Xrst104 X X X
Xnrst104 X X X X
Xrst112 X X X
Xnrst112 X X X X
Xrst120 X X X X
Xnrst120 X X X X X
X.El
X.Sh SEE ALSO
X.Xr mt 1 ,
X.Xr tar 1 ,
X.Xr mtio 4 ,
X.Rs
X.%T EXB-8200 8MM Cartridge Tape Subsystem Interface User Manual.
X.Re
X.Sh HISTORY
XThe
X.Nm \&st
Xdriver was derived from the hp300 st.c tape driver in June of 1993.
X.Sh BUGS
XThe
X.Tn HP
X98268
X.Tn SCSI
Xcontroller hardware can not do odd length
X.Tn DMA
Xtransfers. If odd length
X.Tn DMA I/O
Xis requested the driver will use the
X"Program Transfer Mode" of the Fujitsu
X.Tn MB87030
Xchip. Read requests are
Xnormally even length for which a
X.Tn DMA
Xtransfer is used. If, however, the
Xdriver detects that a odd length read has happened (when a even length
Xwas requested) it will issue the
X.Dv EIO
Xerror and the last byte of the read
Xdata will be 0x00. Odd length read requests must match the size of the
Xrequested data block on tape.
X.Pp
XThe following only applies when using long filemarks. Short filemarks can
Xnot be overwritten.
X.Bd -filled -offset 4n
XDue to the helical scan and the erase mechanism, there is a writing
Xlimitation on Exabyte drives.
X.Dq Li tar r
Xor
X.Dq Li tar u
Xwill not work
X.Pf ( Dq Li tar c
Xis ok). One can only start writing at 1) beginning of tape, 2) on the
Xend of what was last written, 3) "front" side of a regular (long) filemark.
XSay you have a tape with 3 tar files on it, want to save the first
Xfile, and want to begin writing over the 2nd file.
X.Pp
XOn a normal 1/4" or 1/2" drive you would do:
X.Pp
X.Li "mt fsf 1; tar cf /dev/nrst0 ..."
X.Pp
Xbut for an Exabyte you need to do:
X.Pp
X.Li "mt fsf 1; mt bsf 1; mt weof 1; tar cf /dev/nrst0 ..."
X.Pp
XThe regular long filemark consists of an erased zone 3.8" long
X(needed to begin a write). In this case, the first filemark is
Xrewritten in place, which creates an erased zone
X.Em after
Xit, clearing the
Xway to write more on the tape. The erase head is not helical.
X.Pp
XOne can position a tape to the end of what was last written by reading
Xuntil a
X.Tn \*qBLANK CHECK\*q
Xerror is returned. Writing can be started at this
Xpoint. (This applies to both long and short filemarks.) The tape does
Xnot become positioned somewhere down the "erased" area as does a
Xconventional magtape. One can issue multiple reads at the
X.Tn \*qBLANK CHECK\*q
Xerror, but the Exabyte stays positioned at the beginning of the
Xblank area, ready to accept write commands. File skip operations do
Xnot stop at blank tape and will run into old data or run to the end of
Xthe tape, so you have to be careful not to
X.Dq Li mt fsf too_many .
X.Ed
X.Pp
XArchive support gets confused if asked to moved more filemarks than there are
Xon the tape.
X.Pp
XThis man page needs some work. Some of these are not really bugs,
Xjust unavoidable consequences of the hardware.
X.Pp
XAmiga specific controller comments should be added and HP specific comments removed after we determine any SCSI controller specific problems.
END-of-st.4
echo x - st.0
sed 's/^X//' >st.0 << 'END-of-st.0'
XST(4) BSD Programmer's Manual ST(4)
X
XNNAAMMEE
X sstt - CCS SCSI tape driver
X
XSSYYNNOOPPSSIISS
X ttaappee sstt00 aatt ssccssii?? ssllaavvee ??
X
XDDEESSCCRRIIPPTTIIOONN
X The sstt driver was written especially to support the Exabyte EXB-8200 8MM
X Cartridge Tape Subsystem. It has several extensions specific to the Ex-
X abyte, but should support other tape drives as long as they follow the
X ANSI SCSI-I specification. Besides extensive use with an Exabyte 8200,
X the driver has been tested with an Archive QIC-24 tape drive, an Archive
X Viper QIC-150 , an Archive Viper 2525, an Archive Python 27216 and 25501,
X a Caliper CP150, a HP35450A, a Wangtek 5150ES, a Wangtek 5099ES, and a
X Wangtek 5150ES, which is also currently the default drive type. The sstt
X tape interface provides a standard tape drive interface as described in
X mtio(4) with the following exceptions:
X
X 1. Density is dependent on device type. Current Exabyte hardware has
X only one density. The EXB-8500 drive, when released, will have a
X high density format of 5.6GB. On an Archive QIC-24 drive the driver
X reads both QIC-11 and QIC-24 formats but writes only QIC-24. On an
X Archive Viper QIC-150 drive the driver reads and writes only QIC-150
X formats, it should also be able to read QIC-11 and QIC-24 but this
X has not been verified. On an Archive Viper 2525 the drive can read
X and write QIC-525, QIC-150, QIC-120 and can also read QIC-24 tapes.
X
X 2. Only the ``raw'' interface is supported.
X
X Special Exabyte Support:
X
X The MTIOCGET ioctl(2) call on an Exabyte returns this structure:
X
X struct mtget {
X short mt_type; /* type of magtape device */
X /* the following two registers are grossly device dependent */
X short mt_dsreg; /* sc_flags, ``drive status'' register */
X short mt_erreg; /* high 8 bytes error status, ``error'' register */
X /* low 8 bytes percentage of Rewrites
X if writing, ECC errors if reading */
X /* end device-dependent registers */
X short mt_resid; /* Mbyte until end of tape ,residual count */
X /* the following two are not yet implemented */
X daddr_t mt_fileno; /* file number of current position */
X daddr_t mt_blkno; /* block number of current position */
X /* end not yet implemented */
X };
X
X
X
X Bits 3 and 4 in the minor device are used to select tape density. Often
X when these bits are zero, as in the case of the Archive Viper 2525, the
X drive will automatically determine the tape type and format when reading.
X When writing should these bits be zero, the drive will write the highest
X valid density for a given tape type. For the Archive Viper 2525 using
X unit 0 with density = 0x01, which is /dev/rst8 assumes the tape is a
X QIC-24, density = 0x10 which is /dev/rst16 assumes the tape is a QIC-120,
X density = 0x11 which is /dev/rst24 assumes the tape is a QIC-150, density
X = 0x00 which is /dev/rst0 will allow the use of a QIC-525 with a 6525
X tape. This density mapping will vary depending on the drive type.
X
X Bit 5 in the minor device number is used to select long filemarks or
X short filemarks. A long filemark occupies 2.12 MBytes of space on the
X tape, while a short filemark occupies 488 KBytes. A long filemark in-
X cludes an erase gap while the short filemark does not. The tape can be
X positioned on the BOT side of a long filemark allowing data to be append-
X ed with a write operation. Since the short filemark does not contain an
X erase gap which would allow writing it is considered to be non-erasable.
X If either type of filemark is followed by blank tape, data may be append-
X ed on its EOT side.
X
X Bit 6 in the minor device number selects fixed block mode with a block
X size of 1K. Variable length records are the default if bit 6 is not set.
X
X For unit 0 here are the effects of minor device bits 2,3,4,5,6. For other
X units add the _u_n_i_t_# to each of the device names.
X
X _n_o_r_e_w_i_n_d _s_h_o_r_t _f_i_x_e_d_-_b_l_o_c_k
X _d_e_n_s_i_t_y_0 _d_e_n_s_i_t_y_1 _f_i_l_e_m_a_r_k_s _m_o_d_e
X rst0
X nrst0 X
X rst8 X
X nrst8 X X
X rst16 X
X nrst16 X X
X rst24 X X
X nrst24 X X X
X rst32 X
X nrst32 X X
X rst40 X X
X nrst40 X X X
X rst48 X X
X nrst48 X X X
X rst56 X X X
X nrst56 X X X X
X rst64 X
X nrst64 X X
X rst72 X X
X nrst72 X X X
X rst80 X X
X nrst80 X X X
X rst88 X X X
X nrst88 X X X X
X rst96 X X
X nrst96 X X X
X rst104 X X X
X nrst104 X X X X
X rst112 X X X
X nrst112 X X X X
X rst120 X X X X
X nrst120 X X X X X
X
XSSEEEE AALLSSOO
X mt(1), tar(1), mtio(4),
X
X _E_X_B_-_8_2_0_0 _8_M_M _C_a_r_t_r_i_d_g_e _T_a_p_e _S_u_b_s_y_s_t_e_m _I_n_t_e_r_f_a_c_e _U_s_e_r _M_a_n_u_a_l_..
X
XHHIISSTTOORRYY
X The sstt driver was derived from the hp300 st.c tape driver in June of
X 1993.
X
XBBUUGGSS
X The HP 98268 SCSI controller hardware can not do odd length DMA trans-
X fers. If odd length DMA I/O is requested the driver will use the "Pro-
X gram Transfer Mode" of the Fujitsu MB87030 chip. Read requests are nor-
X mally even length for which a DMA transfer is used. If, however, the
X driver detects that a odd length read has happened (when a even length
X was requested) it will issue the EIO error and the last byte of the read
X data will be 0x00. Odd length read requests must match the size of the
X requested data block on tape.
X
X The following only applies when using long filemarks. Short filemarks can
X not be overwritten.
X
X Due to the helical scan and the erase mechanism, there is a writing
X limitation on Exabyte drives. ``tar r'' or ``tar u'' will not work
X (``tar c'' is ok). One can only start writing at 1) beginning of
X tape, 2) on the end of what was last written, 3) "front" side of a
X regular (long) filemark. Say you have a tape with 3 tar files on it,
X want to save the first file, and want to begin writing over the 2nd
X file.
X
X On a normal 1/4" or 1/2" drive you would do:
X
X mt fsf 1; tar cf /dev/nrst0 ...
X
X but for an Exabyte you need to do:
X
X mt fsf 1; mt bsf 1; mt weof 1; tar cf /dev/nrst0 ...
X
X The regular long filemark consists of an erased zone 3.8" long (need-
X ed to begin a write). In this case, the first filemark is rewritten
X in place, which creates an erased zone _a_f_t_e_r it, clearing the way to
X write more on the tape. The erase head is not helical.
X
X One can position a tape to the end of what was last written by read-
X ing until a "BLANK CHECK" error is returned. Writing can be started
X at this point. (This applies to both long and short filemarks.) The
X tape does not become positioned somewhere down the "erased" area as
X does a conventional magtape. One can issue multiple reads at the
X "BLANK CHECK" error, but the Exabyte stays positioned at the begin-
X ning of the blank area, ready to accept write commands. File skip
X operations do not stop at blank tape and will run into old data or
X run to the end of the tape, so you have to be careful not to ``mt fsf
X too_many''.
X
X Archive support gets confused if asked to moved more filemarks than there
X are on the tape.
X
X This man page needs some work. Some of these are not really bugs, just
X unavoidable consequences of the hardware.
X
X Amiga specific controller comments should be added and HP specific com-
X ments removed after we determine any SCSI controller specific problems.
X
XNetBSD BSD/Amiga November 27, 1993 3
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
END-of-st.0
exit

198
sys/arch/amiga/dev/st.0 Normal file
View File

@ -0,0 +1,198 @@
ST(4) BSD Programmer's Manual ST(4)
NNAAMMEE
sstt - CCS SCSI tape driver
SSYYNNOOPPSSIISS
ttaappee sstt00 aatt ssccssii?? ssllaavvee ??
DDEESSCCRRIIPPTTIIOONN
The sstt driver was written especially to support the Exabyte EXB-8200 8MM
Cartridge Tape Subsystem. It has several extensions specific to the Ex-
abyte, but should support other tape drives as long as they follow the
ANSI SCSI-I specification. Besides extensive use with an Exabyte 8200,
the driver has been tested with an Archive QIC-24 tape drive, an Archive
Viper QIC-150 , an Archive Viper 2525, an Archive Python 27216 and 25501,
a Caliper CP150, a HP35450A, a Wangtek 5150ES, a Wangtek 5099ES, and a
Wangtek 5150ES, which is also currently the default drive type. The sstt
tape interface provides a standard tape drive interface as described in
mtio(4) with the following exceptions:
1. Density is dependent on device type. Current Exabyte hardware has
only one density. The EXB-8500 drive, when released, will have a
high density format of 5.6GB. On an Archive QIC-24 drive the driver
reads both QIC-11 and QIC-24 formats but writes only QIC-24. On an
Archive Viper QIC-150 drive the driver reads and writes only QIC-150
formats, it should also be able to read QIC-11 and QIC-24 but this
has not been verified. On an Archive Viper 2525 the drive can read
and write QIC-525, QIC-150, QIC-120 and can also read QIC-24 tapes.
2. Only the ``raw'' interface is supported.
Special Exabyte Support:
The MTIOCGET ioctl(2) call on an Exabyte returns this structure:
struct mtget {
short mt_type; /* type of magtape device */
/* the following two registers are grossly device dependent */
short mt_dsreg; /* sc_flags, ``drive status'' register */
short mt_erreg; /* high 8 bytes error status, ``error'' register */
/* low 8 bytes percentage of Rewrites
if writing, ECC errors if reading */
/* end device-dependent registers */
short mt_resid; /* Mbyte until end of tape ,residual count */
/* the following two are not yet implemented */
daddr_t mt_fileno; /* file number of current position */
daddr_t mt_blkno; /* block number of current position */
/* end not yet implemented */
};
Bits 3 and 4 in the minor device are used to select tape density. Often
when these bits are zero, as in the case of the Archive Viper 2525, the
drive will automatically determine the tape type and format when reading.
When writing should these bits be zero, the drive will write the highest
valid density for a given tape type. For the Archive Viper 2525 using
unit 0 with density = 0x01, which is /dev/rst8 assumes the tape is a
QIC-24, density = 0x10 which is /dev/rst16 assumes the tape is a QIC-120,
density = 0x11 which is /dev/rst24 assumes the tape is a QIC-150, density
= 0x00 which is /dev/rst0 will allow the use of a QIC-525 with a 6525
tape. This density mapping will vary depending on the drive type.
Bit 5 in the minor device number is used to select long filemarks or
short filemarks. A long filemark occupies 2.12 MBytes of space on the
tape, while a short filemark occupies 488 KBytes. A long filemark in-
cludes an erase gap while the short filemark does not. The tape can be
positioned on the BOT side of a long filemark allowing data to be append-
ed with a write operation. Since the short filemark does not contain an
erase gap which would allow writing it is considered to be non-erasable.
If either type of filemark is followed by blank tape, data may be append-
ed on its EOT side.
Bit 6 in the minor device number selects fixed block mode with a block
size of 1K. Variable length records are the default if bit 6 is not set.
For unit 0 here are the effects of minor device bits 2,3,4,5,6. For other
units add the _u_n_i_t_# to each of the device names.
_n_o_r_e_w_i_n_d _s_h_o_r_t _f_i_x_e_d_-_b_l_o_c_k
_d_e_n_s_i_t_y_0 _d_e_n_s_i_t_y_1 _f_i_l_e_m_a_r_k_s _m_o_d_e
rst0
nrst0 X
rst8 X
nrst8 X X
rst16 X
nrst16 X X
rst24 X X
nrst24 X X X
rst32 X
nrst32 X X
rst40 X X
nrst40 X X X
rst48 X X
nrst48 X X X
rst56 X X X
nrst56 X X X X
rst64 X
nrst64 X X
rst72 X X
nrst72 X X X
rst80 X X
nrst80 X X X
rst88 X X X
nrst88 X X X X
rst96 X X
nrst96 X X X
rst104 X X X
nrst104 X X X X
rst112 X X X
nrst112 X X X X
rst120 X X X X
nrst120 X X X X X
SSEEEE AALLSSOO
mt(1), tar(1), mtio(4),
_E_X_B_-_8_2_0_0 _8_M_M _C_a_r_t_r_i_d_g_e _T_a_p_e _S_u_b_s_y_s_t_e_m _I_n_t_e_r_f_a_c_e _U_s_e_r _M_a_n_u_a_l_..
HHIISSTTOORRYY
The sstt driver was derived from the hp300 st.c tape driver in June of
1993.
BBUUGGSS
The HP 98268 SCSI controller hardware can not do odd length DMA trans-
fers. If odd length DMA I/O is requested the driver will use the "Pro-
gram Transfer Mode" of the Fujitsu MB87030 chip. Read requests are nor-
mally even length for which a DMA transfer is used. If, however, the
driver detects that a odd length read has happened (when a even length
was requested) it will issue the EIO error and the last byte of the read
data will be 0x00. Odd length read requests must match the size of the
requested data block on tape.
The following only applies when using long filemarks. Short filemarks can
not be overwritten.
Due to the helical scan and the erase mechanism, there is a writing
limitation on Exabyte drives. ``tar r'' or ``tar u'' will not work
(``tar c'' is ok). One can only start writing at 1) beginning of
tape, 2) on the end of what was last written, 3) "front" side of a
regular (long) filemark. Say you have a tape with 3 tar files on it,
want to save the first file, and want to begin writing over the 2nd
file.
On a normal 1/4" or 1/2" drive you would do:
mt fsf 1; tar cf /dev/nrst0 ...
but for an Exabyte you need to do:
mt fsf 1; mt bsf 1; mt weof 1; tar cf /dev/nrst0 ...
The regular long filemark consists of an erased zone 3.8" long (need-
ed to begin a write). In this case, the first filemark is rewritten
in place, which creates an erased zone _a_f_t_e_r it, clearing the way to
write more on the tape. The erase head is not helical.
One can position a tape to the end of what was last written by read-
ing until a "BLANK CHECK" error is returned. Writing can be started
at this point. (This applies to both long and short filemarks.) The
tape does not become positioned somewhere down the "erased" area as
does a conventional magtape. One can issue multiple reads at the
"BLANK CHECK" error, but the Exabyte stays positioned at the begin-
ning of the blank area, ready to accept write commands. File skip
operations do not stop at blank tape and will run into old data or
run to the end of the tape, so you have to be careful not to ``mt fsf
too_many''.
Archive support gets confused if asked to moved more filemarks than there
are on the tape.
This man page needs some work. Some of these are not really bugs, just
unavoidable consequences of the hardware.
Amiga specific controller comments should be added and HP specific com-
ments removed after we determine any SCSI controller specific problems.
NetBSD BSD/Amiga November 27, 1993 3

300
sys/arch/amiga/dev/st.4 Normal file
View File

@ -0,0 +1,300 @@
.\" Copyright (c) 1990, 1991 The Regents of the University of California.
.\" All rights reserved.
.\"
.\" This code is derived from software contributed to Berkeley by
.\" the Systems Programming Group of the University of Utah Computer
.\" Science Department.
.\"
.\" Redistribution and use in source and binary forms, with or without
.\" modification, are permitted provided that the following conditions
.\" are met:
.\" 1. Redistributions of source code must retain the above copyright
.\" notice, this list of conditions and the following disclaimer.
.\" 2. Redistributions in binary form must reproduce the above copyright
.\" notice, this list of conditions and the following disclaimer in the
.\" documentation and/or other materials provided with the distribution.
.\" 3. All advertising materials mentioning features or use of this software
.\" must display the following acknowledgement:
.\" This product includes software developed by the University of
.\" California, Berkeley and its contributors.
.\" 4. Neither the name of the University nor the names of its contributors
.\" may be used to endorse or promote products derived from this software
.\" without specific prior written permission.
.\"
.\" THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
.\" ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
.\" SUCH DAMAGE.
.\"
.\" from: @(#)st.4 5.3 (Berkeley) 7/31/91
.\" $Id: st.4,v 1.1 1994/01/26 21:06:26 mw Exp $
.\"
.Dd November 27, 1993
.Dt ST 4 amiga
.Os
.Sh NAME
.Nm \&st
.Nd
.Tn CCS SCSI
tape driver
.Sh SYNOPSIS
.Cd "tape st0 at scsi? slave ?"
.Sh DESCRIPTION
The
.Nm \&st
driver was written especially to support the Exabyte
.Tn EXB-8200 8MM
Cartridge
Tape Subsystem. It has several extensions specific to the Exabyte,
but should support other tape drives as long as they follow
the
.Tn ANSI SCSI-I
specification. Besides extensive use with
an Exabyte 8200, the driver has been tested with an
Archive
.Tn QIC-24
tape drive, an Archive
.Tn Viper QIC-150
, an Archive
.Tn Viper 2525,
an Archive
.Tn Python 27216 and 25501,
a Caliper
.Tn CP150,
a HP35450A,
a Wangtek
.Tn 5150ES,
a Wangtek 5099ES,
and a Wangtek 5150ES, which is also currently the default drive type.
The
.Nm \&st
tape interface provides a standard tape drive interface
as described in
.Xr mtio 4
with the following exceptions:
.Bl -enum
.It
Density is dependent on device type. Current Exabyte hardware has
only one density. The
.Tn EXB-8500
drive, when released, will have a high
density format of
.Tn 5.6GB .
On an Archive
.Tn QIC-24
drive the driver reads both
.Tn QIC-11
and
.Tn QIC-24
formats
but writes only
.Tn QIC-24. On an Archive
.Tn Viper QIC-150
drive the driver reads and writes only
.Tn QIC-150
formats, it should also be able to read
.Tn QIC-11
and
.Tn QIC-24
but this has not been verified.
On an Archive
.Tn Viper 2525
the drive can read and write
.Tn QIC-525, QIC-150, QIC-120
and can also read
.Tn QIC-24
tapes.
.It
Only the ``raw'' interface is supported.
.El
.Pp
Special Exabyte Support:
.Pp
The
.Dv MTIOCGET
.Xr ioctl 2
call on an Exabyte returns this structure:
.Bd -literal
struct mtget {
short mt_type; /* type of magtape device */
/* the following two registers are grossly device dependent */
short mt_dsreg; /* sc_flags, ``drive status'' register */
short mt_erreg; /* high 8 bytes error status, ``error'' register */
/* low 8 bytes percentage of Rewrites
if writing, ECC errors if reading */
/* end device-dependent registers */
short mt_resid; /* Mbyte until end of tape ,residual count */
/* the following two are not yet implemented */
daddr_t mt_fileno; /* file number of current position */
daddr_t mt_blkno; /* block number of current position */
/* end not yet implemented */
};
.Ed
.Pp
Bits 3 and 4 in the minor device are used to select tape density.
Often when these bits are zero, as in the case of the Archive
.Tn Viper 2525,
the drive will automatically determine the tape type and
format when reading. When writing should these bits be zero, the drive
will write the highest valid density for a given tape type. For the Archive
.Tn Viper 2525
using unit 0 with density = 0x01, which is /dev/rst8 assumes the tape is a QIC-24,
density = 0x10 which is /dev/rst16 assumes the tape is a QIC-120,
density = 0x11 which is /dev/rst24 assumes the tape is a QIC-150,
density = 0x00 which is /dev/rst0 will allow the use of a QIC-525 with a 6525 tape.
This density mapping will vary depending on the drive
type.
Bit 5 in the minor device number is used
to select long filemarks or short filemarks. A long filemark occupies
2.12 MBytes of space on the tape, while a short filemark occupies 488 KBytes.
A long filemark includes an erase gap while the short filemark does not.
The tape can be positioned on the
.Tn BOT
side of a long filemark allowing
data to be appended with a write operation. Since the short filemark does not
contain an erase gap which would allow writing it is considered to be
non-erasable. If either type of filemark is followed by blank tape,
data may be appended on its
.Tn EOT
side.
.Pp
Bit 6 in the minor device number selects fixed block mode with a block
size of 1K. Variable length records are the default if bit 6 is not
set.
.Pp
For unit 0 here are the effects of minor device bits 2,3,4,5,6. For other
units add the
.Em unit#
to each of the device names.
.Bl -column norewind density0 density1 filemarks fixed-block -offset indent
.Em norewind short fixed-block
.Em density0 density1 filemarks mode
rst0
nrst0 X
rst8 X
nrst8 X X
rst16 X
nrst16 X X
rst24 X X
nrst24 X X X
rst32 X
nrst32 X X
rst40 X X
nrst40 X X X
rst48 X X
nrst48 X X X
rst56 X X X
nrst56 X X X X
rst64 X
nrst64 X X
rst72 X X
nrst72 X X X
rst80 X X
nrst80 X X X
rst88 X X X
nrst88 X X X X
rst96 X X
nrst96 X X X
rst104 X X X
nrst104 X X X X
rst112 X X X
nrst112 X X X X
rst120 X X X X
nrst120 X X X X X
.El
.Sh SEE ALSO
.Xr mt 1 ,
.Xr tar 1 ,
.Xr mtio 4 ,
.Rs
.%T EXB-8200 8MM Cartridge Tape Subsystem Interface User Manual.
.Re
.Sh HISTORY
The
.Nm \&st
driver was derived from the hp300 st.c tape driver in June of 1993.
.Sh BUGS
The
.Tn HP
98268
.Tn SCSI
controller hardware can not do odd length
.Tn DMA
transfers. If odd length
.Tn DMA I/O
is requested the driver will use the
"Program Transfer Mode" of the Fujitsu
.Tn MB87030
chip. Read requests are
normally even length for which a
.Tn DMA
transfer is used. If, however, the
driver detects that a odd length read has happened (when a even length
was requested) it will issue the
.Dv EIO
error and the last byte of the read
data will be 0x00. Odd length read requests must match the size of the
requested data block on tape.
.Pp
The following only applies when using long filemarks. Short filemarks can
not be overwritten.
.Bd -filled -offset 4n
Due to the helical scan and the erase mechanism, there is a writing
limitation on Exabyte drives.
.Dq Li tar r
or
.Dq Li tar u
will not work
.Pf ( Dq Li tar c
is ok). One can only start writing at 1) beginning of tape, 2) on the
end of what was last written, 3) "front" side of a regular (long) filemark.
Say you have a tape with 3 tar files on it, want to save the first
file, and want to begin writing over the 2nd file.
.Pp
On a normal 1/4" or 1/2" drive you would do:
.Pp
.Li "mt fsf 1; tar cf /dev/nrst0 ..."
.Pp
but for an Exabyte you need to do:
.Pp
.Li "mt fsf 1; mt bsf 1; mt weof 1; tar cf /dev/nrst0 ..."
.Pp
The regular long filemark consists of an erased zone 3.8" long
(needed to begin a write). In this case, the first filemark is
rewritten in place, which creates an erased zone
.Em after
it, clearing the
way to write more on the tape. The erase head is not helical.
.Pp
One can position a tape to the end of what was last written by reading
until a
.Tn \*qBLANK CHECK\*q
error is returned. Writing can be started at this
point. (This applies to both long and short filemarks.) The tape does
not become positioned somewhere down the "erased" area as does a
conventional magtape. One can issue multiple reads at the
.Tn \*qBLANK CHECK\*q
error, but the Exabyte stays positioned at the beginning of the
blank area, ready to accept write commands. File skip operations do
not stop at blank tape and will run into old data or run to the end of
the tape, so you have to be careful not to
.Dq Li mt fsf too_many .
.Ed
.Pp
Archive support gets confused if asked to moved more filemarks than there are
on the tape.
.Pp
This man page needs some work. Some of these are not really bugs,
just unavoidable consequences of the hardware.
.Pp
Amiga specific controller comments should be added and HP specific comments removed after we determine any SCSI controller specific problems.

125
sys/arch/amiga/dev/st.c
View File

@ -45,13 +45,22 @@
*
* Specific to Exabyte:
* mt status: residual="Mbytes to LEOM"
#if !defined(TWO_BITS_DENSITY) || defined(SPLIT_DENSITY_BIT_3_AND_6)
* minor bit 4 [b1bbbb] (aka /dev/rst16) selects short filemarks
* minor bit 5 [1bbbbb] (aka /dev/rst32) selects fix block mode, 1k blocks.
#else
* minor bit 5 [b1bbbbb] (aka /dev/rst32) selects short filemarks
* Specific to Python and Exabyte:
* minor bit 6 [1bbbbbb] (aka /dev/rst64) selects fix block mode, 1k blocks.
#endif
*
* Archive drive:
* can read both QIC-24 and QIC-II. But only writes
* QIC-24.
*
* Supports Archive Viper 2525 tape drive.
* Reads: QIC-525,QIC-150,QIC-120,QIC-24
* Writes: QIC-525,QIC-150,QIC-120
* Supports Archive Viper QIC-150 tape drive, but scsi.c reports selection
* errors.
*
@ -148,6 +157,13 @@ struct st_softc {
#define STF_LEOT 0x0020
#define STF_MOVED 0x0040
/* QIC Tape Densities */
#define QIC_11 0x04
#define QIC_24 0x05
#define QIC_120 0x0f
#define QIC_150 0x10
#define QIC_525 0x11
struct st_mode st_mode[NST];
/*
@ -176,9 +192,26 @@ struct buf stbuf[NST];
#define stpunit(x) ((x) & 7)
#define STDEV_NOREWIND 0x04
#define STDEV_HIDENSITY 0x08
#if !defined(TWO_BITS_DENSITY)
/* We'll use 1 bit for density just as before, but we'll use a macro for testing */
#define DSTY(x) ((minor(x)>>3) & 0x01)
#else
#if defined(SPLIT_DENSITY_BIT_3_AND_6)
/* We'll use bits 3 and 6 for density */
#define DSTY(x) (((minor(x) >> 5) &0x02) | ((minor(x)>>3) & 0x01))
#else
/* We'll use bits 3 and 4 for density */
#define DSTY(x) ((minor(x)>>3) & 0x03)
#endif
#endif
#if !defined(TWO_BITS_DENSITY) || defined(SPLIT_DENSITY_BIT_3_AND_6)
/* Code will work just like before */
#define STDEV_EXSFMK 0x10
#define STDEV_FIXEDBLK 0x20
#else
#define STDEV_EXSFMK 0x20
#define STDEV_FIXEDBLK 0x40
#endif
#ifdef DEBUG
#define ST_OPEN 0x0001
@ -334,26 +367,34 @@ stident(sc, ad)
goto failed;
}
if (bcmp("EXB-8200", &idstr[8], 8) == 0) {
#define IS_ATAPE(x) (bcmp(x,&idstr[8],sizeof(x) -1) == 0)
if (IS_ATAPE("EXB-8200")) {
sc->sc_tapeid = MT_ISEXABYTE;
sc->sc_datalen[CMD_REQUEST_SENSE] = 26;
sc->sc_datalen[CMD_INQUIRY] = 52;
sc->sc_datalen[CMD_MODE_SELECT] = 17;
sc->sc_datalen[CMD_MODE_SENSE] = 17;
} else if (bcmp("VIPER 150", &idstr[8], 9) == 0) {
} else if (IS_ATAPE("VIPER 2525")) {
sc->sc_tapeid = MT_ISVIPER2525;
sc->sc_datalen[CMD_REQUEST_SENSE] = 14;
sc->sc_datalen[CMD_INQUIRY] = 36;
sc->sc_datalen[CMD_MODE_SELECT] = 12;
sc->sc_datalen[CMD_MODE_SENSE] = 12;
} else if (IS_ATAPE("VIPER 150")) {
sc->sc_tapeid = MT_ISVIPER1;
sc->sc_datalen[CMD_REQUEST_SENSE] = 14;
sc->sc_datalen[CMD_INQUIRY] = 36;
sc->sc_datalen[CMD_MODE_SELECT] = 12;
sc->sc_datalen[CMD_MODE_SENSE] = 12;
} else if (bcmp("Python 27216", &idstr[8], 12) == 0
|| bcmp("Python 25501", &idstr[8], 12) == 0) {
} else if (IS_ATAPE("Python 27216") ||
IS_ATAPE("Python 25501")) {
sc->sc_tapeid = MT_ISPYTHON;
sc->sc_datalen[CMD_REQUEST_SENSE] = 14;
sc->sc_datalen[CMD_INQUIRY] = 36;
sc->sc_datalen[CMD_MODE_SELECT] = 12;
sc->sc_datalen[CMD_MODE_SENSE] = 12;
} else if (bcmp("HP35450A", &idstr[8], 8) == 0) {
} else if (IS_ATAPE("HP35450A")) {
/* XXX "extra" stat makes the HP drive happy at boot time */
stat = scsi_test_unit_rdy(ctlr, slave, unit);
sc->sc_tapeid = MT_ISHPDAT;
@ -361,21 +402,27 @@ stident(sc, ad)
sc->sc_datalen[CMD_INQUIRY] = 36;
sc->sc_datalen[CMD_MODE_SELECT] = 12;
sc->sc_datalen[CMD_MODE_SENSE] = 12;
} else if (bcmp("5150ES", &idstr[8], 6) == 0) {
} else if (IS_ATAPE("5150ES")) {
sc->sc_tapeid = MT_ISWANGTEK;
sc->sc_datalen[CMD_REQUEST_SENSE] = 14;
sc->sc_datalen[CMD_INQUIRY] = 36;
sc->sc_datalen[CMD_MODE_SELECT] = 12;
sc->sc_datalen[CMD_MODE_SENSE] = 12;
} else if (bcmp("CP150", &idstr[8], 5) == 0) {
} else if (IS_ATAPE("CP150")) {
sc->sc_tapeid = MT_ISCALIPER;
sc->sc_datalen[CMD_REQUEST_SENSE] = 14;
sc->sc_datalen[CMD_INQUIRY] = 36;
sc->sc_datalen[CMD_MODE_SELECT] = 12;
sc->sc_datalen[CMD_MODE_SENSE] = 12;
} else if (bcmp("5099ES", &idstr[8], 6) == 0) {
sc->sc_tapeid = MT_ISWTEK5099;
sc->sc_datalen[CMD_REQUEST_SENSE] = 14;
sc->sc_datalen[CMD_INQUIRY] = 36;
sc->sc_datalen[CMD_MODE_SELECT] = 12;
sc->sc_datalen[CMD_MODE_SENSE] = 12;
} else {
if (idstr[8] == '\0')
printf("st%d: No ID, assuming Archive\n", ad->amiga_unit);
printf("st%d: No ID, assuming Wangtek\n", ad->amiga_unit);
else
printf("st%d: Unsupported tape device\n", ad->amiga_unit);
#if 0
@ -461,6 +508,9 @@ stopen(dev, flag, type, p)
stat = scsi_immed_command(ctlr, slave, unit, &modsense,
(u_char *)&mode, modlen, B_READ);
printf("st: stat = %d, blklen = %d\n", stat,
(mode.md.blklen2 << 16 | mode.md.blklen1 << 8 | mode.md.blklen0));
/* set record length */
switch (sc->sc_tapeid) {
case MT_ISAR:
@ -475,11 +525,15 @@ stopen(dev, flag, type, p)
case MT_ISHPDAT:
sc->sc_blklen = 512;
break;
case MT_ISVIPER2525:
case MT_ISVIPER1:
sc->sc_blklen = 512;
break;
case MT_ISPYTHON:
sc->sc_blklen = 512;
if (minor(dev) & STDEV_FIXEDBLK)
sc->sc_blklen = 20*512;
else
sc->sc_blklen = 512;
break;
case MT_ISWANGTEK:
case MT_ISCALIPER:
@ -491,6 +545,9 @@ stopen(dev, flag, type, p)
skip_modsel = 1;
sc->sc_blklen = 512;
break;
case MT_ISWTEK5099:
sc->sc_blklen = 512;
break;
default:
if ((mode.md.blklen2 << 16 |
mode.md.blklen1 << 8 |
@ -523,25 +580,25 @@ stopen(dev, flag, type, p)
switch (sc->sc_tapeid) {
case MT_ISAR:
if (minor(dev) & STDEV_HIDENSITY)
msd.density = 0x5;
if (DSTY(dev))
msd.density = QIC_24;
else {
if (flag & FWRITE) {
uprintf("Can only write QIC-24\n");
return(EIO);
}
msd.density = 0x4;
msd.density = QIC_11;
}
break;
case MT_ISCALIPER:
case MT_ISWANGTEK:
if (minor (dev) & STDEV_HIDENSITY)
msd.density = 0x10;
if (DSTY(dev))
msd.density = QIC_150;
else
msd.density = 0x0F;
msd.density = QIC_120;
break;
case MT_ISEXABYTE:
if (minor(dev) & STDEV_HIDENSITY)
if (DSTY(dev))
uprintf("EXB-8200 density support only\n");
msd.vupb = (u_char)st_exvup;
msd.rsvd5 = 0;
@ -553,9 +610,37 @@ stopen(dev, flag, type, p)
case MT_ISHPDAT:
case MT_ISVIPER1:
case MT_ISPYTHON:
if (minor(dev) & STDEV_HIDENSITY)
case MT_ISWTEK5099:
if (DSTY(dev))
uprintf("Only one density supported\n");
break;
case MT_ISVIPER2525:
/*density = 0 Is default and works for reading sun QIC-24 Tapes */
/* The drive starts out at the highest density and works its way
down the chain of recognized densities.
*/
switch (DSTY(dev))
{
/* For QIC-525 use /dev/rst0 */
case 3:/* use /dev/rst24 */
msd.density = QIC_150; /* QIC-150 */
break;
case 2:/* Use /dev/rst16 */
msd.density = QIC_120; /* QIC-120 */
break;
case 1:/* Use /dev/rst8 */
if (flag & FWRITE) {
uprintf("Can only read QIC-24\n");
return(EIO);
}
msd.density = QIC_24; /* QIC-24 */
break;
case 0:/* use /dev/rst0 */
default:
msd.density = 0; /* Auto density */
break;
}
break;
default:
uprintf("Unsupported drive\n");
return(EIO);
@ -642,10 +727,12 @@ mode_selected:
}
break;
case MT_ISHPDAT:
case MT_ISVIPER1:
case MT_ISVIPER2525:
case MT_ISVIPER1:
case MT_ISPYTHON:
case MT_ISCALIPER:
case MT_ISWANGTEK:
case MT_ISWTEK5099:
if (xsense->sc_xsense.key == XSK_UNTATTEN)
stat = scsi_test_unit_rdy(ctlr, slave, unit);
if (stat == STS_CHECKCOND) {

1523
sys/arch/amiga/dev/tz.c Normal file
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File diff suppressed because it is too large Load Diff

183
sys/arch/amiga/dev/tzvar.h Normal file
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@ -0,0 +1,183 @@
/*
* Copyright (c) 1990 University of Utah.
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* the Systems Programming Group of the University of Utah Computer
* Science Department.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)tzvar.h 7.1 (Berkeley) 2/5/91
*/
/*
* tzvar.h scsi tape driver
*/
struct exb_xsense {
u_char reserved8;
u_char reserved9;
u_char reserved10;
u_char reserved11;
u_char addsens;
u_char addsensq;
u_char reserved14;
u_char reserved15;
u_char rwerrcnt2;
u_char rwerrcnt1;
u_char rwerrcnt0;
u_char pf: 1,
bpe: 1,
fpe: 1,
me: 1,
eco: 1,
tme: 1,
tnp: 1,
bot: 1;
u_char xfr: 1,
tmd: 1,
wp: 1,
fmke: 1,
ure: 1,
we1: 1,
sse: 1,
fe: 1;
u_char rsvd: 6,
wseb: 1,
wseo: 1;
u_char reserved22;
u_char tplft2;
u_char tplft1;
u_char tplft0;
};
/* xsense sense key */
#define XSK_NOSENCE 0x0
#define XSK_NOTUSED1 0x1
#define XSK_NOTRDY 0x2
#define XSK_MEDERR 0x3
#define XSK_HRDWERR 0x4
#define XSK_ILLREQ 0x5
#define XSK_UNTATTEN 0x6
#define XSK_DATAPROT 0x7
#define XSK_BLNKCHK 0x8
#define XSK_VENDOR 0x9
#define XSK_CPYABORT 0xa
#define XSK_ABORTCMD 0xb
#define XSK_NOTUSEDC 0xc
#define XSK_VOLOVER 0xd
#define XSK_NOTUSEDE 0xe
#define XSK_REVERVED 0xf
struct exb_inquiry {
char venderunique[16];
};
struct cpr_xsense {
u_char b8;
#define CPR_WP 0x10
u_char b9;
u_char b10;
u_char b11;
u_char b12;
u_char b13;
};
struct tz_mode {
u_char sdl;
u_char medtype;
u_char wp: 1, /* write protect */
bfmd: 3, /* buffered write mode */
speed: 4;
u_char bdl;
u_char dencod;
u_char numblk2; /* number of blocks */
u_char numblk1;
u_char numblk0;
u_char rsvd1;
u_char blklen2; /* block length */
u_char blklen1;
u_char blklen0;
};
struct tz_mode_exvup {
/* vender unique */
u_char ct: 1, /* international cartridge */
rs1: 1,
nd: 1, /* no disconnect, date transfer */
rs2: 1,
nbe: 1, /* no busy enable */
ebd: 1, /* even byte disconnect */
pe: 1, /* parity enable */
nal: 1; /* no auto load */
u_char rsvd: 7,
p5: 1;
u_char motionthres;
u_char reconthres;
u_char gapthres;
};
struct mode_select_data {
u_char rsvd1;
u_char rsvd2;
u_char rsvd3: 1,
buff: 3,
speed: 4;
u_char blkdeslen;
u_char density;
u_char blks2;
u_char blks1;
u_char blks0;
u_char rsvd4;
u_char blklen2;
u_char blklen1;
u_char blklen0;
u_char vupb;
u_char rsvd5: 7,
p5: 1;
u_char motionthres;
u_char reconthres;
u_char gapthres;
};
struct mode_sense {
struct tz_mode md;
struct tz_mode_exvup ex;
};
#define EXDS_BITS \
"\20\20\
\7MOVED\6LEOT\5CMD\4WRTTN\3WMODE\2OPEN\1ALIV"
#define EXER_BITS \
"\20\20VAL\17FMK\16EOM\15ILI\14KEY3\13KEY2\12KEY1\11KEY0\
\10RETRY7\7RETRY6\6RETRY5\5RETRY4\4RETRY3\3RETRY2\2RETRY1\1RETRY0"

422
sys/arch/amiga/dev/view.c Normal file
View File

@ -0,0 +1,422 @@
/*
* Copyright (c) 1993 Christian E. Hopps
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* Christian E. Hopps.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
*/
/* The view major device is a placeholder device. It serves
* simply to map the semantics of a graphics dipslay to
* the semantics of a character block device. In other
* words the graphics system as currently built does not like to be
* refered to by open/close/ioctl. This device serves as
* a interface to graphics. */
#include "param.h"
#include "proc.h"
#include "ioctl.h"
#include "file.h"
#include "malloc.h"
#include "device.h"
#include "machine/cpu.h"
#include "vm/vm.h"
#include "vm/vm_kern.h"
#include "vm/vm_page.h"
#include "vm/vm_pager.h"
#include "miscfs/specfs/specdev.h"
#include "vnode.h"
#include "mman.h"
#include "grf/grf_types.h"
#include "grf/grf_bitmap.h"
#include "grf/grf_view.h"
#include "grf/grf_mode.h"
#include "grf/grf_monitor.h"
#include "viewioctl.h"
#include "viewvar.h"
#if 0
#include "view.h"
#endif
/* just one possible right now with the grf kludge */
#undef NVIEW
#define NVIEW 1
int viewprobe ();
#if 0
/* not currently used as independant device */
struct driver view_driver = { viewprobe, "view" };
#endif
struct view_softc views[NVIEW];
static int inited;
int view_default_x;
int view_default_y;
int view_default_width = 640;
int view_default_height = 400;
int view_default_depth = 2;
/*
* functions for probeing.
*/
/* this function is called early to set up a display. */
viewconfig ()
{
viewprobe ();
}
viewprobe ()
{
if (!inited) {
int i;
inited = 1;
for (i=0; i<NVIEW; i++) {
views[i].view = NULL;
views[i].flags = 0;
}
}
return (1);
}
/*
* Internal functions.
*/
static void
view_display (struct view_softc *vu)
{
int s = spltty ();
int i;
if (vu == NULL) {
return;
}
/* mark views that share this monitor as not displaying */
for (i=0; i<NVIEW; i++) {
if (views[i].flags&VUF_DISPLAY && views[i].monitor == vu->monitor) {
views[i].flags &= ~VUF_DISPLAY;
}
}
vu->flags |= VUF_ADDED;
if (vu->view) {
vu->view->display.x = vu->size.x;
vu->view->display.y = vu->size.y;
grf_display_view (vu->view);
vu->size.x = vu->view->display.x;
vu->size.y = vu->view->display.y;
vu->flags |= VUF_DISPLAY;
}
splx (s);
}
/* remove a view from our added list if it is marked as displaying */
/* switch to a new display. */
static void
view_remove (struct view_softc *vu)
{
int i;
if (!(vu->flags & VUF_ADDED)) {
return;
}
vu->flags &= ~VUF_ADDED;
if (vu->flags & VUF_DISPLAY) {
for (i=0; i<NVIEW; i++) {
if (views[i].flags & VUF_ADDED && &views[i] != vu &&
views[i].monitor == vu->monitor) {
view_display (&views[i]);
break;
}
}
}
vu->flags &= ~VUF_DISPLAY;
grf_remove_view (vu->view);
}
static int
view_setsize (struct view_softc *vu, struct view_size *vs)
{
view_t *new, *old;
dimen_t ns;
int co = 0, cs = 0;
if (vs->x != vu->size.x ||
vs->y != vu->size.y) {
co = 1;
}
if (vs->width != vu->size.width ||
vs->height != vu->size.height ||
vs->depth != vu->size.depth) {
cs = 1;
}
if (!cs && !co) {
/* no change. */
return (0);
}
ns.width = vs->width;
ns.height = vs->height;
new = grf_alloc_view (NULL, &ns, vs->depth);
if (!new) {
return (ENOMEM); /* check this error. */
}
old = vu->view;
vu->view = new;
vu->size.x = new->display.x;
vu->size.y = new->display.y;
vu->size.width = new->display.width;
vu->size.height = new->display.height;
vu->size.depth = new->bitmap->depth;
vu->mode = grf_get_display_mode (vu->view);
vu->monitor = grf_get_monitor (vu->mode);
vu->size.x = vs->x;
vu->size.y = vs->y;
/* we are all set to go everything is A-OK. */
/* we need a custom remove here to avoid letting another view display */
/* mark as not added or displayed */
if (vu->flags & VUF_DISPLAY) {
vu->flags &= ~(VUF_ADDED|VUF_DISPLAY);
/* change view pointers */
/* display new view first */
view_display (vu);
}
/* remove old view from monitor */
grf_free_view (old);
return (0);
}
/*
* functions made available by conf.c
*/
/*ARGSUSED*/
viewopen (dev, flags)
dev_t dev;
{
dimen_t size;
struct view_softc *vu = &views[minor(dev)];
if (minor(dev) >= NVIEW)
return EXDEV;
if (vu->flags & VUF_OPEN) {
return (EBUSY);
}
vu->size.x = view_default_x;
vu->size.y = view_default_y;
size.width = vu->size.width = view_default_width;
size.height = vu->size.height = view_default_height;
vu->size.depth = view_default_depth;
vu->view = grf_alloc_view (NULL, &size, vu->size.depth);
if (vu->view) {
vu->size.x = vu->view->display.x;
vu->size.y = vu->view->display.y;
vu->size.width = vu->view->display.width;
vu->size.height = vu->view->display.height;
vu->size.depth = vu->view->bitmap->depth;
vu->flags |= VUF_OPEN;
vu->mode = grf_get_display_mode (vu->view);
vu->monitor = grf_get_monitor (vu->mode);
return (0);
}
return (ENOMEM);
}
/*ARGSUSED*/
viewclose (dev, flags)
dev_t dev;
{
struct view_softc *vu = &views[minor(dev)];
if (vu->flags & VUF_OPEN) {
view_remove (vu);
grf_free_view (vu->view);
vu->flags = 0;
vu->view = NULL;
vu->mode = NULL;
vu->monitor = NULL;
}
}
/*ARGSUSED*/
viewioctl (dev, cmd, data, flag, p)
dev_t dev;
caddr_t data;
struct proc *p;
{
bmap_t *bm;
colormap_t *cm;
struct view_softc *vu = &views[minor(dev)];
int error = 0;
switch (cmd) {
case VIEW_DISPLAY:
view_display (vu);
break;
case VIEW_REMOVE:
view_remove (vu);
break;
case VIEW_GETSIZE:
bcopy (&vu->size, data, sizeof (struct view_size));
break;
case VIEW_SETSIZE:
error = view_setsize (vu, (struct view_size *)data);
break;
case VIEW_GETBITMAP:
bm = (bmap_t *)data;
bcopy (vu->view->bitmap, bm, sizeof (bmap_t));
if ((int)p != -1) {
bm->plane = 0;
bm->blit_temp = 0;
bm->hardware_address = 0;
}
break;
case VIEW_GETCOLORMAP:
error = view_get_colormap (vu, data);
break;
case VIEW_USECOLORMAP:
error = view_use_colormap (vu, data);
break;
default:
error = EINVAL;
break;
}
return (error);
}
/*ARGSUSED*/
view_get_colormap (vu, ucm)
struct view_softc *vu;
colormap_t *ucm;
{
int error = 0;
u_long *cme = malloc(sizeof (u_long)*(ucm->size + 1),
M_IOCTLOPS, M_WAITOK); /* add one incase of zero, ick. */
if (cme) {
u_long *uep = ucm->entry;
ucm->entry = cme; /* set entry to out alloc. */
if (!vu->view || grf_get_colormap (vu->view, ucm))
error = EINVAL;
else if (copyout (cme, uep, sizeof (u_long)*ucm->size))
error = EINVAL;
ucm->entry = uep; /* set entry back to users. */
free (cme, M_IOCTLOPS);
} else {
error = ENOMEM;
}
return (error);
}
/*ARGSUSED*/
view_use_colormap (vu, ucm)
struct view_softc *vu;
colormap_t *ucm;
{
int error = 0;
colormap_t *cm = malloc(sizeof (u_long)*ucm->size + sizeof (*cm),
M_IOCTLOPS, M_WAITOK);
if (cm) {
bcopy (ucm, cm, sizeof (colormap_t));
cm->entry = &cm[1]; /* table directly after. */
if (copyin (ucm->entry, cm->entry, sizeof (u_long)*ucm->size))
error = EINVAL;
else if (!vu->view || grf_use_colormap (vu->view, cm))
error = EINVAL;
free (cm, M_IOCTLOPS);
} else {
error = ENOMEM;
}
return (error);
}
/*ARGSUSED*/
viewmap(dev, off, prot)
dev_t dev;
{
struct view_softc *vu = &views[minor(dev)];
bmap_t *bm = vu->view->bitmap;
u_byte *bmd_start = bm->hardware_address;
u_long bmd_size = bm->bytes_per_row*bm->rows*bm->depth;
if (off >= 0 && off < bmd_size) {
return(((u_int)bmd_start + off) >> PGSHIFT);
}
/* bogus */
return(-1);
}
/*ARGSUSED*/
viewselect(dev, rw)
dev_t dev;
{
if (rw == FREAD)
return(0);
return(1);
}
void
viewattach() {}

63
sys/arch/amiga/dev/viewioctl.h Normal file
View File

@ -0,0 +1,63 @@
/*
* Copyright (c) 1993 Christian E. Hopps
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* Christian E. Hopps.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
*/
/* The view major device is a placeholder device. It serves
* simply to map the semantics of a graphics dipslay to
* the semantics of a character block device. In other
* words the graphics system as currently built does not like to be
* refered to by open/close/ioctl. This device serves as
* a interface to graphics. */
#include "grf/grf_bitmap.h"
#include "grf/grf_colormap.h"
struct view_size {
int x;
int y;
int width;
int height;
int depth;
};
#define VIEW_REMOVE _IO ('V', 0x0) /* if displaying remove. */
#define VIEW_DISPLAY _IO ('V', 0x1) /* if not displaying, display */
#define VIEW_SETSIZE _IOW ('V', 0x2, struct view_size) /* set size */
#define VIEW_GETSIZE _IOR ('V', 0x3, struct view_size) /* get size */
#define VIEW_GETBITMAP _IOR ('V', 0x4, bmap_t)
#define VIEW_USECOLORMAP _IOW ('V', 0x5, colormap_t)
#define VIEW_GETCOLORMAP _IOWR ('V', 0x6, colormap_t)

69
sys/arch/amiga/dev/viewvar.h Normal file
View File

@ -0,0 +1,69 @@
/*
* Copyright (c) 1993 Christian E. Hopps
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* Christian E. Hopps.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
*/
/* The view major device is a placeholder device. It serves
* simply to map the semantics of a graphics dipslay to
* the semantics of a character block device. In other
* words the graphics system as currently built does not like to be
* refered to by open/close/ioctl. This device serves as
* a interface to graphics. */
struct view_softc {
struct view_size size;
view_t *view;
dmode_t *mode;
monitor_t *monitor;
pid_t lock_process;
int flags;
};
enum view_unit_flag_bits {
VUB_OPEN,
VUB_ADDED,
VUB_DISPLAY,
VUB_LAST_BIT
};
enum view_unit_flags {
VUF_OPEN = 1<<VUB_OPEN,
VUF_ADDED = 1<<VUB_ADDED,
VUF_DISPLAY = 1<<VUB_DISPLAY,
VUF_MASK = ((1<<VUB_LAST_BIT)-1)
};

2
sys/arch/amiga/dev/vn.c
View File

@ -70,7 +70,7 @@
#include "sys/ioctl.h"
#include "sys/mount.h"
#include "sys/vnode.h"
#include "sys/specdev.h"
#include "miscfs/specfs/specdev.h"
#include "sys/file.h"
#include "sys/uio.h"

86
sys/arch/amiga/dev/vuid_event.h Normal file
View File

@ -0,0 +1,86 @@
/*
* Copyright (c) 1992, 1993
* The Regents of the University of California. All rights reserved.
*
* This software was developed by the Computer Systems Engineering group
* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
* contributed to Berkeley.
*
* All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Lawrence Berkeley Laboratory.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)vuid_event.h 8.1 (Berkeley) 6/11/93
*
* from: Header: vuid_event.h,v 1.4 92/11/26 01:20:27 torek Exp (LBL)
* $Id: vuid_event.h,v 1.1 1994/01/26 21:06:36 mw Exp $
*/
/*
* The following is a minimal emulation of Sun's `Firm_event' structures
* and related operations necessary to make X11 happy (i.e., make it
* compile, and make old X11 binaries run).
*/
typedef struct firm_event {
u_short id; /* key or MS_* or LOC_[XY]_DELTA */
u_short pad; /* unused, at least by X11 */
int value; /* VKEY_{UP,DOWN} or locator delta */
struct timeval time;
} Firm_event;
/*
* Special `id' fields. These weird numbers simply match the old binaries.
* Others are in 0..0x7f and are keyboard key numbers (keyboard dependent!).
*/
#define MS_LEFT 0x7f20 /* left mouse button */
#define MS_MIDDLE 0x7f21 /* middle mouse button */
#define MS_RIGHT 0x7f22 /* right mouse button */
#define LOC_X_DELTA 0x7f80 /* mouse delta-X */
#define LOC_Y_DELTA 0x7f81 /* mouse delta-Y */
/*
* Special `value' fields. These apply to keys and mouse buttons. The
* value of a mouse delta is the delta. Note that positive deltas are
* left and up (not left and down as you might expect).
*/
#define VKEY_UP 0 /* key or button went up */
#define VKEY_DOWN 1 /* key or button went down */
/*
* The following ioctls are clearly intended to take things in and out
* of `firm event' mode. Since we always run in this mode (as far as
* /dev/kbd and /dev/mouse are concerned, anyway), we always claim to
* be in this mode and reject anything else.
*/
#define VUIDSFORMAT _IOW('v', 1, int)
#define VUIDGFORMAT _IOR('v', 2, int)
#define VUID_FIRM_EVENT 1 /* the only format we support */

48
sys/arch/amiga/dev/zeusdma.c Normal file
View File

@ -0,0 +1,48 @@
/*
* Copyright (c) 1982, 1990 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)dma.c
*/
/*
* dummy PPI Zeus DMA driver
*/
#include "zeusscsi.h"
#if NZEUSSCSI > 0
void
zeusdmainit ()
{
}
#endif