Modify software interrupt handling a bit.
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@ -1,4 +1,4 @@
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/* $NetBSD: zs.c,v 1.1 1999/12/09 14:53:06 tsutsui Exp $ */
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/* $NetBSD: zs.c,v 1.2 1999/12/29 05:01:13 tsutsui Exp $ */
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/*-
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* Copyright (c) 1996 The NetBSD Foundation, Inc.
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@ -112,7 +112,7 @@ struct zsdevice {
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};
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static struct zsdevice *zsaddr[NZS];
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static u_long zs_sir;
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static u_char zs_sir;
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/* Flags from cninit() */
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static int zs_hwflags[NZS][2];
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@ -1,4 +1,4 @@
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/* $NetBSD: intr.h,v 1.1 1999/12/09 14:53:11 tsutsui Exp $ */
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/* $NetBSD: intr.h,v 1.2 1999/12/29 05:01:14 tsutsui Exp $ */
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/*
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*
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@ -66,22 +66,23 @@
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/*
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* simulated software interrupt register
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*/
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extern u_long ssir;
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extern u_char ssir;
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extern volatile u_char *ctrl_int2;
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#define NSIR (sizeof(ssir) * 8)
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#define SIR_NET 0x1
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#define SIR_CLOCK 0x2
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#define SIR_NET 0
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#define SIR_CLOCK 1
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#define NEXT_SIR 2
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#define siroff(x) ssir &= ~(x)
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#define setsoftint(x) do{ \
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ssir |= (x); \
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*ctrl_int2 = 0xff; \
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}while(0)
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#define setsoftnet() setsoftint(SIR_NET)
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#define setsoftclock() setsoftint(SIR_CLOCK)
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#define setsoftint(x) do { \
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ssir |= (x); \
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*ctrl_int2 = 0xff; \
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} while (0)
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#define setsoftnet() setsoftint(1 << SIR_NET)
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#define setsoftclock() setsoftint(1 << SIR_CLOCK)
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u_long allocate_sir __P((void (*) __P((void *)), void *));
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u_char allocate_sir __P((void (*) __P((void *)), void *));
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void init_sir __P((void));
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#endif /* _KERNEL */
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@ -1,4 +1,4 @@
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/* $NetBSD: machdep.c,v 1.1 1999/12/09 14:53:17 tsutsui Exp $ */
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/* $NetBSD: machdep.c,v 1.2 1999/12/29 05:01:14 tsutsui Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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@ -1035,47 +1035,48 @@ void intrhand_lev2 __P((void));
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void intrhand_lev3 __P((void));
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void intrhand_lev4 __P((void));
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void intrhand_lev5 __P((void));
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#if NLE > 0
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int leintr __P((int));
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#endif
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#if NSI > 0
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int si_intr __P((void *));
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#endif
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void (*sir_routines[NSIR]) __P((void *));
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void *sir_args[NSIR];
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u_long ssir;
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u_char ssir;
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int next_sir;
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void
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intrhand_lev2()
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{
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int bit;
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int bit, s;
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u_char sintr;
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/* disable level 2 interrupt */
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*ctrl_int2 = 0;
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s = splhigh();
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sintr = ssir;
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ssir = 0;
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splx(s);
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intrcnt[2]++;
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uvmexp.intrs++;
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while ((bit = ffs(ssir)) != 0) {
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--bit;
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ssir &= ~(1 << bit);
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uvmexp.softs++;
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if (sir_routines[bit])
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sir_routines[bit](sir_args[bit]);
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for (bit = 0; bit < next_sir; bit++) {
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if (sintr & (1 << bit)) {
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uvmexp.softs++;
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if (sir_routines[bit])
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sir_routines[bit](sir_args[bit]);
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}
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}
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}
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/*
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* Allocation routines for software interrupts.
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*/
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u_long
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u_char
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allocate_sir(proc, arg)
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void (*proc) __P((void *));
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void *arg;
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{
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int bit;
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if( next_sir >= NSIR )
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if (next_sir >= NSIR)
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panic("allocate_sir: none left");
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bit = next_sir++;
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sir_routines[bit] = proc;
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@ -1088,9 +1089,9 @@ init_sir()
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{
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extern void netintr __P((void));
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sir_routines[0] = (void (*) __P((void *)))netintr;
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sir_routines[1] = (void (*) __P((void *)))softclock;
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next_sir = 2;
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sir_routines[SIR_NET] = (void (*) __P((void *)))netintr;
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sir_routines[SIR_CLOCK] = (void (*) __P((void *)))softclock;
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next_sir = NEXT_SIR;
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}
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@ -1112,6 +1113,12 @@ void
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intrhand_lev4()
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{
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int stat;
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#if NLE > 0
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extern int leintr __P((int));
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#endif
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#if NSI > 0
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extern int si_intr __P((int));
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#endif
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#define INTST_LANCE 0x04
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#define INTST_SCSI 0x80
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