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This commit is contained in:
thorpej 2001-07-20 07:07:28 +00:00
parent 959f6ee3f3
commit bb93036fa9
2 changed files with 9 additions and 8 deletions
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11
sys/dev/mii/miidevs.h
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@ -1,10 +1,10 @@
/* $NetBSD: miidevs.h,v 1.25 2001/07/12 21:25:31 thorpej Exp $ */ /* $NetBSD: miidevs.h,v 1.26 2001/07/20 07:07:28 thorpej Exp $ */
/* /*
* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT. * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
* *
* generated from: * generated from:
* NetBSD: miidevs,v 1.25 2001/07/12 21:25:07 thorpej Exp * NetBSD: miidevs,v 1.26 2001/07/20 07:06:42 thorpej Exp
*/ */
/*- /*-
@ -67,7 +67,7 @@
#define MII_OUI_ICS 0x00a0be /* Integrated Circuit Systems */ #define MII_OUI_ICS 0x00a0be /* Integrated Circuit Systems */
#define MII_OUI_INTEL 0x00aa00 /* Intel */ #define MII_OUI_INTEL 0x00aa00 /* Intel */
#define MII_OUI_LEVEL1 0x00207b /* Level 1 */ #define MII_OUI_LEVEL1 0x00207b /* Level 1 */
#define MII_OUI_MARVELL 0x000ac2 /* Marvell Semiconductor */ #define MII_OUI_MARVELL 0x005043 /* Marvell Semiconductor */
#define MII_OUI_MYSON 0x00c0b4 /* Myson Technology */ #define MII_OUI_MYSON 0x00c0b4 /* Myson Technology */
#define MII_OUI_NATSEMI 0x080017 /* National Semiconductor */ #define MII_OUI_NATSEMI 0x080017 /* National Semiconductor */
#define MII_OUI_PMCSIERRA 0x00e004 /* PMC-Sierra */ #define MII_OUI_PMCSIERRA 0x00e004 /* PMC-Sierra */
@ -101,6 +101,7 @@
#define MII_OUI_xxDAVICOM 0x000602 /* Davicom Semiconductor */ #define MII_OUI_xxDAVICOM 0x000602 /* Davicom Semiconductor */
#define MII_OUI_xxPMCSIERRA 0x0009c0 /* PMC-Sierra */ #define MII_OUI_xxPMCSIERRA 0x0009c0 /* PMC-Sierra */
#define MII_OUI_xxMARVELL 0x000ac2 /* Marvell Semiconductor */
/* /*
* List of known models. Grouped by oui. * List of known models. Grouped by oui.
@ -165,8 +166,8 @@
#define MII_STR_LEVEL1_LXT1000 "LXT1000 1000BASE-T media interface" #define MII_STR_LEVEL1_LXT1000 "LXT1000 1000BASE-T media interface"
/* Marvell Semiconductor PHYs */ /* Marvell Semiconductor PHYs */
#define MII_MODEL_MARVELL_E1000 0x0005 #define MII_MODEL_xxMARVELL_E1000 0x0005
#define MII_STR_MARVELL_E1000 "Marvell 88E1000 Gigabit PHY" #define MII_STR_xxMARVELL_E1000 "Marvell 88E1000 Gigabit PHY"
/* Myson Technology PHYs */ /* Myson Technology PHYs */
#define MII_MODEL_xxMYSON_MTD972 0x0000 #define MII_MODEL_xxMYSON_MTD972 0x0000

6
sys/dev/mii/miidevs_data.h
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@ -1,10 +1,10 @@
/* $NetBSD: miidevs_data.h,v 1.15 2001/07/12 21:25:31 thorpej Exp $ */ /* $NetBSD: miidevs_data.h,v 1.16 2001/07/20 07:07:28 thorpej Exp $ */
/* /*
* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT. * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
* *
* generated from: * generated from:
* NetBSD: miidevs,v 1.25 2001/07/12 21:25:07 thorpej Exp * NetBSD: miidevs,v 1.26 2001/07/20 07:06:42 thorpej Exp
*/ */
/*- /*-
@ -66,7 +66,7 @@ struct mii_knowndev mii_knowndevs[] = {
{ MII_OUI_xxLEVEL1, MII_MODEL_xxLEVEL1_LXT970, MII_STR_xxLEVEL1_LXT970 }, { MII_OUI_xxLEVEL1, MII_MODEL_xxLEVEL1_LXT970, MII_STR_xxLEVEL1_LXT970 },
{ MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT1000_OLD, MII_STR_LEVEL1_LXT1000_OLD }, { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT1000_OLD, MII_STR_LEVEL1_LXT1000_OLD },
{ MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT1000, MII_STR_LEVEL1_LXT1000 }, { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT1000, MII_STR_LEVEL1_LXT1000 },
{ MII_OUI_MARVELL, MII_MODEL_MARVELL_E1000, MII_STR_MARVELL_E1000 }, { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1000, MII_STR_xxMARVELL_E1000 },
{ MII_OUI_xxMYSON, MII_MODEL_xxMYSON_MTD972, MII_STR_xxMYSON_MTD972 }, { MII_OUI_xxMYSON, MII_MODEL_xxMYSON_MTD972, MII_STR_xxMYSON_MTD972 },
{ MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83840, MII_STR_xxNATSEMI_DP83840 }, { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83840, MII_STR_xxNATSEMI_DP83840 },
{ MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83843, MII_STR_xxNATSEMI_DP83843 }, { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83843, MII_STR_xxNATSEMI_DP83843 },