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On exception return, use k1 to restore the saved registers, so that we 

don't stomp on the return address in k0.  Also, don't need to account
for any load delays, as the last register restored (gp) isn't used in
the subsequent instruction.
This commit is contained in:
thorpej 2000-02-18 18:36:41 +00:00
parent 7481db1957
commit bb7c9c63f3
1 changed files with 13 additions and 14 deletions
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27
sys/arch/mips/mips/locore_mips1.S
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@ -1,4 +1,4 @@
/* $NetBSD: locore_mips1.S,v 1.19 2000/02/18 03:46:43 mycroft Exp $ */
/* $NetBSD: locore_mips1.S,v 1.20 2000/02/18 18:36:41 thorpej Exp $ */
/*
* Copyright (c) 1992, 1993
@ -268,19 +268,18 @@ NESTED_NOPROFILE(mips1_KernGenException, KERNFRAME_SIZ, ra)
lw ra, TF_BASE+TF_REG_RA(sp)
addu sp, sp, KERNFRAME_SIZ
#ifdef DDB
la k0, _C_LABEL(kdbaux)
lw s0, SF_REG_S0(k0)
lw s1, SF_REG_S1(k0)
lw s2, SF_REG_S2(k0)
lw s3, SF_REG_S3(k0)
lw s4, SF_REG_S4(k0)
lw s5, SF_REG_S5(k0)
lw s6, SF_REG_S6(k0)
lw s7, SF_REG_S7(k0)
lw sp, SF_REG_SP(k0)
lw s8, SF_REG_S8(k0)
lw gp, SF_REG_RA(k0)
nop # R3000 load delay slot
la k1, _C_LABEL(kdbaux)
lw s0, SF_REG_S0(k1)
lw s1, SF_REG_S1(k1)
lw s2, SF_REG_S2(k1)
lw s3, SF_REG_S3(k1)
lw s4, SF_REG_S4(k1)
lw s5, SF_REG_S5(k1)
lw s6, SF_REG_S6(k1)
lw s7, SF_REG_S7(k1)
lw sp, SF_REG_SP(k1)
lw s8, SF_REG_S8(k1)
lw gp, SF_REG_RA(k1)
#endif
j k0 # return to interrupted point
rfe