From ba98a0a811ac5b5af66055e40003e82a632b6128 Mon Sep 17 00:00:00 2001 From: msaitoh Date: Tue, 8 Jan 2019 03:14:51 +0000 Subject: [PATCH] Whitespace fixes. No functional change. --- sys/dev/mii/brgphy.c | 98 +++++++++++++++++++-------------------- sys/dev/mii/igphy.c | 6 +-- sys/dev/mii/makphy.c | 6 +-- sys/dev/mii/mii_physubr.c | 10 ++-- sys/dev/mii/mii_verbose.c | 6 +-- 5 files changed, 63 insertions(+), 63 deletions(-) diff --git a/sys/dev/mii/brgphy.c b/sys/dev/mii/brgphy.c index b58ab4f672ae..d154b2ad97ca 100644 --- a/sys/dev/mii/brgphy.c +++ b/sys/dev/mii/brgphy.c @@ -1,4 +1,4 @@ -/* $NetBSD: brgphy.c,v 1.76 2014/07/02 22:35:10 msaitoh Exp $ */ +/* $NetBSD: brgphy.c,v 1.77 2019/01/08 03:14:51 msaitoh Exp $ */ /*- * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc. @@ -62,7 +62,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: brgphy.c,v 1.76 2014/07/02 22:35:10 msaitoh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: brgphy.c,v 1.77 2019/01/08 03:14:51 msaitoh Exp $"); #include #include @@ -901,7 +901,7 @@ brgphy_reset(struct mii_softc *sc) PHY_WRITE(sc, BRGPHY_MII_DSP_ADDR_REG, 0x000a); - if (bsc->sc_phyflags + if (bsc->sc_phyflags & BGEPHYF_ADJUST_TRIM) { PHY_WRITE(sc, BRGPHY_MII_DSP_RW_PORT, 0x110b); @@ -933,8 +933,8 @@ brgphy_reset(struct mii_softc *sc) #if 0 /* Enable Link LED on Dell boxes */ if (bsc->sc_phyflags & BGEPHYF_NO_3LED) { - PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL, - PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL) + PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL, + PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL) & ~BRGPHY_PHY_EXTCTL_3_LED); } #endif @@ -945,48 +945,48 @@ brgphy_reset(struct mii_softc *sc) && sc->mii_mpd_model == MII_MODEL_BROADCOM2_BCM5708S) { /* Store autoneg capabilities/results in digital block (Page 0) */ PHY_WRITE(sc, BRGPHY_5708S_BLOCK_ADDR, BRGPHY_5708S_DIG3_PG2); - PHY_WRITE(sc, BRGPHY_5708S_PG2_DIGCTL_3_0, - BRGPHY_5708S_PG2_DIGCTL_3_0_USE_IEEE); + PHY_WRITE(sc, BRGPHY_5708S_PG2_DIGCTL_3_0, + BRGPHY_5708S_PG2_DIGCTL_3_0_USE_IEEE); PHY_WRITE(sc, BRGPHY_5708S_BLOCK_ADDR, BRGPHY_5708S_DIG_PG0); /* Enable fiber mode and autodetection */ - PHY_WRITE(sc, BRGPHY_5708S_PG0_1000X_CTL1, - PHY_READ(sc, BRGPHY_5708S_PG0_1000X_CTL1) | - BRGPHY_5708S_PG0_1000X_CTL1_AUTODET_EN | - BRGPHY_5708S_PG0_1000X_CTL1_FIBER_MODE); + PHY_WRITE(sc, BRGPHY_5708S_PG0_1000X_CTL1, + PHY_READ(sc, BRGPHY_5708S_PG0_1000X_CTL1) | + BRGPHY_5708S_PG0_1000X_CTL1_AUTODET_EN | + BRGPHY_5708S_PG0_1000X_CTL1_FIBER_MODE); /* Enable parallel detection */ - PHY_WRITE(sc, BRGPHY_5708S_PG0_1000X_CTL2, - PHY_READ(sc, BRGPHY_5708S_PG0_1000X_CTL2) | - BRGPHY_5708S_PG0_1000X_CTL2_PAR_DET_EN); + PHY_WRITE(sc, BRGPHY_5708S_PG0_1000X_CTL2, + PHY_READ(sc, BRGPHY_5708S_PG0_1000X_CTL2) | + BRGPHY_5708S_PG0_1000X_CTL2_PAR_DET_EN); /* Advertise 2.5G support through next page during autoneg */ if (bsc->sc_phyflags & BNX_PHY_2_5G_CAPABLE_FLAG) - PHY_WRITE(sc, BRGPHY_5708S_ANEG_NXT_PG_XMIT1, - PHY_READ(sc, BRGPHY_5708S_ANEG_NXT_PG_XMIT1) | - BRGPHY_5708S_ANEG_NXT_PG_XMIT1_25G); + PHY_WRITE(sc, BRGPHY_5708S_ANEG_NXT_PG_XMIT1, + PHY_READ(sc, BRGPHY_5708S_ANEG_NXT_PG_XMIT1) | + BRGPHY_5708S_ANEG_NXT_PG_XMIT1_25G); /* Increase TX signal amplitude */ if ((_BNX_CHIP_ID(bsc->sc_chipid) == BNX_CHIP_ID_5708_A0) || (_BNX_CHIP_ID(bsc->sc_chipid) == BNX_CHIP_ID_5708_B0) || (_BNX_CHIP_ID(bsc->sc_chipid) == BNX_CHIP_ID_5708_B1)) { - PHY_WRITE(sc, BRGPHY_5708S_BLOCK_ADDR, - BRGPHY_5708S_TX_MISC_PG5); - PHY_WRITE(sc, BRGPHY_5708S_PG5_TXACTL1, - PHY_READ(sc, BRGPHY_5708S_PG5_TXACTL1) & + PHY_WRITE(sc, BRGPHY_5708S_BLOCK_ADDR, + BRGPHY_5708S_TX_MISC_PG5); + PHY_WRITE(sc, BRGPHY_5708S_PG5_TXACTL1, + PHY_READ(sc, BRGPHY_5708S_PG5_TXACTL1) & ~BRGPHY_5708S_PG5_TXACTL1_VCM); - PHY_WRITE(sc, BRGPHY_5708S_BLOCK_ADDR, - BRGPHY_5708S_DIG_PG0); + PHY_WRITE(sc, BRGPHY_5708S_BLOCK_ADDR, + BRGPHY_5708S_DIG_PG0); } /* Backplanes use special driver/pre-driver/pre-emphasis values. */ if ((bsc->sc_shared_hwcfg & BNX_SHARED_HW_CFG_PHY_BACKPLANE) && (bsc->sc_port_hwcfg & BNX_PORT_HW_CFG_CFG_TXCTL3_MASK)) { - PHY_WRITE(sc, BRGPHY_5708S_BLOCK_ADDR, - BRGPHY_5708S_TX_MISC_PG5); - PHY_WRITE(sc, BRGPHY_5708S_PG5_TXACTL3, - bsc->sc_port_hwcfg & - BNX_PORT_HW_CFG_CFG_TXCTL3_MASK); + PHY_WRITE(sc, BRGPHY_5708S_BLOCK_ADDR, + BRGPHY_5708S_TX_MISC_PG5); + PHY_WRITE(sc, BRGPHY_5708S_PG5_TXACTL3, + bsc->sc_port_hwcfg & + BNX_PORT_HW_CFG_CFG_TXCTL3_MASK); PHY_WRITE(sc, BRGPHY_5708S_BLOCK_ADDR, BRGPHY_5708S_DIG_PG0); } @@ -1015,31 +1015,31 @@ brgphy_reset(struct mii_softc *sc) BRGPHY_5708S_ANEG_NXT_PG_XMIT1_25G); } - /* - * Select the Multi-Rate Backplane Ethernet block of - * the AN MMD. - */ - PHY_WRITE(sc, BRGPHY_BLOCK_ADDR, - BRGPHY_BLOCK_ADDR_MRBE); + /* + * Select the Multi-Rate Backplane Ethernet block of + * the AN MMD. + */ + PHY_WRITE(sc, BRGPHY_BLOCK_ADDR, + BRGPHY_BLOCK_ADDR_MRBE); - /* Enable MRBE speed autoneg. */ - PHY_WRITE(sc, BRGPHY_MRBE_MSG_PG5_NP, - PHY_READ(sc, BRGPHY_MRBE_MSG_PG5_NP) | - BRGPHY_MRBE_MSG_PG5_NP_MBRE | - BRGPHY_MRBE_MSG_PG5_NP_T2); + /* Enable MRBE speed autoneg. */ + PHY_WRITE(sc, BRGPHY_MRBE_MSG_PG5_NP, + PHY_READ(sc, BRGPHY_MRBE_MSG_PG5_NP) | + BRGPHY_MRBE_MSG_PG5_NP_MBRE | + BRGPHY_MRBE_MSG_PG5_NP_T2); - /* Select the Clause 73 User B0 block of the AN MMD. */ - PHY_WRITE(sc, BRGPHY_BLOCK_ADDR, - BRGPHY_BLOCK_ADDR_CL73_USER_B0); + /* Select the Clause 73 User B0 block of the AN MMD. */ + PHY_WRITE(sc, BRGPHY_BLOCK_ADDR, + BRGPHY_BLOCK_ADDR_CL73_USER_B0); - /* Enable MRBE speed autoneg. */ - PHY_WRITE(sc, BRGPHY_CL73_USER_B0_MBRE_CTL1, - BRGPHY_CL73_USER_B0_MBRE_CTL1_NP_AFT_BP | - BRGPHY_CL73_USER_B0_MBRE_CTL1_STA_MGR | - BRGPHY_CL73_USER_B0_MBRE_CTL1_ANEG); + /* Enable MRBE speed autoneg. */ + PHY_WRITE(sc, BRGPHY_CL73_USER_B0_MBRE_CTL1, + BRGPHY_CL73_USER_B0_MBRE_CTL1_NP_AFT_BP | + BRGPHY_CL73_USER_B0_MBRE_CTL1_STA_MGR | + BRGPHY_CL73_USER_B0_MBRE_CTL1_ANEG); - PHY_WRITE(sc, BRGPHY_BLOCK_ADDR, - BRGPHY_BLOCK_ADDR_COMBO_IEEE0); + PHY_WRITE(sc, BRGPHY_BLOCK_ADDR, + BRGPHY_BLOCK_ADDR_COMBO_IEEE0); } else if (_BNX_CHIP_NUM(bsc->sc_chipid) == BNX_CHIP_NUM_5709) { if (_BNX_CHIP_REV(bsc->sc_chipid) == BNX_CHIP_REV_Ax || diff --git a/sys/dev/mii/igphy.c b/sys/dev/mii/igphy.c index bd5e98458a98..d9bf7d0894c2 100644 --- a/sys/dev/mii/igphy.c +++ b/sys/dev/mii/igphy.c @@ -1,4 +1,4 @@ -/* $NetBSD: igphy.c,v 1.27 2017/07/06 08:09:05 msaitoh Exp $ */ +/* $NetBSD: igphy.c,v 1.28 2019/01/08 03:14:51 msaitoh Exp $ */ /* * The Intel copyright applies to the analog register setup, and the @@ -70,7 +70,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: igphy.c,v 1.27 2017/07/06 08:09:05 msaitoh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: igphy.c,v 1.28 2019/01/08 03:14:51 msaitoh Exp $"); #ifdef _KERNEL_OPT #include "opt_mii.h" @@ -506,7 +506,7 @@ igphy_smartspeed_workaround(struct mii_softc *sc) case WM_T_82547_2: break; default: - /* byebye */ + /* byebye */ return; } diff --git a/sys/dev/mii/makphy.c b/sys/dev/mii/makphy.c index 0638fcf9ebcd..e541e0abea70 100644 --- a/sys/dev/mii/makphy.c +++ b/sys/dev/mii/makphy.c @@ -1,4 +1,4 @@ -/* $NetBSD: makphy.c,v 1.48 2018/12/30 06:40:52 msaitoh Exp $ */ +/* $NetBSD: makphy.c,v 1.49 2019/01/08 03:14:51 msaitoh Exp $ */ /*- * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc. @@ -55,7 +55,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: makphy.c,v 1.48 2018/12/30 06:40:52 msaitoh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: makphy.c,v 1.49 2019/01/08 03:14:51 msaitoh Exp $"); #include #include @@ -203,7 +203,7 @@ makphyattach(device_t parent, device_t self, void *aux) case MII_MODEL_xxMARVELL_E1112: if (PHY_READ(sc, MAKPHY_ESSR) & ESSR_FIBER_LINK) sc->mii_flags |= MIIF_HAVEFIBER; - break; + break; default: break; } diff --git a/sys/dev/mii/mii_physubr.c b/sys/dev/mii/mii_physubr.c index b461425fab69..48616de16049 100644 --- a/sys/dev/mii/mii_physubr.c +++ b/sys/dev/mii/mii_physubr.c @@ -1,4 +1,4 @@ -/* $NetBSD: mii_physubr.c,v 1.82 2018/12/28 05:56:07 msaitoh Exp $ */ +/* $NetBSD: mii_physubr.c,v 1.83 2019/01/08 03:14:51 msaitoh Exp $ */ /*- * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc. @@ -35,7 +35,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: mii_physubr.c,v 1.82 2018/12/28 05:56:07 msaitoh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: mii_physubr.c,v 1.83 2019/01/08 03:14:51 msaitoh Exp $"); #include #include @@ -66,14 +66,14 @@ const char *mii_get_descr_stub(int oui, int model) return NULL; } -/* +/* * Routine to load the miiverbose kernel module as needed */ void mii_load_verbose(void) { if (mii_verbose_loaded == 0) module_autoload("miiverbose", MODULE_CLASS_MISC); -} +} static void mii_phy_statusmsg(struct mii_softc *); @@ -244,7 +244,7 @@ mii_phy_auto(struct mii_softc *sc, int waitfor) if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { anar &= ~(ANAR_T4|ANAR_TX_FD|ANAR_TX|ANAR_10_FD|ANAR_10); } - + PHY_WRITE(sc, MII_ANAR, anar); if (sc->mii_flags & MIIF_HAVE_GTCR) { uint16_t gtcr = 0; diff --git a/sys/dev/mii/mii_verbose.c b/sys/dev/mii/mii_verbose.c index ed449c30c742..3e2651939e42 100644 --- a/sys/dev/mii/mii_verbose.c +++ b/sys/dev/mii/mii_verbose.c @@ -1,4 +1,4 @@ -/* $NetBSD: mii_verbose.c,v 1.3 2010/07/25 14:44:34 pgoyette Exp $ */ +/* $NetBSD: mii_verbose.c,v 1.4 2019/01/08 03:14:51 msaitoh Exp $ */ /*- * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. @@ -55,7 +55,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: mii_verbose.c,v 1.3 2010/07/25 14:44:34 pgoyette Exp $"); +__KERNEL_RCSID(0, "$NetBSD: mii_verbose.c,v 1.4 2019/01/08 03:14:51 msaitoh Exp $"); #include #include @@ -90,7 +90,7 @@ miiverbose_modcmd(modcmd_t cmd, void *arg) default: return ENOTTY; } -} +} const char * mii_get_descr_real(int oui, int model) {