Move statistics updating code from wm_tick() to new wm_update_stats().
- To reuse. - No functional change.
This commit is contained in:
msaitoh
parent
87132aa835
commit
ba8e082a6a
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@ -1,4 +1,4 @@
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/* $NetBSD: if_wm.c,v 1.776 2023/05/11 07:19:02 msaitoh Exp $ */
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/* $NetBSD: if_wm.c,v 1.777 2023/05/11 07:27:09 msaitoh Exp $ */
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/*
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* Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
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@ -82,7 +82,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.776 2023/05/11 07:19:02 msaitoh Exp $");
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__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.777 2023/05/11 07:27:09 msaitoh Exp $");
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#ifdef _KERNEL_OPT
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#include "opt_if_wm.h"
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@ -884,6 +884,7 @@ static int wm_setup_msix(struct wm_softc *);
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static int wm_init(struct ifnet *);
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static int wm_init_locked(struct ifnet *);
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static void wm_init_sysctls(struct wm_softc *);
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static void wm_update_stats(struct wm_softc *);
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static void wm_unset_stopping_flags(struct wm_softc *);
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static void wm_set_stopping_flags(struct wm_softc *);
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static void wm_stop(struct ifnet *, int);
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@ -3881,8 +3882,6 @@ wm_tick(void *arg)
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{
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struct wm_softc *sc = arg;
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struct ifnet *ifp = &sc->sc_ethercom.ec_if;
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uint64_t crcerrs, algnerrc, symerrc, mpc, colc, sec, rlec, rxerrc,
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cexterr;
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mutex_enter(sc->sc_core_lock);
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@ -3891,180 +3890,7 @@ wm_tick(void *arg)
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return;
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}
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crcerrs = CSR_READ(sc, WMREG_CRCERRS);
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symerrc = CSR_READ(sc, WMREG_SYMERRC);
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mpc = CSR_READ(sc, WMREG_MPC);
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colc = CSR_READ(sc, WMREG_COLC);
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sec = CSR_READ(sc, WMREG_SEC);
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rlec = CSR_READ(sc, WMREG_RLEC);
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WM_EVCNT_ADD(&sc->sc_ev_crcerrs, crcerrs);
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WM_EVCNT_ADD(&sc->sc_ev_symerrc, symerrc);
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WM_EVCNT_ADD(&sc->sc_ev_mpc, mpc);
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WM_EVCNT_ADD(&sc->sc_ev_colc, colc);
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WM_EVCNT_ADD(&sc->sc_ev_sec, sec);
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WM_EVCNT_ADD(&sc->sc_ev_rlec, rlec);
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if (sc->sc_type >= WM_T_82543) {
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algnerrc = CSR_READ(sc, WMREG_ALGNERRC);
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rxerrc = CSR_READ(sc, WMREG_RXERRC);
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WM_EVCNT_ADD(&sc->sc_ev_algnerrc, algnerrc);
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WM_EVCNT_ADD(&sc->sc_ev_rxerrc, rxerrc);
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if ((sc->sc_type < WM_T_82575) || WM_IS_ICHPCH(sc)) {
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cexterr = CSR_READ(sc, WMREG_CEXTERR);
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WM_EVCNT_ADD(&sc->sc_ev_cexterr, cexterr);
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} else {
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cexterr = 0;
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/* Excessive collision + Link down */
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WM_EVCNT_ADD(&sc->sc_ev_htdpmc,
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CSR_READ(sc, WMREG_HTDPMC));
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}
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WM_EVCNT_ADD(&sc->sc_ev_tncrs, CSR_READ(sc, WMREG_TNCRS));
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WM_EVCNT_ADD(&sc->sc_ev_tsctc, CSR_READ(sc, WMREG_TSCTC));
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if ((sc->sc_type < WM_T_82575) || WM_IS_ICHPCH(sc))
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WM_EVCNT_ADD(&sc->sc_ev_tsctfc,
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CSR_READ(sc, WMREG_TSCTFC));
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else {
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WM_EVCNT_ADD(&sc->sc_ev_cbrmpc,
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CSR_READ(sc, WMREG_CBRMPC));
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}
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} else
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algnerrc = rxerrc = cexterr = 0;
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if (sc->sc_type >= WM_T_82542_2_1) {
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WM_EVCNT_ADD(&sc->sc_ev_rx_xon, CSR_READ(sc, WMREG_XONRXC));
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WM_EVCNT_ADD(&sc->sc_ev_tx_xon, CSR_READ(sc, WMREG_XONTXC));
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WM_EVCNT_ADD(&sc->sc_ev_rx_xoff, CSR_READ(sc, WMREG_XOFFRXC));
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WM_EVCNT_ADD(&sc->sc_ev_tx_xoff, CSR_READ(sc, WMREG_XOFFTXC));
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WM_EVCNT_ADD(&sc->sc_ev_rx_macctl, CSR_READ(sc, WMREG_FCRUC));
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}
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WM_EVCNT_ADD(&sc->sc_ev_scc, CSR_READ(sc, WMREG_SCC));
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WM_EVCNT_ADD(&sc->sc_ev_ecol, CSR_READ(sc, WMREG_ECOL));
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WM_EVCNT_ADD(&sc->sc_ev_mcc, CSR_READ(sc, WMREG_MCC));
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WM_EVCNT_ADD(&sc->sc_ev_latecol, CSR_READ(sc, WMREG_LATECOL));
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if ((sc->sc_type >= WM_T_I350) && !WM_IS_ICHPCH(sc)) {
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WM_EVCNT_ADD(&sc->sc_ev_cbtmpc, CSR_READ(sc, WMREG_CBTMPC));
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}
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WM_EVCNT_ADD(&sc->sc_ev_dc, CSR_READ(sc, WMREG_DC));
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WM_EVCNT_ADD(&sc->sc_ev_prc64, CSR_READ(sc, WMREG_PRC64));
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WM_EVCNT_ADD(&sc->sc_ev_prc127, CSR_READ(sc, WMREG_PRC127));
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WM_EVCNT_ADD(&sc->sc_ev_prc255, CSR_READ(sc, WMREG_PRC255));
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WM_EVCNT_ADD(&sc->sc_ev_prc511, CSR_READ(sc, WMREG_PRC511));
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WM_EVCNT_ADD(&sc->sc_ev_prc1023, CSR_READ(sc, WMREG_PRC1023));
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WM_EVCNT_ADD(&sc->sc_ev_prc1522, CSR_READ(sc, WMREG_PRC1522));
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WM_EVCNT_ADD(&sc->sc_ev_gprc, CSR_READ(sc, WMREG_GPRC));
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WM_EVCNT_ADD(&sc->sc_ev_bprc, CSR_READ(sc, WMREG_BPRC));
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WM_EVCNT_ADD(&sc->sc_ev_mprc, CSR_READ(sc, WMREG_MPRC));
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WM_EVCNT_ADD(&sc->sc_ev_gptc, CSR_READ(sc, WMREG_GPTC));
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WM_EVCNT_ADD(&sc->sc_ev_gorc,
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CSR_READ(sc, WMREG_GORCL) +
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((uint64_t)CSR_READ(sc, WMREG_GORCH) << 32));
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WM_EVCNT_ADD(&sc->sc_ev_gotc,
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CSR_READ(sc, WMREG_GOTCL) +
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((uint64_t)CSR_READ(sc, WMREG_GOTCH) << 32));
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WM_EVCNT_ADD(&sc->sc_ev_rnbc, CSR_READ(sc, WMREG_RNBC));
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WM_EVCNT_ADD(&sc->sc_ev_ruc, CSR_READ(sc, WMREG_RUC));
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WM_EVCNT_ADD(&sc->sc_ev_rfc, CSR_READ(sc, WMREG_RFC));
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WM_EVCNT_ADD(&sc->sc_ev_roc, CSR_READ(sc, WMREG_ROC));
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WM_EVCNT_ADD(&sc->sc_ev_rjc, CSR_READ(sc, WMREG_RJC));
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if (sc->sc_type >= WM_T_82540) {
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WM_EVCNT_ADD(&sc->sc_ev_mgtprc, CSR_READ(sc, WMREG_MGTPRC));
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WM_EVCNT_ADD(&sc->sc_ev_mgtpdc, CSR_READ(sc, WMREG_MGTPDC));
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WM_EVCNT_ADD(&sc->sc_ev_mgtptc, CSR_READ(sc, WMREG_MGTPTC));
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}
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/*
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* The TOR(L) register includes:
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* - Error
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* - Flow control
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* - Broadcast rejected (This note is described in 82574 and newer
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* datasheets. What does "broadcast rejected" mean?)
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*/
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WM_EVCNT_ADD(&sc->sc_ev_tor,
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CSR_READ(sc, WMREG_TORL) +
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((uint64_t)CSR_READ(sc, WMREG_TORH) << 32));
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WM_EVCNT_ADD(&sc->sc_ev_tot,
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CSR_READ(sc, WMREG_TOTL) +
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((uint64_t)CSR_READ(sc, WMREG_TOTH) << 32));
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WM_EVCNT_ADD(&sc->sc_ev_tpr, CSR_READ(sc, WMREG_TPR));
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WM_EVCNT_ADD(&sc->sc_ev_tpt, CSR_READ(sc, WMREG_TPT));
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WM_EVCNT_ADD(&sc->sc_ev_ptc64, CSR_READ(sc, WMREG_PTC64));
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WM_EVCNT_ADD(&sc->sc_ev_ptc127, CSR_READ(sc, WMREG_PTC127));
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WM_EVCNT_ADD(&sc->sc_ev_ptc255, CSR_READ(sc, WMREG_PTC255));
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WM_EVCNT_ADD(&sc->sc_ev_ptc511, CSR_READ(sc, WMREG_PTC511));
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WM_EVCNT_ADD(&sc->sc_ev_ptc1023, CSR_READ(sc, WMREG_PTC1023));
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WM_EVCNT_ADD(&sc->sc_ev_ptc1522, CSR_READ(sc, WMREG_PTC1522));
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WM_EVCNT_ADD(&sc->sc_ev_mptc, CSR_READ(sc, WMREG_MPTC));
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WM_EVCNT_ADD(&sc->sc_ev_bptc, CSR_READ(sc, WMREG_BPTC));
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WM_EVCNT_ADD(&sc->sc_ev_iac, CSR_READ(sc, WMREG_IAC));
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if (sc->sc_type < WM_T_82575) {
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WM_EVCNT_ADD(&sc->sc_ev_icrxptc, CSR_READ(sc, WMREG_ICRXPTC));
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WM_EVCNT_ADD(&sc->sc_ev_icrxatc, CSR_READ(sc, WMREG_ICRXATC));
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WM_EVCNT_ADD(&sc->sc_ev_ictxptc, CSR_READ(sc, WMREG_ICTXPTC));
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WM_EVCNT_ADD(&sc->sc_ev_ictxact, CSR_READ(sc, WMREG_ICTXATC));
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WM_EVCNT_ADD(&sc->sc_ev_ictxqec, CSR_READ(sc, WMREG_ICTXQEC));
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WM_EVCNT_ADD(&sc->sc_ev_ictxqmtc,
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CSR_READ(sc, WMREG_ICTXQMTC));
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WM_EVCNT_ADD(&sc->sc_ev_rxdmtc,
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CSR_READ(sc, WMREG_ICRXDMTC));
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WM_EVCNT_ADD(&sc->sc_ev_icrxoc, CSR_READ(sc, WMREG_ICRXOC));
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} else if (!WM_IS_ICHPCH(sc)) {
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WM_EVCNT_ADD(&sc->sc_ev_rpthc, CSR_READ(sc, WMREG_RPTHC));
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WM_EVCNT_ADD(&sc->sc_ev_debug1, CSR_READ(sc, WMREG_DEBUG1));
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WM_EVCNT_ADD(&sc->sc_ev_debug2, CSR_READ(sc, WMREG_DEBUG2));
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WM_EVCNT_ADD(&sc->sc_ev_debug3, CSR_READ(sc, WMREG_DEBUG3));
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WM_EVCNT_ADD(&sc->sc_ev_hgptc, CSR_READ(sc, WMREG_HGPTC));
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WM_EVCNT_ADD(&sc->sc_ev_debug4, CSR_READ(sc, WMREG_DEBUG4));
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WM_EVCNT_ADD(&sc->sc_ev_rxdmtc, CSR_READ(sc, WMREG_RXDMTC));
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WM_EVCNT_ADD(&sc->sc_ev_htcbdpc, CSR_READ(sc, WMREG_HTCBDPC));
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WM_EVCNT_ADD(&sc->sc_ev_hgorc,
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CSR_READ(sc, WMREG_HGORCL) +
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((uint64_t)CSR_READ(sc, WMREG_HGORCH) << 32));
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WM_EVCNT_ADD(&sc->sc_ev_hgotc,
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CSR_READ(sc, WMREG_HGOTCL) +
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((uint64_t)CSR_READ(sc, WMREG_HGOTCH) << 32));
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WM_EVCNT_ADD(&sc->sc_ev_lenerrs, CSR_READ(sc, WMREG_LENERRS));
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}
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if ((sc->sc_type >= WM_T_I350) && (sc->sc_type < WM_T_80003)) {
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WM_EVCNT_ADD(&sc->sc_ev_tlpic, CSR_READ(sc, WMREG_TLPIC));
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WM_EVCNT_ADD(&sc->sc_ev_rlpic, CSR_READ(sc, WMREG_RLPIC));
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if ((CSR_READ(sc, WMREG_MANC) & MANC_EN_BMC2OS) != 0) {
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WM_EVCNT_ADD(&sc->sc_ev_b2ogprc,
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CSR_READ(sc, WMREG_B2OGPRC));
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WM_EVCNT_ADD(&sc->sc_ev_o2bspc,
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CSR_READ(sc, WMREG_O2BSPC));
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WM_EVCNT_ADD(&sc->sc_ev_b2ospc,
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CSR_READ(sc, WMREG_B2OSPC));
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WM_EVCNT_ADD(&sc->sc_ev_o2bgptc,
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CSR_READ(sc, WMREG_O2BGPTC));
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}
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WM_EVCNT_ADD(&sc->sc_ev_scvpc, CSR_READ(sc, WMREG_SCVPC));
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WM_EVCNT_ADD(&sc->sc_ev_hrmpc, CSR_READ(sc, WMREG_HRMPC));
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}
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net_stat_ref_t nsr = IF_STAT_GETREF(ifp);
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if_statadd_ref(nsr, if_collisions, colc);
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if_statadd_ref(nsr, if_ierrors,
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crcerrs + algnerrc + symerrc + rxerrc + sec + cexterr + rlec);
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/*
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* WMREG_RNBC is incremented when there are no available buffers in
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* host memory. It does not mean the number of dropped packets, because
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* an Ethernet controller can receive packets in such case if there is
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* space in the phy's FIFO.
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*
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* If you want to know the nubmer of WMREG_RMBC, you should use such as
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* own EVCNT instead of if_iqdrops.
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*/
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if_statadd_ref(nsr, if_iqdrops, mpc);
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IF_STAT_PUTREF(ifp);
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wm_update_stats(sc);
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if (sc->sc_flags & WM_F_HAS_MII)
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mii_tick(&sc->sc_mii);
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@ -6699,6 +6525,189 @@ err:
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__func__, rv);
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}
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static void
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wm_update_stats(struct wm_softc *sc)
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{
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struct ifnet *ifp = &sc->sc_ethercom.ec_if;
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uint64_t crcerrs, algnerrc, symerrc, mpc, colc, sec, rlec, rxerrc,
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cexterr;
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crcerrs = CSR_READ(sc, WMREG_CRCERRS);
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symerrc = CSR_READ(sc, WMREG_SYMERRC);
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mpc = CSR_READ(sc, WMREG_MPC);
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colc = CSR_READ(sc, WMREG_COLC);
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sec = CSR_READ(sc, WMREG_SEC);
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rlec = CSR_READ(sc, WMREG_RLEC);
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WM_EVCNT_ADD(&sc->sc_ev_crcerrs, crcerrs);
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WM_EVCNT_ADD(&sc->sc_ev_symerrc, symerrc);
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WM_EVCNT_ADD(&sc->sc_ev_mpc, mpc);
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WM_EVCNT_ADD(&sc->sc_ev_colc, colc);
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WM_EVCNT_ADD(&sc->sc_ev_sec, sec);
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WM_EVCNT_ADD(&sc->sc_ev_rlec, rlec);
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if (sc->sc_type >= WM_T_82543) {
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algnerrc = CSR_READ(sc, WMREG_ALGNERRC);
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rxerrc = CSR_READ(sc, WMREG_RXERRC);
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WM_EVCNT_ADD(&sc->sc_ev_algnerrc, algnerrc);
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WM_EVCNT_ADD(&sc->sc_ev_rxerrc, rxerrc);
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if ((sc->sc_type < WM_T_82575) || WM_IS_ICHPCH(sc)) {
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cexterr = CSR_READ(sc, WMREG_CEXTERR);
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WM_EVCNT_ADD(&sc->sc_ev_cexterr, cexterr);
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} else {
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cexterr = 0;
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/* Excessive collision + Link down */
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WM_EVCNT_ADD(&sc->sc_ev_htdpmc,
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CSR_READ(sc, WMREG_HTDPMC));
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}
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WM_EVCNT_ADD(&sc->sc_ev_tncrs, CSR_READ(sc, WMREG_TNCRS));
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WM_EVCNT_ADD(&sc->sc_ev_tsctc, CSR_READ(sc, WMREG_TSCTC));
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if ((sc->sc_type < WM_T_82575) || WM_IS_ICHPCH(sc))
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WM_EVCNT_ADD(&sc->sc_ev_tsctfc,
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CSR_READ(sc, WMREG_TSCTFC));
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else {
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WM_EVCNT_ADD(&sc->sc_ev_cbrmpc,
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CSR_READ(sc, WMREG_CBRMPC));
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}
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} else
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algnerrc = rxerrc = cexterr = 0;
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if (sc->sc_type >= WM_T_82542_2_1) {
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WM_EVCNT_ADD(&sc->sc_ev_rx_xon, CSR_READ(sc, WMREG_XONRXC));
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WM_EVCNT_ADD(&sc->sc_ev_tx_xon, CSR_READ(sc, WMREG_XONTXC));
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WM_EVCNT_ADD(&sc->sc_ev_rx_xoff, CSR_READ(sc, WMREG_XOFFRXC));
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WM_EVCNT_ADD(&sc->sc_ev_tx_xoff, CSR_READ(sc, WMREG_XOFFTXC));
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WM_EVCNT_ADD(&sc->sc_ev_rx_macctl, CSR_READ(sc, WMREG_FCRUC));
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}
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WM_EVCNT_ADD(&sc->sc_ev_scc, CSR_READ(sc, WMREG_SCC));
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WM_EVCNT_ADD(&sc->sc_ev_ecol, CSR_READ(sc, WMREG_ECOL));
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WM_EVCNT_ADD(&sc->sc_ev_mcc, CSR_READ(sc, WMREG_MCC));
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WM_EVCNT_ADD(&sc->sc_ev_latecol, CSR_READ(sc, WMREG_LATECOL));
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if ((sc->sc_type >= WM_T_I350) && !WM_IS_ICHPCH(sc)) {
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WM_EVCNT_ADD(&sc->sc_ev_cbtmpc, CSR_READ(sc, WMREG_CBTMPC));
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}
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WM_EVCNT_ADD(&sc->sc_ev_dc, CSR_READ(sc, WMREG_DC));
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WM_EVCNT_ADD(&sc->sc_ev_prc64, CSR_READ(sc, WMREG_PRC64));
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WM_EVCNT_ADD(&sc->sc_ev_prc127, CSR_READ(sc, WMREG_PRC127));
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WM_EVCNT_ADD(&sc->sc_ev_prc255, CSR_READ(sc, WMREG_PRC255));
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WM_EVCNT_ADD(&sc->sc_ev_prc511, CSR_READ(sc, WMREG_PRC511));
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WM_EVCNT_ADD(&sc->sc_ev_prc1023, CSR_READ(sc, WMREG_PRC1023));
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WM_EVCNT_ADD(&sc->sc_ev_prc1522, CSR_READ(sc, WMREG_PRC1522));
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WM_EVCNT_ADD(&sc->sc_ev_gprc, CSR_READ(sc, WMREG_GPRC));
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WM_EVCNT_ADD(&sc->sc_ev_bprc, CSR_READ(sc, WMREG_BPRC));
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WM_EVCNT_ADD(&sc->sc_ev_mprc, CSR_READ(sc, WMREG_MPRC));
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WM_EVCNT_ADD(&sc->sc_ev_gptc, CSR_READ(sc, WMREG_GPTC));
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WM_EVCNT_ADD(&sc->sc_ev_gorc,
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CSR_READ(sc, WMREG_GORCL) +
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((uint64_t)CSR_READ(sc, WMREG_GORCH) << 32));
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WM_EVCNT_ADD(&sc->sc_ev_gotc,
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CSR_READ(sc, WMREG_GOTCL) +
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((uint64_t)CSR_READ(sc, WMREG_GOTCH) << 32));
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WM_EVCNT_ADD(&sc->sc_ev_rnbc, CSR_READ(sc, WMREG_RNBC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_ruc, CSR_READ(sc, WMREG_RUC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_rfc, CSR_READ(sc, WMREG_RFC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_roc, CSR_READ(sc, WMREG_ROC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_rjc, CSR_READ(sc, WMREG_RJC));
|
||||
|
||||
if (sc->sc_type >= WM_T_82540) {
|
||||
WM_EVCNT_ADD(&sc->sc_ev_mgtprc, CSR_READ(sc, WMREG_MGTPRC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_mgtpdc, CSR_READ(sc, WMREG_MGTPDC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_mgtptc, CSR_READ(sc, WMREG_MGTPTC));
|
||||
}
|
||||
|
||||
/*
|
||||
* The TOR(L) register includes:
|
||||
* - Error
|
||||
* - Flow control
|
||||
* - Broadcast rejected (This note is described in 82574 and newer
|
||||
* datasheets. What does "broadcast rejected" mean?)
|
||||
*/
|
||||
WM_EVCNT_ADD(&sc->sc_ev_tor,
|
||||
CSR_READ(sc, WMREG_TORL) +
|
||||
((uint64_t)CSR_READ(sc, WMREG_TORH) << 32));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_tot,
|
||||
CSR_READ(sc, WMREG_TOTL) +
|
||||
((uint64_t)CSR_READ(sc, WMREG_TOTH) << 32));
|
||||
|
||||
WM_EVCNT_ADD(&sc->sc_ev_tpr, CSR_READ(sc, WMREG_TPR));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_tpt, CSR_READ(sc, WMREG_TPT));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_ptc64, CSR_READ(sc, WMREG_PTC64));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_ptc127, CSR_READ(sc, WMREG_PTC127));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_ptc255, CSR_READ(sc, WMREG_PTC255));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_ptc511, CSR_READ(sc, WMREG_PTC511));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_ptc1023, CSR_READ(sc, WMREG_PTC1023));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_ptc1522, CSR_READ(sc, WMREG_PTC1522));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_mptc, CSR_READ(sc, WMREG_MPTC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_bptc, CSR_READ(sc, WMREG_BPTC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_iac, CSR_READ(sc, WMREG_IAC));
|
||||
if (sc->sc_type < WM_T_82575) {
|
||||
WM_EVCNT_ADD(&sc->sc_ev_icrxptc, CSR_READ(sc, WMREG_ICRXPTC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_icrxatc, CSR_READ(sc, WMREG_ICRXATC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_ictxptc, CSR_READ(sc, WMREG_ICTXPTC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_ictxact, CSR_READ(sc, WMREG_ICTXATC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_ictxqec, CSR_READ(sc, WMREG_ICTXQEC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_ictxqmtc,
|
||||
CSR_READ(sc, WMREG_ICTXQMTC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_rxdmtc,
|
||||
CSR_READ(sc, WMREG_ICRXDMTC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_icrxoc, CSR_READ(sc, WMREG_ICRXOC));
|
||||
} else if (!WM_IS_ICHPCH(sc)) {
|
||||
WM_EVCNT_ADD(&sc->sc_ev_rpthc, CSR_READ(sc, WMREG_RPTHC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_debug1, CSR_READ(sc, WMREG_DEBUG1));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_debug2, CSR_READ(sc, WMREG_DEBUG2));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_debug3, CSR_READ(sc, WMREG_DEBUG3));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_hgptc, CSR_READ(sc, WMREG_HGPTC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_debug4, CSR_READ(sc, WMREG_DEBUG4));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_rxdmtc, CSR_READ(sc, WMREG_RXDMTC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_htcbdpc, CSR_READ(sc, WMREG_HTCBDPC));
|
||||
|
||||
WM_EVCNT_ADD(&sc->sc_ev_hgorc,
|
||||
CSR_READ(sc, WMREG_HGORCL) +
|
||||
((uint64_t)CSR_READ(sc, WMREG_HGORCH) << 32));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_hgotc,
|
||||
CSR_READ(sc, WMREG_HGOTCL) +
|
||||
((uint64_t)CSR_READ(sc, WMREG_HGOTCH) << 32));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_lenerrs, CSR_READ(sc, WMREG_LENERRS));
|
||||
}
|
||||
if ((sc->sc_type >= WM_T_I350) && (sc->sc_type < WM_T_80003)) {
|
||||
WM_EVCNT_ADD(&sc->sc_ev_tlpic, CSR_READ(sc, WMREG_TLPIC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_rlpic, CSR_READ(sc, WMREG_RLPIC));
|
||||
if ((CSR_READ(sc, WMREG_MANC) & MANC_EN_BMC2OS) != 0) {
|
||||
WM_EVCNT_ADD(&sc->sc_ev_b2ogprc,
|
||||
CSR_READ(sc, WMREG_B2OGPRC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_o2bspc,
|
||||
CSR_READ(sc, WMREG_O2BSPC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_b2ospc,
|
||||
CSR_READ(sc, WMREG_B2OSPC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_o2bgptc,
|
||||
CSR_READ(sc, WMREG_O2BGPTC));
|
||||
}
|
||||
WM_EVCNT_ADD(&sc->sc_ev_scvpc, CSR_READ(sc, WMREG_SCVPC));
|
||||
WM_EVCNT_ADD(&sc->sc_ev_hrmpc, CSR_READ(sc, WMREG_HRMPC));
|
||||
}
|
||||
net_stat_ref_t nsr = IF_STAT_GETREF(ifp);
|
||||
if_statadd_ref(nsr, if_collisions, colc);
|
||||
if_statadd_ref(nsr, if_ierrors,
|
||||
crcerrs + algnerrc + symerrc + rxerrc + sec + cexterr + rlec);
|
||||
/*
|
||||
* WMREG_RNBC is incremented when there are no available buffers in
|
||||
* host memory. It does not mean the number of dropped packets, because
|
||||
* an Ethernet controller can receive packets in such case if there is
|
||||
* space in the phy's FIFO.
|
||||
*
|
||||
* If you want to know the nubmer of WMREG_RMBC, you should use such as
|
||||
* own EVCNT instead of if_iqdrops.
|
||||
*/
|
||||
if_statadd_ref(nsr, if_iqdrops, mpc);
|
||||
IF_STAT_PUTREF(ifp);
|
||||
}
|
||||
|
||||
/*
|
||||
* wm_init: [ifnet interface function]
|
||||
*
|
||||
|
|
|
|||
Loading…
Reference in New Issue