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move DWCGMAC_MPSAFE into dwc_gmac_var.h and introduce an 

additional define that is 0 or FDT_INTR_MPSAFE that the
frontends can use when passing to fdtbus_intr_establish().

with NET_MPSAFE enabled, this avoids hangs seen on rock64,
as well as finishing the MPSAFE port for this driver.

XXX: still don't know why the existing hangs occur.
This commit is contained in:
mrg 2019-07-21 08:24:32 +00:00
parent 5e2dcd85b1
commit ba5b08dff9
6 changed files with 33 additions and 20 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
sys/arch/arm/altera/cycv_gmac.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: cycv_gmac.c,v 1.3 2019/07/08 03:22:38 msaitoh Exp $ */
/* $NetBSD: cycv_gmac.c,v 1.4 2019/07/21 08:24:32 mrg Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
@ -30,7 +30,7 @@
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: cycv_gmac.c,v 1.3 2019/07/08 03:22:38 msaitoh Exp $");
__KERNEL_RCSID(0, "$NetBSD: cycv_gmac.c,v 1.4 2019/07/21 08:24:32 mrg Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@ -129,7 +129,7 @@ cycv_gmac_attach(device_t parent, device_t self, void *aux)
aprint_naive("\n");
aprint_normal(": GMAC\n");
if (fdtbus_intr_establish(phandle, 0, IPL_NET, 0,
if (fdtbus_intr_establish(phandle, 0, IPL_NET, DWCGMAC_FDT_INTR_MPSAFE,
cycv_gmac_intr, sc) == NULL) {
aprint_error_dev(self, "failed to establish interrupt on %s\n",
intrstr);

7
sys/arch/arm/amlogic/meson_dwmac.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: meson_dwmac.c,v 1.6 2019/07/08 03:22:38 msaitoh Exp $ */
/* $NetBSD: meson_dwmac.c,v 1.7 2019/07/21 08:24:32 mrg Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
@ -28,7 +28,7 @@
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: meson_dwmac.c,v 1.6 2019/07/08 03:22:38 msaitoh Exp $");
__KERNEL_RCSID(0, "$NetBSD: meson_dwmac.c,v 1.7 2019/07/21 08:24:32 mrg Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@ -218,7 +218,8 @@ meson_dwmac_attach(device_t parent, device_t self, void *aux)
aprint_naive("\n");
aprint_normal(": Gigabit Ethernet Controller\n");
if (fdtbus_intr_establish(phandle, 0, IPL_NET, 0, meson_dwmac_intr, sc) == NULL) {
if (fdtbus_intr_establish(phandle, 0, IPL_NET, DWCGMAC_FDT_INTR_MPSAFE,
meson_dwmac_intr, sc) == NULL) {
aprint_error_dev(self, "failed to establish interrupt on %s\n", intrstr);
return;
}

7
sys/arch/arm/rockchip/rk_gmac.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: rk_gmac.c,v 1.13 2019/07/08 03:22:38 msaitoh Exp $ */
/* $NetBSD: rk_gmac.c,v 1.14 2019/07/21 08:24:32 mrg Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill <jmcneill@invisible.ca>
@ -28,7 +28,7 @@
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: rk_gmac.c,v 1.13 2019/07/08 03:22:38 msaitoh Exp $");
__KERNEL_RCSID(0, "$NetBSD: rk_gmac.c,v 1.14 2019/07/21 08:24:32 mrg Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@ -421,7 +421,8 @@ rk_gmac_attach(device_t parent, device_t self, void *aux)
if (dwc_gmac_attach(sc, MII_PHY_ANY, GMAC_MII_CLK_150_250M_DIV102) != 0)
return;
if (fdtbus_intr_establish(phandle, 0, IPL_NET, 0, rk_gmac_intr, sc) == NULL) {
if (fdtbus_intr_establish(phandle, 0, IPL_NET, DWCGMAC_FDT_INTR_MPSAFE,
rk_gmac_intr, sc) == NULL) {
aprint_error_dev(self, "failed to establish interrupt on %s\n", intrstr);
return;
}

7
sys/arch/arm/sunxi/sunxi_gmac.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: sunxi_gmac.c,v 1.5 2019/07/08 03:22:38 msaitoh Exp $ */
/* $NetBSD: sunxi_gmac.c,v 1.6 2019/07/21 08:24:32 mrg Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
@ -28,7 +28,7 @@
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: sunxi_gmac.c,v 1.5 2019/07/08 03:22:38 msaitoh Exp $");
__KERNEL_RCSID(0, "$NetBSD: sunxi_gmac.c,v 1.6 2019/07/21 08:24:32 mrg Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@ -182,7 +182,8 @@ sunxi_gmac_attach(device_t parent, device_t self, void *aux)
aprint_naive("\n");
aprint_normal(": GMAC\n");
if (fdtbus_intr_establish(phandle, 0, IPL_NET, 0, sunxi_gmac_intr, sc) == NULL) {
if (fdtbus_intr_establish(phandle, 0, IPL_NET, DWCGMAC_FDT_INTR_MPSAFE,
sunxi_gmac_intr, sc) == NULL) {
aprint_error_dev(self, "failed to establish interrupt on %s\n", intrstr);
return;
}

10
sys/dev/ic/dwc_gmac.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: dwc_gmac.c,v 1.63 2019/07/08 03:22:38 msaitoh Exp $ */
/* $NetBSD: dwc_gmac.c,v 1.64 2019/07/21 08:24:32 mrg Exp $ */
/*-
* Copyright (c) 2013, 2014 The NetBSD Foundation, Inc.
@ -41,7 +41,7 @@
#include <sys/cdefs.h>
__KERNEL_RCSID(1, "$NetBSD: dwc_gmac.c,v 1.63 2019/07/08 03:22:38 msaitoh Exp $");
__KERNEL_RCSID(1, "$NetBSD: dwc_gmac.c,v 1.64 2019/07/21 08:24:32 mrg Exp $");
/* #define DWC_GMAC_DEBUG 1 */
@ -180,10 +180,6 @@ static void dwc_dump_status(struct dwc_gmac_softc *);
static void dwc_gmac_dump_ffilt(struct dwc_gmac_softc *, uint32_t);
#endif
#ifdef NET_MPSAFE
#define DWCGMAC_MPSAFE 1
#endif
int
dwc_gmac_attach(struct dwc_gmac_softc *sc, int phy_id, uint32_t mii_clk)
{
@ -698,7 +694,7 @@ fail:
static void
dwc_gmac_txdesc_sync(struct dwc_gmac_softc *sc, int start, int end, int ops)
{
/* 'end' is pointing one descriptor beyound the last we want to sync */
/* 'end' is pointing one descriptor beyond the last we want to sync */
if (end > start) {
bus_dmamap_sync(sc->sc_dmat, sc->sc_dma_ring_map,
TX_DESC_OFFSET(start),

16
sys/dev/ic/dwc_gmac_var.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: dwc_gmac_var.h,v 1.14 2019/07/08 03:22:38 msaitoh Exp $ */
/* $NetBSD: dwc_gmac_var.h,v 1.15 2019/07/21 08:24:32 mrg Exp $ */
/*-
* Copyright (c) 2013, 2014 The NetBSD Foundation, Inc.
@ -29,6 +29,20 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifdef _KERNEL_OPT
#include "opt_net_mpsafe.h"
#endif
/* Use DWCGMAC_MPSAFE inside the front-ends for interrupt handlers. */
#ifdef NET_MPSAFE
#define DWCGMAC_MPSAFE 1
#endif
#ifdef DWCGMAC_MPSAFE
#define DWCGMAC_FDT_INTR_MPSAFE FDT_INTR_MPSAFE
#else
#define DWCGMAC_FDT_INTR_MPSAFE 0
#endif
/*
* We could use 1024 DMA descriptors to fill up an 8k page (each is 16 byte).