The TLB flush IPIs do not respect the IPL, so enforcing IPL_HIGH has no
effect. Disable interrupts earlier instead. This prevents a possible race against such IPIs.
This commit is contained in:
parent
ba69e4b56c
commit
ba4f5bd862
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@ -1,4 +1,4 @@
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/* $NetBSD: nvmm_x86_svm.c,v 1.63 2020/07/03 16:09:54 maxv Exp $ */
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/* $NetBSD: nvmm_x86_svm.c,v 1.64 2020/07/19 06:36:37 maxv Exp $ */
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/*
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* Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
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@ -30,7 +30,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.63 2020/07/03 16:09:54 maxv Exp $");
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__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.64 2020/07/19 06:36:37 maxv Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -56,6 +56,18 @@ __KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.63 2020/07/03 16:09:54 maxv Exp $
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int svm_vmrun(paddr_t, uint64_t *);
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static inline void
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svm_clgi(void)
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{
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asm volatile ("clgi" ::: "memory");
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}
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static inline void
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svm_stgi(void)
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{
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asm volatile ("stgi" ::: "memory");
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}
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#define MSR_VM_HSAVE_PA 0xC0010117
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/* -------------------------------------------------------------------------- */
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@ -1347,7 +1359,7 @@ svm_vcpu_run(struct nvmm_machine *mach, struct nvmm_cpu *vcpu,
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struct svm_cpudata *cpudata = vcpu->cpudata;
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struct vmcb *vmcb = cpudata->vmcb;
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uint64_t machgen;
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int hcpu, s;
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int hcpu;
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if (__predict_false(svm_vcpu_event_commit(vcpu) != 0)) {
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return EINVAL;
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@ -1382,11 +1394,11 @@ svm_vcpu_run(struct nvmm_machine *mach, struct nvmm_cpu *vcpu,
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svm_vmcb_cache_flush(vmcb, VMCB_CTRL_VMCB_CLEAN_I);
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}
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s = splhigh();
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svm_clgi();
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machgen = svm_htlb_flush(machdata, cpudata);
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svm_vmrun(cpudata->vmcb_pa, cpudata->gprs);
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svm_htlb_flush_ack(cpudata, machgen);
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splx(s);
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svm_stgi();
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svm_vmcb_cache_default(vmcb);
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@ -1,7 +1,7 @@
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/* $NetBSD: nvmm_x86_svmfunc.S,v 1.3 2019/04/24 18:45:15 maxv Exp $ */
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/* $NetBSD: nvmm_x86_svmfunc.S,v 1.4 2020/07/19 06:36:37 maxv Exp $ */
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/*
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* Copyright (c) 2018 The NetBSD Foundation, Inc.
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* Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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@ -136,9 +136,6 @@ ENTRY(svm_vmrun)
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/* Save the Host GPRs. */
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HOST_SAVE_GPRS
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/* Disable Host interrupts. */
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clgi
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/* Save the Host TR. */
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HOST_SAVE_TR
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@ -189,9 +186,6 @@ ENTRY(svm_vmrun)
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/* Restore the Host TR. */
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HOST_RESTORE_TR
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/* Enable Host interrupts. */
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stgi
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/* Restore the Host GPRs. */
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HOST_RESTORE_GPRS
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@ -1,4 +1,4 @@
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/* $NetBSD: nvmm_x86_vmx.c,v 1.63 2020/07/18 20:56:53 maxv Exp $ */
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/* $NetBSD: nvmm_x86_vmx.c,v 1.64 2020/07/19 06:36:37 maxv Exp $ */
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/*
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* Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
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@ -30,7 +30,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.63 2020/07/18 20:56:53 maxv Exp $");
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__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.64 2020/07/19 06:36:37 maxv Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -178,6 +178,18 @@ vmx_vmclear(paddr_t *pa)
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);
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}
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static inline void
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vmx_cli(void)
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{
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asm volatile ("cli" ::: "memory");
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}
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static inline void
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vmx_sti(void)
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{
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asm volatile ("sti" ::: "memory");
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}
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#define MSR_IA32_FEATURE_CONTROL 0x003A
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#define IA32_FEATURE_CONTROL_LOCK __BIT(0)
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#define IA32_FEATURE_CONTROL_IN_SMX __BIT(1)
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@ -2043,7 +2055,7 @@ vmx_vcpu_run(struct nvmm_machine *mach, struct nvmm_cpu *vcpu,
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uint64_t exitcode;
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uint64_t intstate;
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uint64_t machgen;
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int hcpu, s, ret;
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int hcpu, ret;
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bool launched;
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vmx_vmcs_enter(vcpu);
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cpudata->gtsc_want_update = false;
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}
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s = splhigh();
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vmx_cli();
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machgen = vmx_htlb_flush(machdata, cpudata);
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lcr2(cpudata->gcr2);
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if (launched) {
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}
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cpudata->gcr2 = rcr2();
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vmx_htlb_flush_ack(cpudata, machgen);
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splx(s);
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vmx_sti();
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if (__predict_false(ret != 0)) {
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vmx_exit_invalid(exit, -1);
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@ -1,7 +1,7 @@
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/* $NetBSD: nvmm_x86_vmxfunc.S,v 1.3 2019/04/27 08:16:19 maxv Exp $ */
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/* $NetBSD: nvmm_x86_vmxfunc.S,v 1.4 2020/07/19 06:36:37 maxv Exp $ */
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/*
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* Copyright (c) 2018 The NetBSD Foundation, Inc.
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* Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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@ -150,9 +150,6 @@ ENTRY(vmx_vmlaunch)
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/* Save the Host GPRs. */
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HOST_SAVE_GPRS
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/* Disable Host interrupts. */
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cli
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/* Save the Host LDT. */
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HOST_SAVE_LDT
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/* Failure. */
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addq $8,%rsp
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HOST_RESTORE_LDT
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sti
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HOST_RESTORE_GPRS
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movq $-1,%rax
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retq
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@ -187,9 +183,6 @@ ENTRY(vmx_vmresume)
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/* Save the Host GPRs. */
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HOST_SAVE_GPRS
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/* Disable Host interrupts. */
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cli
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/* Save the Host LDT. */
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HOST_SAVE_LDT
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/* Failure. */
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addq $8,%rsp
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HOST_RESTORE_LDT
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sti
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HOST_RESTORE_GPRS
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movq $-1,%rax
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retq
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/* Restore the Host LDT. */
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HOST_RESTORE_LDT
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/* Enable Host interrupts. */
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sti
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/* Restore the Host GPRs. */
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HOST_RESTORE_GPRS
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