The TLB flush IPIs do not respect the IPL, so enforcing IPL_HIGH has no

effect. Disable interrupts earlier instead. This prevents a possible race
against such IPIs.
This commit is contained in:
maxv 2020-07-19 06:36:37 +00:00
parent ba69e4b56c
commit ba4f5bd862
4 changed files with 38 additions and 31 deletions

View File

@ -1,4 +1,4 @@
/* $NetBSD: nvmm_x86_svm.c,v 1.63 2020/07/03 16:09:54 maxv Exp $ */
/* $NetBSD: nvmm_x86_svm.c,v 1.64 2020/07/19 06:36:37 maxv Exp $ */
/*
* Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.63 2020/07/03 16:09:54 maxv Exp $");
__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.64 2020/07/19 06:36:37 maxv Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -56,6 +56,18 @@ __KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.63 2020/07/03 16:09:54 maxv Exp $
int svm_vmrun(paddr_t, uint64_t *);
static inline void
svm_clgi(void)
{
asm volatile ("clgi" ::: "memory");
}
static inline void
svm_stgi(void)
{
asm volatile ("stgi" ::: "memory");
}
#define MSR_VM_HSAVE_PA 0xC0010117
/* -------------------------------------------------------------------------- */
@ -1347,7 +1359,7 @@ svm_vcpu_run(struct nvmm_machine *mach, struct nvmm_cpu *vcpu,
struct svm_cpudata *cpudata = vcpu->cpudata;
struct vmcb *vmcb = cpudata->vmcb;
uint64_t machgen;
int hcpu, s;
int hcpu;
if (__predict_false(svm_vcpu_event_commit(vcpu) != 0)) {
return EINVAL;
@ -1382,11 +1394,11 @@ svm_vcpu_run(struct nvmm_machine *mach, struct nvmm_cpu *vcpu,
svm_vmcb_cache_flush(vmcb, VMCB_CTRL_VMCB_CLEAN_I);
}
s = splhigh();
svm_clgi();
machgen = svm_htlb_flush(machdata, cpudata);
svm_vmrun(cpudata->vmcb_pa, cpudata->gprs);
svm_htlb_flush_ack(cpudata, machgen);
splx(s);
svm_stgi();
svm_vmcb_cache_default(vmcb);

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@ -1,7 +1,7 @@
/* $NetBSD: nvmm_x86_svmfunc.S,v 1.3 2019/04/24 18:45:15 maxv Exp $ */
/* $NetBSD: nvmm_x86_svmfunc.S,v 1.4 2020/07/19 06:36:37 maxv Exp $ */
/*
* Copyright (c) 2018 The NetBSD Foundation, Inc.
* Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
@ -136,9 +136,6 @@ ENTRY(svm_vmrun)
/* Save the Host GPRs. */
HOST_SAVE_GPRS
/* Disable Host interrupts. */
clgi
/* Save the Host TR. */
HOST_SAVE_TR
@ -189,9 +186,6 @@ ENTRY(svm_vmrun)
/* Restore the Host TR. */
HOST_RESTORE_TR
/* Enable Host interrupts. */
stgi
/* Restore the Host GPRs. */
HOST_RESTORE_GPRS

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@ -1,4 +1,4 @@
/* $NetBSD: nvmm_x86_vmx.c,v 1.63 2020/07/18 20:56:53 maxv Exp $ */
/* $NetBSD: nvmm_x86_vmx.c,v 1.64 2020/07/19 06:36:37 maxv Exp $ */
/*
* Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.63 2020/07/18 20:56:53 maxv Exp $");
__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.64 2020/07/19 06:36:37 maxv Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -178,6 +178,18 @@ vmx_vmclear(paddr_t *pa)
);
}
static inline void
vmx_cli(void)
{
asm volatile ("cli" ::: "memory");
}
static inline void
vmx_sti(void)
{
asm volatile ("sti" ::: "memory");
}
#define MSR_IA32_FEATURE_CONTROL 0x003A
#define IA32_FEATURE_CONTROL_LOCK __BIT(0)
#define IA32_FEATURE_CONTROL_IN_SMX __BIT(1)
@ -2043,7 +2055,7 @@ vmx_vcpu_run(struct nvmm_machine *mach, struct nvmm_cpu *vcpu,
uint64_t exitcode;
uint64_t intstate;
uint64_t machgen;
int hcpu, s, ret;
int hcpu, ret;
bool launched;
vmx_vmcs_enter(vcpu);
@ -2088,7 +2100,7 @@ vmx_vcpu_run(struct nvmm_machine *mach, struct nvmm_cpu *vcpu,
cpudata->gtsc_want_update = false;
}
s = splhigh();
vmx_cli();
machgen = vmx_htlb_flush(machdata, cpudata);
lcr2(cpudata->gcr2);
if (launched) {
@ -2098,7 +2110,7 @@ vmx_vcpu_run(struct nvmm_machine *mach, struct nvmm_cpu *vcpu,
}
cpudata->gcr2 = rcr2();
vmx_htlb_flush_ack(cpudata, machgen);
splx(s);
vmx_sti();
if (__predict_false(ret != 0)) {
vmx_exit_invalid(exit, -1);

View File

@ -1,7 +1,7 @@
/* $NetBSD: nvmm_x86_vmxfunc.S,v 1.3 2019/04/27 08:16:19 maxv Exp $ */
/* $NetBSD: nvmm_x86_vmxfunc.S,v 1.4 2020/07/19 06:36:37 maxv Exp $ */
/*
* Copyright (c) 2018 The NetBSD Foundation, Inc.
* Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
@ -150,9 +150,6 @@ ENTRY(vmx_vmlaunch)
/* Save the Host GPRs. */
HOST_SAVE_GPRS
/* Disable Host interrupts. */
cli
/* Save the Host LDT. */
HOST_SAVE_LDT
@ -174,7 +171,6 @@ ENTRY(vmx_vmlaunch)
/* Failure. */
addq $8,%rsp
HOST_RESTORE_LDT
sti
HOST_RESTORE_GPRS
movq $-1,%rax
retq
@ -187,9 +183,6 @@ ENTRY(vmx_vmresume)
/* Save the Host GPRs. */
HOST_SAVE_GPRS
/* Disable Host interrupts. */
cli
/* Save the Host LDT. */
HOST_SAVE_LDT
@ -211,7 +204,6 @@ ENTRY(vmx_vmresume)
/* Failure. */
addq $8,%rsp
HOST_RESTORE_LDT
sti
HOST_RESTORE_GPRS
movq $-1,%rax
retq
@ -232,9 +224,6 @@ ENTRY(vmx_resume_rip)
/* Restore the Host LDT. */
HOST_RESTORE_LDT
/* Enable Host interrupts. */
sti
/* Restore the Host GPRs. */
HOST_RESTORE_GPRS