3-level MMU changes: software MMU data structures now display a VM model
consisting of `regions', `segments' and `page maps'.
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pk
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c6bf93b06b
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ba43a19831
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@ -1,4 +1,4 @@
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/* $NetBSD: pmap.h,v 1.14 1995/04/10 12:42:23 mycroft Exp $ */
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/* $NetBSD: pmap.h,v 1.15 1995/04/13 13:48:54 pk Exp $ */
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/*
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* Copyright (c) 1992, 1993
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@ -103,8 +103,10 @@
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* have no software copies. Its mmu entries are nonetheless kept on lists
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* so that the code that fiddles with mmu lists has something to fiddle.
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*/
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#define NKSEG ((int)((-(unsigned)KERNBASE) / NBPSG)) /* i.e., 512 */
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#define NUSEG (4096 - NKSEG) /* i.e., 3584 */
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#define NKREG ((int)((-(unsigned)KERNBASE) / NBPRG)) /* i.e., 8 */
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#define NUREG (256 - NKREG) /* i.e., 248 */
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TAILQ_HEAD(mmuhd,mmuentry);
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/* data appearing in both user and kernel pmaps */
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struct pmap {
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@ -114,29 +116,29 @@ struct pmap {
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simple_lock_data_t pm_lock; /* spinlock */
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#endif
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int pm_refcount; /* just what it says */
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struct mmuentry *pm_mmuforw; /* pmap pmeg chain */
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struct mmuentry **pm_mmuback; /* (two way street) */
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void *pm_segstore;
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pmeg_t *pm_segmap; /* points to pm_rsegmap per above */
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u_char *pm_npte; /* points to pm_rnpte */
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int **pm_pte; /* points to pm_rpte */
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int pm_gap_start; /* Starting with this vseg there's */
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int pm_gap_end; /* no valid mapping until here */
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#ifdef MMU_3L
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struct mmuhd pm_reglist; /* MMU regions on this pmap */
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#endif
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struct mmuhd pm_seglist; /* MMU segments on this pmap */
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void *pm_regstore;
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struct regmap *pm_regmap;
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int pm_gap_start; /* Starting with this vreg there's */
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int pm_gap_end; /* no valid mapping until here */
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struct pmap_statistics pm_stats; /* pmap statistics */
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};
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/* data appearing only in user pmaps */
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struct usegmap {
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pmeg_t us_segmap[NUSEG]; /* segment map */
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u_char us_npte[NUSEG]; /* number of valid PTEs per seg */
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int *us_pte[NUSEG]; /* points to PTEs for valid segments */
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struct regmap {
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struct segmap *rg_segmap; /* point to NSGPRG PMEGs */
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smeg_t rg_smeg; /* the MMU region number */
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u_char rg_nsegmap; /* number of valid PMEGS */
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};
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/* data appearing only in the kernel pmap */
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struct ksegmap {
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pmeg_t ks_segmap[NKSEG]; /* segment map */
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u_char ks_npte[NKSEG]; /* number of valid PTEs per kseg */
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int *ks_pte[NKSEG]; /* always NULL */
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struct segmap {
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int *sg_pte; /* points to NPTESG PTEs */
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pmeg_t sg_pmeg; /* the MMU segment number */
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u_char sg_npte; /* number of valid PTEs per seg */
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};
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typedef struct pmap *pmap_t;
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@ -146,7 +148,6 @@ typedef struct pmap *pmap_t;
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#define PMAP_NULL ((pmap_t)0)
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extern struct pmap kernel_pmap_store;
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extern struct ksegmap kernel_segmap_store;
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extern vm_offset_t vm_first_phys, vm_num_phys;
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/*
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@ -164,7 +165,7 @@ extern vm_offset_t vm_first_phys, vm_num_phys;
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#define PMAP_NC 4 /* tells pmap_enter to set PG_NC */
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#define PMAP_TNC 7 /* mask to get PG_TYPE & PG_NC */
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void pmap_bootstrap __P((int nmmu, int nctx));
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void pmap_bootstrap __P((int nmmu, int nctx, int nregion));
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int pmap_count_ptes __P((struct pmap *));
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vm_offset_t pmap_prefer __P((vm_offset_t, vm_offset_t));
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int pmap_pa_exists __P((vm_offset_t));
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@ -1,4 +1,4 @@
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/* $NetBSD: pte.h,v 1.7 1994/11/20 20:53:26 deraadt Exp $ */
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/* $NetBSD: pte.h,v 1.8 1995/04/13 13:48:46 pk Exp $ */
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/*
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* Copyright (c) 1992, 1993
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@ -56,23 +56,40 @@
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* 64 (sun4c) PTEs.
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*/
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typedef u_short pmeg_t; /* 9 bits needed per Sun-4 segmap entry */
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/*
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* Region maps contain `smeg' (Segment Entry Group) numbers.
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* An SMEG is simply an index that names a group of 64 PMEGs
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*/
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typedef u_char smeg_t; /* 6 bits needed per Sun-4 regmap entry */
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#endif
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/*
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* Address translation works as follows:
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*
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* (for sun4c and 2-level sun4)
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* 1. test va<31:29> -- these must be 000 or 111 (or you get a fault)
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* 2. concatenate context_reg<2:0> and va<29:18> to get a 15 bit number;
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* use this to index the segment maps, yeilding a 7 or 9 bit value.
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* use this to index the segment maps, yielding a 7 or 9 bit value.
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* (for 3-level sun4)
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* 1. concatenate context_reg<3:0> and va<31:24> to get a 8 bit number;
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* use this to index the region maps, yielding a 10 bit value.
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* 2. take the value from (1) above and concatenate va<17:12> to
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* get a `segment map entry' index. This gives a 9 bit value.
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* (for sun4c)
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* 3. take the value from (2) above and concatenate va<17:12> to
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* get a `page map entry' index. This gives a 32-bit PTE.
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* (for sun4)
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* 3. take the value from (2) above and concatenate va<17:13> to
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* 3. take the value from (2 or 3) above and concatenate va<17:13> to
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* get a `page map entry' index. This gives a 32-bit PTE.
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*
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* In other words:
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*
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* struct sun4_3_levelmmu_virtual_addr {
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* u_int va_reg:8, (virtual region)
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* va_seg:6, (virtual segment)
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* va_pg:5, (virtual page within segment)
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* va_off:13; (offset within page)
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* };
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* struct sun4_virtual_addr {
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* u_int :2, (required to be the same as bit 29)
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* va_seg:12, (virtual segment)
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@ -88,12 +105,17 @@ typedef u_short pmeg_t; /* 9 bits needed per Sun-4 segmap entry */
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*
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* Then, given any `va':
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*
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* extern smeg_t regmap[16][1<<8]; (3-level MMU only)
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* extern pmeg_t segmap[8][1<<12]; ([16][1<<12] for sun4)
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* extern int ptetable[128][1<<6]; ([512][1<<5] for sun4)
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*
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* (the above being in the hardware, accessed as Alternate Address Spaces)
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*
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* physseg = segmap[curr_ctx][va.va_seg];
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* if (mmu_3l)
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* physreg = regmap[curr_ctx][va.va_reg];
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* physseg = segmap[physreg][va.va_seg];
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* else
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* physseg = segmap[curr_ctx][va.va_seg];
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* pte = ptetable[physseg][va.va_pg];
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* if (!(pte & PG_V)) TRAP();
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* if (writing && !pte.pg_w) TRAP();
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@ -105,6 +127,19 @@ typedef u_short pmeg_t; /* 9 bits needed per Sun-4 segmap entry */
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* physadr = ((pte & PG_PFNUM) << PGSHIFT) | va.va_off;
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*/
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#if defined(MMU_3L) && !defined(SUN4)
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#error "configuration error"
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#endif
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#if defined(MMU_3L)
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extern int mmu_3l;
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#endif
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#define NBPRG (1 << 24) /* bytes per segment */
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#define RGSHIFT 24 /* log2(NBPSG) */
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#define RGOFSET (NBPRG - 1) /* mask for segment offset */
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#define NSEGRG (NBPRG / NBPSG) /* segments per region */
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#define NBPSG (1 << 18) /* bytes per segment */
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#define SGSHIFT 18 /* log2(NBPSG) */
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#define SGOFSET (NBPSG - 1) /* mask for segment offset */
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@ -117,18 +152,34 @@ extern int nptesg;
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#define NPTESG (NBPSG / NBPG)
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#endif
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/* virtual address to virtual region number */
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#define VA_VREG(va) (((unsigned int)(va) >> RGSHIFT) & 255)
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/* virtual address to virtual segment number */
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#define VA_VSEG(va) (((int)(va) >> SGSHIFT) & 0xfff)
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#define VA_VSEG(va) (((unsigned int)(va) >> SGSHIFT) & 63)
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/* virtual address to virtual page number, for Sun-4 and Sun-4c */
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#define VA_SUN4_VPG(va) (((int)(va) >> 13) & 31)
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#define VA_SUN4C_VPG(va) (((int)(va) >> 12) & 63)
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/* truncate virtual address to region base */
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#define VA_ROUNDDOWNTOREG(va) ((int)(va) & ~RGOFSET)
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/* truncate virtual address to segment base */
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#define VA_ROUNDDOWNTOSEG(va) ((int)(va) & ~SGOFSET)
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/* virtual segment to virtual address (must sign extend!) */
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#define VSTOVA(vseg) (((int)(vseg) << 20) >> 2)
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/* virtual segment to virtual address (must sign extend on holy MMUs!) */
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#if defined(MMU_3L)
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#define VRTOVA(vr) (mmu_3l \
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? ((int)(vr) << RGSHIFT) \
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: (((int)(vr) << (RGSHIFT+2)) >> 2))
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#define VSTOVA(vr,vs) (mmu_3l \
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? (((int)vr << RGSHIFT) + ((int)vs << SGSHIFT)) \
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: ((((int)vr << (RGSHIFT+2)) >> 2) + ((int)vs << SGSHIFT)))
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#else
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#define VRTOVA(vr) (((int)vr << (RGSHIFT+2)) >> 2)
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#define VSTOVA(vr,vs) ((((int)vr << (RGSHIFT+2)) >> 2) + ((int)vs << SGSHIFT))
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#endif
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#if defined(SUN4) && defined(SUN4C)
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#define VA_VPG(va) (cputyp==CPU_SUN4C ? VA_SUN4C_VPG(va) : VA_SUN4_VPG(va))
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