From ba2882488ac80b75f0ca0e593a30eee7d6df7bea Mon Sep 17 00:00:00 2001 From: fvdl Date: Thu, 10 May 2001 22:57:44 +0000 Subject: [PATCH] Despite what the hardware docs say, the global reset command is not done when the command-in-progress bit has been cleared. The 1ms time that is mentioned also seems wrong; 20,000us is not enough on at least one machine. So, do a delay(100000) in ex_reset. Fortunately, this function is only called when the card is attached or when hardware failure is suspected. While here, only mask one 1 bit in the 'reset hack' case. --- sys/dev/ic/elinkxl.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/sys/dev/ic/elinkxl.c b/sys/dev/ic/elinkxl.c index cd04fd5ac62a..05c104cf033f 100644 --- a/sys/dev/ic/elinkxl.c +++ b/sys/dev/ic/elinkxl.c @@ -1,4 +1,4 @@ -/* $NetBSD: elinkxl.c,v 1.48 2001/04/26 08:21:51 kanaoka Exp $ */ +/* $NetBSD: elinkxl.c,v 1.49 2001/05/10 22:57:44 fvdl Exp $ */ /*- * Copyright (c) 1998 The NetBSD Foundation, Inc. @@ -1402,9 +1402,14 @@ ex_reset(sc) u_int16_t val = GLOBAL_RESET; if (sc->ex_conf & EX_CONF_RESETHACK) - val |= 0xff; + val |= 0x10; bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, val); - delay(400); + /* + * XXX apparently the command in progress bit can't be trusted + * during a reset, so we just always wait this long. Fortunately + * we normally only reset the chip during autoconfig. + */ + delay(100000); ex_waitcmd(sc); }