Move spl macros from <machine/param.h> to <machine/intr.h>
Fix botch on my part and make the IPL_* match reality on VAX. Redefine spl macro using the symbolic IPL_ instead of being hardcoded. Move schedsoftnet, schedsoftclock from <machine/cpu.h> to <machine/intr.h> Add a _setsirr macro for schedsoft*. Add softintr function and framework.
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matt
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.h,v 1.49 2000/05/31 23:55:52 matt Exp $ */
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/* $NetBSD: cpu.h,v 1.50 2000/06/02 21:47:02 matt Exp $ */
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/*
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* Copyright (c) 1994 Ludd, University of Lule}, Sweden
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@ -111,9 +111,6 @@ struct cpu_info {
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extern int mastercpu;
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#define setsoftnet() mtpr(12,PR_SIRR)
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#define setsoftclock() mtpr(8,PR_SIRR)
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/*
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* Notify the current process (p) that it has a signal pending,
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* process as soon as possible.
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@ -1,4 +1,4 @@
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/* $NetBSD: intr.h,v 1.1 1998/08/18 23:55:00 matt Exp $ */
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/* $NetBSD: intr.h,v 1.2 2000/06/02 21:47:02 matt Exp $ */
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/*
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* Copyright (c) 1998 Matt Thomas.
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@ -32,19 +32,33 @@
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#ifndef _VAX_INTR_H_
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#define _VAX_INTR_H_
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#include <sys/queue.h>
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/* Define the various Interrupt Priority Levels */
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/* Interrupt Priority Levels are not mutually exclusive. */
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#define IPL_BIO 0 /* block I/O */
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#define IPL_NET 1 /* network */
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#define IPL_TTY 2 /* terminal */
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#define IPL_IMP 3 /* memory allocation */
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#define IPL_AUDIO 4 /* audio */
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#define IPL_CLOCK 5 /* clock */
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#define IPL_NONE 6
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/* Hardware interrupt levels are 16 (0x10) thru 31 (0x1f)
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*/
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#define IPL_HIGH 0x1f /* high -- blocks all interrupts */
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#define IPL_CLOCK 0x18 /* clock */
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#define IPL_UBA 0x17 /* unibus adapters */
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#define IPL_IMP 0x17 /* memory allocation */
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#define IPL_BIO 0x15 /* block I/O */
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#define IPL_NET 0x15 /* network */
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#define IPL_TTY 0x15 /* terminal */
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#define IPL_AUDIO 0x15 /* audio */
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#define IPL_CONSMEDIA 0x14 /* console media */
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#define IPL_LEVELS 7
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/* Software interrupt level s are 0 (0x00) thru 15 (0x0f)
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*/
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#define IPL_SOFTDDB 0x0f /* used by DDB on VAX */
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#define IPL_SOFTSERIAL 0x0d /* soft serial */
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#define IPL_SOFTNET 0x0c /* soft network */
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#define IPL_SOFTCLOCK 0x08
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#define IPL_NONE 0x00
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#define IPL_LEVELS 32
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#define IST_UNUSABLE -1 /* interrupt cannot be used */
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#define IST_NONE 0 /* none (dummy) */
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@ -52,6 +66,97 @@
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#define IST_EDGE 2 /* edge-triggered */
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#define IST_LEVEL 3 /* level-triggered */
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#include <machine/param.h>
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#ifdef _KERNEL
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#ifndef lint
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#define splx(reg) \
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({ \
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register int val; \
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__asm __volatile ("mfpr $0x12,%0;mtpr %1,$0x12" \
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: "&=g" (val) \
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: "g" (reg)); \
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val; \
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})
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#define _splraise(reg) \
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({ \
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register int val; \
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__asm __volatile ("mfpr $0x12,%0" \
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: "&=g" (val) \
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: ); \
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if ((reg) > val) { \
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__asm __volatile ("mtpr %0,$0x12" \
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: \
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: "g" (reg)); \
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} \
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val; \
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})
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#define _setsirr(reg) \
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({ \
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__asm __volatile ("mtpr %0,$0x14" \
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: \
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: "g" (reg)); \
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})
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#endif
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#define spl0() splx(IPL_NONE) /* IPL0 */
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#define spllowersoftclock() splx(IPL_SOFTCLOCK) /* IPL08 */
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#define splsoftclock() _splraise(IPL_SOFTCLOCK) /* IPL08 */
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#define splsoftnet() _splraise(IPL_SOFTNET) /* IPL0C */
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#define splsoftserial() _splraise(IPL_SOFTSERIAL) /* IPL0D */
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#define splddb() _splraise(IPL_SOFTDDB) /* IPL0F */
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#define splconsmedia() _splraise(IPL_CONSMEDIA) /* IPL14 */
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#define splbio() _splraise(IPL_BIO) /* IPL15 */
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#define splnet() _splraise(IPL_NET) /* IPL15 */
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#define spltty() _splraise(IPL_TTY) /* IPL15 */
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#define splimp() _splraise(IPL_IMP) /* IPL17 */
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#define splclock() _splraise(IPL_CLOCK) /* IPL18 */
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#define splhigh() _splraise(IPL_HIGH) /* IPL1F */
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#define splstatclock() splclock()
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/* These are better to use when playing with VAX buses */
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#define spl4() splx(0x14)
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#define spl5() splx(0x15)
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#define spl6() splx(0x16)
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#define spl7() splx(0x17)
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/* schedule software interrupts
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*/
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#define setsoftddb() _setsirr(IPL_SOFTDDB)
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#define setsoftserial() _setsirr(IPL_SOFTSERIAL)
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#define setsoftnet() _setsirr(IPL_SOFTNET)
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#define setsoftclock() _setsirr(IPL_SOFTCLOCK)
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#define __GENERIC_SOFT_INTERRUPTS
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#if !defined(_LOCORE)
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LIST_HEAD(sh_head, softintr_handler);
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struct softintr_head {
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int shd_ipl;
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struct sh_head shd_intrs;
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};
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struct softintr_handler {
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struct softintr_head *sh_head;
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LIST_ENTRY(softintr_handler) sh_link;
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void (*sh_func)(void *);
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void *sh_arg;
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int sh_pending;
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};
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extern void *softintr_establish(int, void (*)(void *), void *);
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extern void softintr_disestablish(void *);
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static __inline void
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softintr_schedule(void *arg)
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{
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struct softintr_handler * const sh = arg;
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int s = _splraise(sh->sh_head->shd_ipl); /* movl @(r0), ... */
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sh->sh_pending = 1;
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_setsirr(sh->sh_head->shd_ipl);
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splx(s);
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}
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#endif /* _LOCORE */
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#endif /* _KERNEL */
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#endif /* _VAX_INTR_H */
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@ -1,4 +1,4 @@
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/* $NetBSD: param.h,v 1.42 2000/03/07 00:05:59 matt Exp $ */
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/* $NetBSD: param.h,v 1.43 2000/06/02 21:47:02 matt Exp $ */
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/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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@ -161,49 +161,7 @@
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#define bdbtofsb(bn) ((bn) / (BLKDEV_IOSIZE/DEV_BSIZE))
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#ifdef _KERNEL
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#ifndef lint
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#define splx(reg) \
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({ \
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register int val; \
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__asm __volatile ("mfpr $0x12,%0;mtpr %1,$0x12" \
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: "&=g" (val) \
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: "g" (reg)); \
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val; \
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})
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#define _splraise(reg) \
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({ \
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register int val; \
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__asm __volatile ("mfpr $0x12,%0" \
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: "&=g" (val) \
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: ); \
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if ((reg) > val) { \
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__asm __volatile ("mtpr %0,$0x12" \
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: \
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: "g" (reg)); \
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} \
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val; \
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})
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#endif
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#define spl0() splx(0) /* IPL0 */
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#define spllowersoftclock() splx(8) /* IPL08 */
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#define splsoftclock() _splraise(8) /* IPL08 */
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#define splsoftnet() _splraise(0xc) /* IPL0C */
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#define splddb() _splraise(0xf) /* IPL0F */
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#define splbio() _splraise(0x15) /* IPL15 */
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#define splnet() _splraise(0x15) /* IPL15 */
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#define spltty() _splraise(0x15) /* IPL15 */
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#define splimp() _splraise(0x17) /* IPL17 */
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#define splclock() _splraise(0x18) /* IPL18 */
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#define splhigh() _splraise(0x1f) /* IPL1F */
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#define splstatclock() splclock()
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/* These are better to use when playing with VAX buses */
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#define spl4() splx(0x14)
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#define spl5() splx(0x15)
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#define spl6() splx(0x16)
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#define spl7() splx(0x17)
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#include <machine/intr.h>
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/* Prototype needed for delay() */
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#ifndef _LOCORE
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