Add a library for ARM systems with VFP which implements the soft-float ABI
but use VFP instructions to do the actual work. This should give near hard-float performance without requiring compiler changes.
This commit is contained in:
matt
parent
b6b60ee9f3
commit
b7de22daaa
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# $NetBSD: Makefile,v 1.1 2013/01/28 17:04:40 matt Exp $
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#
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LIB= c_vfp
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.include <bsd.own.mk>
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CPUFLAGS+= -mfpu=vfp
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SRCS= vfpsf.S vfpdf.S
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.include <bsd.lib.mk>
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@ -0,0 +1,5 @@
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# $NetBSD: shlib_version,v 1.1 2013/01/28 17:04:40 matt Exp $
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# Remember to update distrib/sets/lists/base/shl.* when changing
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#
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major=0
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minor=0
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@ -0,0 +1,165 @@
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/*-
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* Copyright (c) 2013 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Matt Thomas of 3am Software Foundry.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arm/asm.h>
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RCSID("$NetBSD: vfpdf.S,v 1.1 2013/01/28 17:04:40 matt Exp $")
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/*
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* This file provides softfloat compatible routines which use VFP instructions
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* to do the actual work. This should give near hard-float performance while
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* being compatible with soft-float code.
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*
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* This file implements the double precision floating point routines.
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*/
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#ifdef __ARMEL__
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#define vmov_arg0 vmov d0, r0, r1
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#define vmov_arg1 vmov d1, r2, r3
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#define vmov_ret vmov r0, r1, d0
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#else
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#define vmov_arg0 vmov d0, r1, r0
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#define vmov_arg1 vmov d1, r3, r2
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#define vmov_ret vmov r1, r0, d0
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#endif
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#define vmov_args vmov_arg0; vmov_arg1
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ENTRY(__adddf3)
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vmov_args
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vadd.f64 d0, d0, d1
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vmov_ret
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RET
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END(__adddf3)
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ENTRY(__subdf3)
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vmov_args
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vsub.f64 d0, d0, d1
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vmov_ret
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RET
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END(__subdf3)
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ENTRY(__muldf3)
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vmov_args
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vmul.f64 d0, d0, d1
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vmov_ret
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RET
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END(__muldf3)
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ENTRY(__divdf3)
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vmov_args
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vdiv.f64 d0, d0, d1
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vmov_ret
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RET
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END(__divdf3)
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ENTRY(__negdf2)
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vmov_arg0
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vneg.f64 d0, d0
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vmov_ret
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RET
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END(__negdf2)
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ENTRY(__extendsfdf2)
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vmov s0, r0
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vcvt.f64.f32 d0, s0
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vmov_ret
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RET
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END(__extendsfdf2)
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ENTRY(__fixdfsi)
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vmov_arg0
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vcvt.s32.f64 s0, d0
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vmov r0, s0
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RET
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END(__fixdfsi)
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ENTRY(__fixunsdfsi)
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vmov_arg0
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vcvt.u32.f64 s0, d0
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vmov r0, s0
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RET
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END(__fixunsdfsi)
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ENTRY(__floatsidf)
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vmov s0, r0
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vcvt.f64.s32 d0, s0
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vmov_ret
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RET
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END(__floatsidf)
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ENTRY(__floatunsidf)
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vmov s0, r0
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vcvt.f64.u32 d0, s0
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vmov_ret
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RET
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END(__floatunsidf)
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/* N set if compare <= result */
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/* Z set if compare = result */
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/* C set if compare (=,>=,UNORD) result */
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/* V set if compare UNORD result */
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STRONG_ALIAS(__eqdf2, __nedf2)
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ENTRY(__nedf2)
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vmov_args
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vcmp.f64 d0, d1
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vmrs APSR_nzcv, fpscr
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moveq r0, #0 /* !(a == b) */
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movne r0, #1 /* !(a == b) */
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RET
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END(__nedf2)
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STRONG_ALIAS(__gedf2, __ltdf2)
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ENTRY(__ltdf2)
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vmov_args
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vcmp.f64 d0, d1
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vmrs APSR_nzcv, fpscr
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mvnmi r0, #0 /* -(a < b) */
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movpl r0, #0 /* -(a < b) */
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RET
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END(__ltdf2)
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STRONG_ALIAS(__gtdf2, __ledf2)
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ENTRY(__ledf2)
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vmov_args
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vcmp.f64 d0, d1
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vmrs APSR_nzcv, fpscr
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movgt r0, #1 /* (a > b) */
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movle r0, #0 /* (a > b) */
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RET
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END(__ledf2)
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ENTRY(__unorddf2)
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vmov_args
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vcmp.f64 d0, d1
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vmrs APSR_nzcv, fpscr
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movvs r0, #1 /* isnan(a) || isnan(b) */
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movvc r0, #0 /* isnan(a) || isnan(b) */
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RET
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END(__unorddf2)
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@ -0,0 +1,159 @@
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/*-
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* Copyright (c) 2013 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Matt Thomas of 3am Software Foundry.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arm/asm.h>
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#include <arm/vfpreg.h>
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RCSID("$NetBSD: vfpsf.S,v 1.1 2013/01/28 17:04:40 matt Exp $")
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/*
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* This file provides softfloat compatible routines which use VFP instructions
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* to do the actual work. This should give near hard-float performance while
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* being compatible with soft-float code.
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*
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* This file implements the single precision floating point routines.
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*/
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ENTRY(__addsf3)
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vmov s0, s1, r0, r1
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vadd.f32 s0, s0, s1
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vmov r0, s0
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RET
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END(__addsf3)
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ENTRY(__subsf3)
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vmov s0, s1, r0, r1
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vsub.f32 s0, s0, s1
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vmov r0, s0
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RET
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END(__subsf3)
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ENTRY(__mulsf3)
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vmov s0, s1, r0, r1
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vmul.f32 s0, s0, s1
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vmov r0, s0
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RET
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END(__mulsf3)
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ENTRY(__divsf3)
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vmov s0, s1, r0, r1
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vdiv.f32 s0, s0, s1
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vmov r0, s0
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RET
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END(__divsf3)
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ENTRY(__negsf2)
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vmov s0, r0
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vneg.f32 s0, s0
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vmov r0, s0
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RET
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END(__negsf2)
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ENTRY(__truncdfsf2)
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#ifdef __ARMEL__
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vmov d0, r0, r1
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#else
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vmov d0, r1, r0
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#endif
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vcvt.f32.f64 s0, d0
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vmov r0, s0
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RET
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END(__truncdfsf2)
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ENTRY(__fixsfsi)
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vmov s0, r0
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vcvt.s32.f32 s0, s0
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vmov r0, s0
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RET
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END(__fixsfsi)
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ENTRY(__fixunssfsi)
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vmov s0, r0
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vcvt.u32.f32 s0, s0
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vmov r0, s0
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RET
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END(__fixunssfsi)
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ENTRY(__floatsisf)
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vmov s0, r0
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vcvt.f32.s32 s0, s0
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vmov r0, s0
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RET
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END(__floatsisf)
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ENTRY(__floatunsisf)
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vmov s0, r0
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vcvt.f32.u32 s0, s0
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vmov r0, s0
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RET
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END(__floatunsisf)
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/* N set if compare <= result */
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/* Z set if compare = result */
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/* C set if compare (=,>=,UNORD) result */
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/* V set if compare UNORD result */
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STRONG_ALIAS(__eqsf2, __nesf2)
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ENTRY(__nesf2)
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vmov s0, s1, r0, r1
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vcmp.f32 s0, s1
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vmrs APSR_nzcv, fpscr
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moveq r0, #0 /* !(a == b) */
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movne r0, #1 /* !(a == b) */
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RET
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END(__nesf2)
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STRONG_ALIAS(__gesf2, __ltsf2)
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ENTRY(__ltsf2)
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vmov s0, s1, r0, r1
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vcmp.f32 s0, s1
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vmrs APSR_nzcv, fpscr
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mvnmi r0, #0 /* -(a < b) */
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movpl r0, #0 /* -(a < b) */
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RET
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END(__ltsf2)
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STRONG_ALIAS(__gtsf2, __lesf2)
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ENTRY(__lesf2)
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vmov s0, s1, r0, r1
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vcmp.f32 s0, s1
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vmrs APSR_nzcv, fpscr
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movgt r0, #1 /* (a > b) */
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movle r0, #0 /* (a > b) */
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RET
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END(__lesf2)
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ENTRY(__unordsf2)
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vmov s0, s1, r0, r1
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vcmp.f32 s0, s1
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vmrs APSR_nzcv, fpscr
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movvs r0, #1 /* isnan(a) || isnan(b) */
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movvc r0, #0 /* isnan(a) || isnan(b) */
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RET
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END(__unordsf2)
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