New experimental driver for SundanceIT ST1023 / IP1000+ NICs.
PHY initialization, media select and MAC address are working, but I found no way to make the chip transmit any frame yet (although it clears the DONE flag). Moved DSK_DECL to globals.h, where NIF_DECL already was.
This commit is contained in:
phx
parent
172587ab09
commit
b79587cca2
@ -1,4 +1,4 @@
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# $NetBSD: Makefile,v 1.8 2011/02/26 20:11:24 phx Exp $
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# $NetBSD: Makefile,v 1.9 2011/03/06 13:55:12 phx Exp $
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S= ${.CURDIR}/../../../..
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@ -6,8 +6,8 @@ PROG= altboot
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FILES+= ${PROG}.bin ${PROG}.img
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NOMAN= # defined
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SRCS= entry.S main.c brdsetup.c pci.c devopen.c dev_net.c nif.c
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SRCS+= fxp.c tlp.c rge.c skg.c dsk.c pciide.c siisata.c printf.c
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SRCS+= vers.c
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SRCS+= fxp.c tlp.c rge.c skg.c stg.c dsk.c pciide.c siisata.c
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SRCS+= printf.c vers.c
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CLEANFILES+= vers.c ${PROG} ${PROG}.bin ${PROG}.img
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CFLAGS+= -Wall -Wno-main -ffreestanding -msoft-float -mmultiple
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CFLAGS+= -Wmissing-prototypes -Wstrict-prototypes -Wpointer-arith
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@ -1,4 +1,4 @@
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/* $NetBSD: brdsetup.c,v 1.5 2011/02/14 06:21:29 nisimura Exp $ */
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/* $NetBSD: brdsetup.c,v 1.6 2011/03/06 13:55:12 phx Exp $ */
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/*-
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* Copyright (c) 2008 The NetBSD Foundation, Inc.
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@ -959,6 +959,22 @@ redboot_fis_lookup(const char *filename)
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return NULL;
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}
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static uint8_t hex2nibble(char c)
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{
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if (c >= 'a')
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c &= ~0x20;
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return c > '9' ? c - 'A' + 10 : c - '0';
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}
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static void
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read_mac_string(uint8_t *mac, char *p)
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{
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int i;
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for (i = 0; i < 6; i++, p += 3)
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*mac++ = (hex2nibble(p[0]) << 4) | hex2nibble(p[1]);
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}
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/*
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* For cost saving reasons some NAS boxes are missing the ROM for the
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* NIC's ethernet address and keep it in their Flash memory.
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@ -974,7 +990,11 @@ read_mac_from_flash(uint8_t *mac)
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memcpy(mac, p, 6);
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return;
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}
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} else
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} else if (brdtype == BRD_DLINKDSM) {
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read_mac_string(mac, (char *)0xfff0ff80);
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return;
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}
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else
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printf("Warning: This board has no known method defined "
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"to determine its MAC address!\n");
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@ -1,4 +1,4 @@
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/* $NetBSD: dsk.c,v 1.4 2011/02/10 13:38:08 nisimura Exp $ */
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/* $NetBSD: dsk.c,v 1.5 2011/03/06 13:55:12 phx Exp $ */
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/*-
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* Copyright (c) 2010 The NetBSD Foundation, Inc.
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@ -57,13 +57,6 @@
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#define CSR_READ_1(r) *(volatile uint8_t *)(r)
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#define CSR_WRITE_1(r,v) *(volatile uint8_t *)(r)=(v)
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#define DSK_DECL(xxx) \
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int xxx ## _match(unsigned, void *); \
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void * xxx ## _init(unsigned, void *)
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DSK_DECL(pciide);
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DSK_DECL(siisata);
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struct dskdv {
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char *name;
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int (*match)(unsigned, void *);
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@ -1,4 +1,4 @@
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/* $NetBSD: globals.h,v 1.6 2011/02/14 06:21:29 nisimura Exp $ */
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/* $NetBSD: globals.h,v 1.7 2011/03/06 13:55:12 phx Exp $ */
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#ifdef DEBUG
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#define DPRINTF(x) printf x
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@ -88,6 +88,7 @@ void pcicfgwrite(unsigned, int, unsigned);
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#define PCI_CLASS_REG 0x08
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#define PCI_CLASS_PPB 0x0604
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#define PCI_CLASS_ETH 0x0200
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#define PCI_CLASS_SCSI 0x0100
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#define PCI_CLASS_IDE 0x0101
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#define PCI_CLASS_RAID 0x0104
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#define PCI_CLASS_SATA 0x0106
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@ -138,6 +139,7 @@ NIF_DECL(fxp);
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NIF_DECL(tlp);
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NIF_DECL(rge);
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NIF_DECL(skg);
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NIF_DECL(stg);
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/* DSK support */
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int dskdv_init(void *);
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@ -147,6 +149,13 @@ int dsk_close(struct open_file *);
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int dsk_strategy(void *, int, daddr_t, size_t, void *, size_t *);
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struct fs_ops *dsk_fsops(struct open_file *);
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#define DSK_DECL(xxx) \
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int xxx ## _match(unsigned, void *); \
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void * xxx ## _init(unsigned, void *)
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DSK_DECL(pciide);
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DSK_DECL(siisata);
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/* status */
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#define ATA_STS_BUSY 0x80
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#define ATA_STS_DRDY 0x40
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@ -1,4 +1,4 @@
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/* $NetBSD: main.c,v 1.7 2011/02/26 20:11:24 phx Exp $ */
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/* $NetBSD: main.c,v 1.8 2011/03/06 13:55:12 phx Exp $ */
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/*-
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* Copyright (c) 2007 The NetBSD Foundation, Inc.
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@ -125,6 +125,8 @@ main(int argc, char *argv[], char *bootargs_start, char *bootargs_end)
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nata = pcilookup(PCI_CLASS_IDE, lata, 2);
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if (nata == 0)
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nata = pcilookup(PCI_CLASS_MISCSTORAGE, lata, 2);
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if (nata == 0)
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nata = pcilookup(PCI_CLASS_SCSI, lata, 2);
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nnif = pcilookup(PCI_CLASS_ETH, lnif, 1);
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nusb = pcilookup(PCI_CLASS_USB, lusb, 3);
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@ -231,8 +233,8 @@ main(int argc, char *argv[], char *bootargs_start, char *bootargs_end)
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bi_add(&bi_path, BTINFO_BOOTPATH, sizeof(bi_path));
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bi_add(&bi_rdev, BTINFO_ROOTDEVICE, sizeof(bi_rdev));
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bi_add(&bi_fam, BTINFO_PRODFAMILY, sizeof(bi_fam));
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if (brdtype == BRD_SYNOLOGY) {
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/* need to set MAC address for Marvell-SKnet */
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if (brdtype == BRD_SYNOLOGY || brdtype == BRD_DLINKDSM) {
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/* need to set this MAC address in kernel driver later */
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bi_add(&bi_net, BTINFO_NET, sizeof(bi_net));
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: nif.c,v 1.2 2011/02/10 13:38:08 nisimura Exp $ */
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/* $NetBSD: nif.c,v 1.3 2011/03/06 13:55:12 phx Exp $ */
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/*-
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* Copyright (c) 2007 The NetBSD Foundation, Inc.
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@ -58,6 +58,7 @@ static struct nifdv lnifdv[] = {
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{ "tlp", tlp_match, tlp_init, tlp_send, tlp_recv },
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{ "re", rge_match, rge_init, rge_send, rge_recv },
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{ "sk", skg_match, skg_init, skg_send, skg_recv },
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{ "stg", stg_match, stg_init, stg_send, stg_recv },
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};
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static int nnifdv = sizeof(lnifdv)/sizeof(lnifdv[0]);
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@ -1,4 +1,4 @@
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/* $NetBSD: pciide.c,v 1.2 2011/02/08 00:33:05 nisimura Exp $ */
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/* $NetBSD: pciide.c,v 1.3 2011/03/06 13:55:12 phx Exp $ */
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/*-
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* Copyright (c) 2008 The NetBSD Foundation, Inc.
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@ -35,19 +35,18 @@
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#include "globals.h"
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static int cmdidefix(struct dkdev_ata *);
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static uint32_t pciiobase = PCI_XIOBASE;
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struct myops {
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int (*chipfix)(struct dkdev_ata *);
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int (*presense)(struct dkdev_ata *, int);
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};
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static int cmdidefix(struct dkdev_ata *);
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static struct myops defaultops = { NULL, NULL };
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static struct myops cmdideops = { cmdidefix, NULL };
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static struct myops *myops;
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int pciide_match(unsigned, void *);
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void *pciide_init(unsigned, void *);
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int
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pciide_match(unsigned tag, void *data)
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{
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@ -63,6 +62,7 @@ pciide_match(unsigned tag, void *data)
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case PCI_DEVICE(0x10ad, 0x0105): /* Symphony Labs 82C105 IDE */
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case PCI_DEVICE(0x10b8, 0x5229): /* ALi IDE */
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case PCI_DEVICE(0x1191, 0x0008): /* ACARD ATP865 */
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myops = &defaultops;
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return 1;
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}
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return 0;
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@ -1,4 +1,4 @@
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/* $NetBSD: siisata.c,v 1.2 2011/01/27 17:38:04 phx Exp $ */
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/* $NetBSD: siisata.c,v 1.3 2011/03/06 13:55:12 phx Exp $ */
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/*-
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* Copyright (c) 2008 The NetBSD Foundation, Inc.
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@ -37,9 +37,6 @@
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static uint32_t pciiobase = PCI_XIOBASE;
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int siisata_match(unsigned, void *);
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void *siisata_init(unsigned, void *);
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int
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siisata_match(unsigned tag, void *data)
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{
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542
sys/arch/sandpoint/stand/altboot/stg.c
Normal file
542
sys/arch/sandpoint/stand/altboot/stg.c
Normal file
@ -0,0 +1,542 @@
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/* $NetBSD: stg.c,v 1.1 2011/03/06 13:55:12 phx Exp $ */
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/*-
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* Copyright (c) 2011 Frank Wille.
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* All rights reserved.
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*
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* Written by Frank Wille for The NetBSD Project.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <netinet/in.h>
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#include <netinet/in_systm.h>
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#include <lib/libsa/stand.h>
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#include <lib/libsa/net.h>
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#include "globals.h"
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#define CSR_WRITE_1(l, r, v) *(volatile uint8_t *)((l)->csr+(r)) = (v)
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#define CSR_READ_1(l, r) *(volatile uint8_t *)((l)->csr+(r))
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#define CSR_WRITE_2(l, r, v) out16rb((l)->csr+(r), (v))
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#define CSR_READ_2(l, r) in16rb((l)->csr+(r))
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#define CSR_WRITE_4(l, r, v) out32rb((l)->csr+(r), (v))
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#define CSR_READ_4(l, r) in32rb((l)->csr+(r))
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#define VTOPHYS(va) (uint32_t)(va)
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#define DEVTOV(pa) (uint32_t)(pa)
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#define wbinv(adr, siz) _wbinv(VTOPHYS(adr), (uint32_t)(siz))
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#define inv(adr, siz) _inv(VTOPHYS(adr), (uint32_t)(siz))
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#define DELAY(n) delay(n)
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#define ALLOC(T,A) (T *)allocaligned(sizeof(T),(A))
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struct desc {
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uint64_t xd0, xd1, xd2;
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};
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/* xd1 */
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#define RXLEN(x) ((x) & 0xffff)
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#define RXERRORMASK 0x3f0000LL
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#define TXNOALIGN (1ULL << 16)
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#define TXFRAGCOUNT(x) (((uint64_t)((x) & 0xf)) << 48)
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#define DONE (1ULL << 31)
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/* xd2 */
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#define FRAGADDR(x) ((uint64_t)(x))
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#define FRAGLEN(x) (((uint64_t)((x) & 0xffff)) << 48)
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#define STGE_DMACtrl 0x00
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#define DMAC_RxDMAComplete (1U << 3)
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#define DMAC_RxDMAPollNow (1U << 4)
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#define DMAC_TxDMAComplete (1U << 11)
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#define DMAC_TxDMAPollNow (1U << 12)
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#define STGE_TFDListPtrLo 0x10
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#define STGE_TFDListPtrHi 0x14
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#define STGE_RFDListPtrLo 0x1c
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#define STGE_RFDListPtrHi 0x20
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#define STGE_AsicCtrl 0x30
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#define AC_PhyMedia (1U << 7)
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#define AC_GlobalReset (1U << 16)
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#define AC_RxReset (1U << 17)
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#define AC_TxReset (1U << 18)
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#define AC_DMA (1U << 19)
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#define AC_FIFO (1U << 20)
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#define AC_Network (1U << 21)
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#define AC_Host (1U << 22)
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#define AC_AutoInit (1U << 23)
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#define AC_RstOut (1U << 24)
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#define AC_ResetBusy (1U << 26)
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#define STGE_EepromData 0x48
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#define STGE_EepromCtrl 0x4a
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#define EC_EepromAddress(x) ((x) & 0xff)
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#define EC_EepromOpcode(x) ((x) << 8)
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#define EC_OP_RR 2
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#define EC_EepromBusy (1U << 15)
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#define STGE_IntEnable 0x5c
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#define STGE_MACCtrl 0x6c
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#define MC_TxEnable (1U << 24)
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#define MC_RxEnable (1U << 27)
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#define STGE_PhyCtrl 0x76
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#define PC_MgmtClk (1U << 0)
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#define PC_MgmtData (1U << 1)
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#define PC_MgmtDir (1U << 2)
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#define PC_PhyDuplexPolarity (1U << 3)
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#define PC_PhyDuplexStatus (1U << 4)
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#define PC_PhyLnkPolarity (1U << 5)
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#define PC_LinkSpeed(x) (((x) >> 6) & 3)
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#define PC_LinkSpeed_Down 0
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#define PC_LinkSpeed_10 1
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#define PC_LinkSpeed_100 2
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#define PC_LinkSpeed_1000 3
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#define STGE_StationAddress0 0x78
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#define STGE_StationAddress1 0x7a
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#define STGE_StationAddress2 0x7c
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#define STGE_EEPROM_SA0 0x10
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#define MII_PSSR 0x11 /* MAKPHY status register */
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#define PSSR_DUPLEX 0x2000 /* FDX */
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#define PSSR_RESOLVED 0x0800 /* speed and duplex resolved */
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#define PSSR_LINK 0x0400 /* link indication */
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#define PSSR_SPEED(x) (((x) >> 14) & 0x3)
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#define SPEED10 0
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#define SPEED100 1
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#define SPEED1000 2
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#define FRAMESIZE 1536
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struct local {
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struct desc txd[2];
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struct desc rxd[2];
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uint8_t rxstore[2][FRAMESIZE];
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unsigned csr, rx, tx, phy;
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uint16_t bmsr, anlpar;
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uint8_t phyctrl_saved;
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};
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static int mii_read(struct local *, int, int);
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static void mii_write(struct local *, int, int, int);
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static void mii_initphy(struct local *);
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static void mii_dealan(struct local *, unsigned);
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static void mii_bitbang_sync(struct local *);
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static void mii_bitbang_send(struct local *, uint32_t, int);
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static void mii_bitbang_clk(struct local *, uint8_t);
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static int eeprom_wait(struct local *);
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int
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stg_match(unsigned tag, void *data)
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{
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unsigned v;
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v = pcicfgread(tag, PCI_ID_REG);
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switch (v) {
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case PCI_DEVICE(0x13f0, 0x1023): /* ST1023 */
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return 1;
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}
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return 0;
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}
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void *
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stg_init(unsigned tag, void *data)
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{
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struct local *l;
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struct desc *txd, *rxd;
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uint8_t *en;
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unsigned i;
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uint32_t reg;
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l = ALLOC(struct local, 32); /* desc alignment */
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memset(l, 0, sizeof(struct local));
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l->csr = DEVTOV(pcicfgread(tag, 0x14)); /* first try mem space */
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if (l->csr == 0)
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l->csr = DEVTOV(PCI_XIOBASE + (pcicfgread(tag, 0x10) & ~01));
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/* reset the chip */
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reg = CSR_READ_4(l, STGE_AsicCtrl);
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CSR_WRITE_4(l, STGE_AsicCtrl, reg | AC_GlobalReset | AC_RxReset |
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AC_TxReset | AC_DMA | AC_FIFO | AC_Network | AC_Host |
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AC_AutoInit | ((reg & AC_PhyMedia) ? AC_RstOut : 0));
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DELAY(50000);
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for (i = 0; i < 1000; i++) {
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DELAY(5000);
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if ((CSR_READ_4(l, STGE_AsicCtrl) & AC_ResetBusy) == 0)
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break;
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}
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if (i >= 1000)
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printf("NIC reset failed to complete!\n");
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DELAY(1000);
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mii_initphy(l);
|
||||
|
||||
/* read ethernet address */
|
||||
en = data;
|
||||
if (PCI_PRODUCT(pcicfgread(tag, PCI_ID_REG)) != 0x1023) {
|
||||
/* read from station address registers when not ST1023 */
|
||||
en[0] = CSR_READ_2(l, STGE_StationAddress0) & 0xff;
|
||||
en[1] = CSR_READ_2(l, STGE_StationAddress0) >> 8;
|
||||
en[2] = CSR_READ_2(l, STGE_StationAddress1) & 0xff;
|
||||
en[3] = CSR_READ_2(l, STGE_StationAddress1) >> 8;
|
||||
en[4] = CSR_READ_2(l, STGE_StationAddress2) & 0xff;
|
||||
en[5] = CSR_READ_2(l, STGE_StationAddress2) >> 8;
|
||||
} else {
|
||||
/* ST1023: read the address from the serial EEPROM */
|
||||
static uint8_t bad[2][6] = {
|
||||
{ 0x00,0x00,0x00,0x00,0x00,0x00 },
|
||||
{ 0xff,0xff,0xff,0xff,0xff,0xff }
|
||||
};
|
||||
uint16_t addr[3];
|
||||
|
||||
for (i = 0; i < 3; i++) {
|
||||
if (eeprom_wait(l) != 0)
|
||||
printf("NIC: serial EEPROM is not ready!\n");
|
||||
CSR_WRITE_2(l, STGE_EepromCtrl,
|
||||
EC_EepromAddress(STGE_EEPROM_SA0 + i) |
|
||||
EC_EepromOpcode(EC_OP_RR));
|
||||
if (eeprom_wait(l) != 0)
|
||||
printf("NIC: serial EEPROM read time out!\n");
|
||||
addr[i] = le16toh(CSR_READ_2(l, STGE_EepromData));
|
||||
}
|
||||
(void)memcpy(en, addr, 6);
|
||||
|
||||
/* try to read MAC from Flash, when EEPROM is empty/missing */
|
||||
if (memcmp(en, bad[0], 6) == 0 || memcmp(en, bad[1], 6) == 0)
|
||||
read_mac_from_flash(en);
|
||||
|
||||
/* set the station address now */
|
||||
for (i = 0; i < 6; i++)
|
||||
CSR_WRITE_1(l, STGE_StationAddress0 + i, en[i]);
|
||||
}
|
||||
printf("MAC address %02x:%02x:%02x:%02x:%02x:%02x\n",
|
||||
en[0], en[1], en[2], en[3], en[4], en[5]);
|
||||
|
||||
DPRINTF(("PHY %d (%04x.%04x)\n", l->phy,
|
||||
mii_read(l, l->phy, 2), mii_read(l, l->phy, 3)));
|
||||
|
||||
mii_dealan(l, 5);
|
||||
|
||||
reg = CSR_READ_1(l, STGE_PhyCtrl);
|
||||
switch (PC_LinkSpeed(reg)) {
|
||||
case PC_LinkSpeed_1000:
|
||||
printf("1000Mbps");
|
||||
break;
|
||||
case PC_LinkSpeed_100:
|
||||
printf("100Mbps");
|
||||
break;
|
||||
case PC_LinkSpeed_10:
|
||||
printf("10Mbps");
|
||||
break;
|
||||
}
|
||||
if (reg & PC_PhyDuplexStatus)
|
||||
printf("-FDX");
|
||||
printf("\n");
|
||||
|
||||
/* setup descriptors */
|
||||
txd = &l->txd[0];
|
||||
txd[0].xd0 = htole64(VTOPHYS(&txd[1]));
|
||||
txd[0].xd1 = htole64(DONE);
|
||||
txd[1].xd0 = htole64(VTOPHYS(&txd[0]));
|
||||
txd[1].xd1 = htole64(DONE);
|
||||
rxd = &l->rxd[0];
|
||||
rxd[0].xd0 = htole64(VTOPHYS(&rxd[1]));
|
||||
rxd[0].xd2 = htole64(FRAGADDR(VTOPHYS(l->rxstore[0])) |
|
||||
FRAGLEN(FRAMESIZE));
|
||||
rxd[1].xd0 = htole64(VTOPHYS(&rxd[0]));
|
||||
rxd[1].xd2 = htole64(FRAGADDR(VTOPHYS(l->rxstore[1])) |
|
||||
FRAGLEN(FRAMESIZE));
|
||||
wbinv(l, sizeof(struct local));
|
||||
|
||||
CSR_WRITE_2(l, STGE_IntEnable, 0);
|
||||
CSR_WRITE_4(l, STGE_TFDListPtrHi, 0);
|
||||
CSR_WRITE_4(l, STGE_TFDListPtrLo, VTOPHYS(txd));
|
||||
CSR_WRITE_4(l, STGE_RFDListPtrHi, 0);
|
||||
CSR_WRITE_4(l, STGE_RFDListPtrLo, VTOPHYS(rxd));
|
||||
CSR_WRITE_4(l, STGE_MACCtrl, MC_TxEnable | MC_RxEnable);
|
||||
#if 0
|
||||
CSR_WRITE_4(l, STGE_DMACtrl, DMAC_RxDMAPollNow | DMAC_TxDMAPollNow);
|
||||
#endif
|
||||
return l;
|
||||
}
|
||||
|
||||
int
|
||||
stg_send(void *dev, char *buf, unsigned len)
|
||||
{
|
||||
struct local *l = dev;
|
||||
volatile struct desc *txd;
|
||||
unsigned loop;
|
||||
|
||||
wbinv(buf, len);
|
||||
txd = &l->txd[l->tx];
|
||||
txd->xd1 = htole64(DONE);
|
||||
wbinv(txd, sizeof(struct desc));
|
||||
txd->xd2 = htole64(FRAGADDR(VTOPHYS(buf)) | FRAGLEN(len));
|
||||
txd->xd1 = htole64(DONE | TXNOALIGN | 0x400000 | TXFRAGCOUNT(1));
|
||||
txd->xd1 = htole64(TXNOALIGN | 0x400000 | TXFRAGCOUNT(1));
|
||||
wbinv(txd, sizeof(struct desc));
|
||||
CSR_WRITE_4(l, STGE_DMACtrl, DMAC_TxDMAPollNow); /* XXX ? */
|
||||
loop = 100;
|
||||
do {
|
||||
if ((le64toh(txd->xd1) & DONE) != 0)
|
||||
goto done;
|
||||
DELAY(10);
|
||||
inv(txd, sizeof(struct desc));
|
||||
} while (--loop > 0);
|
||||
printf("xmit failed\n");
|
||||
return -1;
|
||||
done:
|
||||
l->tx ^= 1;
|
||||
return len;
|
||||
}
|
||||
|
||||
int
|
||||
stg_recv(void *dev, char *buf, unsigned maxlen, unsigned timo)
|
||||
{
|
||||
struct local *l = dev;
|
||||
volatile struct desc *rxd;
|
||||
uint64_t sts;
|
||||
unsigned bound, len;
|
||||
uint8_t *ptr;
|
||||
|
||||
bound = 1000 * timo;
|
||||
again:
|
||||
rxd = &l->rxd[l->rx];
|
||||
do {
|
||||
inv(rxd, sizeof(struct desc));
|
||||
sts = le64toh(rxd->xd1);
|
||||
if ((sts & DONE) != 0)
|
||||
goto gotone;
|
||||
DELAY(1000); /* 1 milli second */
|
||||
} while (--bound > 0);
|
||||
errno = 0;
|
||||
return -1;
|
||||
gotone:
|
||||
if ((sts & RXERRORMASK) != 0) {
|
||||
rxd->xd1 = 0;
|
||||
wbinv(rxd, sizeof(struct desc));
|
||||
l->rx ^= 1;
|
||||
goto again;
|
||||
}
|
||||
len = RXLEN(sts);
|
||||
if (len > maxlen)
|
||||
len = maxlen;
|
||||
ptr = l->rxstore[l->rx];
|
||||
inv(ptr, len);
|
||||
memcpy(buf, ptr, len);
|
||||
rxd->xd1 = 0;
|
||||
wbinv(rxd, sizeof(struct desc));
|
||||
l->rx ^= 1;
|
||||
return len;
|
||||
}
|
||||
|
||||
#define MIICMD_START 1
|
||||
#define MIICMD_READ 2
|
||||
#define MIICMD_WRITE 1
|
||||
#define MIICMD_ACK 2
|
||||
|
||||
/* read the MII by bitbanging STGE_PhyCtrl */
|
||||
static int
|
||||
mii_read(struct local *l, int phy, int reg)
|
||||
{
|
||||
int data, i;
|
||||
uint8_t v;
|
||||
|
||||
/* initiate read access */
|
||||
data = 0;
|
||||
mii_bitbang_sync(l);
|
||||
mii_bitbang_send(l, MIICMD_START, 2);
|
||||
mii_bitbang_send(l, MIICMD_READ, 2);
|
||||
mii_bitbang_send(l, phy, 5);
|
||||
mii_bitbang_send(l, reg, 5);
|
||||
|
||||
/* switch direction to PHY->host */
|
||||
v = l->phyctrl_saved;
|
||||
CSR_WRITE_1(l, STGE_PhyCtrl, v);
|
||||
DELAY(1);
|
||||
mii_bitbang_clk(l, v);
|
||||
if (CSR_READ_1(l, STGE_PhyCtrl) & PC_MgmtData)
|
||||
printf("MII: read error\n");
|
||||
mii_bitbang_clk(l, v);
|
||||
|
||||
/* read data */
|
||||
for (i = 0; i < 16; i++) {
|
||||
data <<= 1;
|
||||
if ((CSR_READ_1(l, STGE_PhyCtrl) & PC_MgmtData) != 0)
|
||||
data |= 1;
|
||||
mii_bitbang_clk(l, v);
|
||||
}
|
||||
/* reset direction to host->PHY */
|
||||
CSR_WRITE_1(l, STGE_PhyCtrl, v | PC_MgmtDir);
|
||||
return data;
|
||||
}
|
||||
|
||||
/* write the MII by bitbanging STGE_PhyCtrl */
|
||||
static void
|
||||
mii_write(struct local *l, int phy, int reg, int val)
|
||||
{
|
||||
|
||||
/* initiate write access */
|
||||
mii_bitbang_sync(l);
|
||||
mii_bitbang_send(l, MIICMD_START, 2);
|
||||
mii_bitbang_send(l, MIICMD_WRITE, 2);
|
||||
mii_bitbang_send(l, phy, 5);
|
||||
mii_bitbang_send(l, reg, 5);
|
||||
|
||||
/* send data */
|
||||
mii_bitbang_send(l, MIICMD_ACK, 2);
|
||||
mii_bitbang_send(l, val, 16);
|
||||
|
||||
CSR_WRITE_1(l, STGE_PhyCtrl, l->phyctrl_saved | PC_MgmtDir);
|
||||
}
|
||||
|
||||
#define MII_BMCR 0x00 /* Basic mode control register (rw) */
|
||||
#define BMCR_RESET 0x8000 /* reset */
|
||||
#define BMCR_AUTOEN 0x1000 /* autonegotiation enable */
|
||||
#define BMCR_ISO 0x0400 /* isolate */
|
||||
#define BMCR_STARTNEG 0x0200 /* restart autonegotiation */
|
||||
#define MII_BMSR 0x01 /* Basic mode status register (ro) */
|
||||
#define BMSR_ACOMP 0x0020 /* Autonegotiation complete */
|
||||
#define BMSR_LINK 0x0004 /* Link status */
|
||||
#define MII_ANAR 0x04 /* Autonegotiation advertisement (rw) */
|
||||
#define ANAR_FC 0x0400 /* local device supports PAUSE */
|
||||
#define ANAR_TX_FD 0x0100 /* local device supports 100bTx FD */
|
||||
#define ANAR_TX 0x0080 /* local device supports 100bTx */
|
||||
#define ANAR_10_FD 0x0040 /* local device supports 10bT FD */
|
||||
#define ANAR_10 0x0020 /* local device supports 10bT */
|
||||
#define ANAR_CSMA 0x0001 /* protocol selector CSMA/CD */
|
||||
#define MII_ANLPAR 0x05 /* Autonegotiation lnk partner abilities (rw) */
|
||||
|
||||
static void
|
||||
mii_initphy(struct local *l)
|
||||
{
|
||||
int phy, ctl, sts, bound;
|
||||
|
||||
l->phyctrl_saved = CSR_READ_1(l, STGE_PhyCtrl) &
|
||||
(PC_PhyDuplexPolarity | PC_PhyLnkPolarity);
|
||||
|
||||
for (phy = 0; phy < 32; phy++) {
|
||||
ctl = mii_read(l, phy, MII_BMCR);
|
||||
sts = mii_read(l, phy, MII_BMSR);
|
||||
if (ctl != 0xffff && sts != 0xffff && sts != 0)
|
||||
goto found;
|
||||
}
|
||||
printf("MII: no PHY found\n");
|
||||
return;
|
||||
|
||||
found:
|
||||
ctl = mii_read(l, phy, MII_BMCR);
|
||||
mii_write(l, phy, MII_BMCR, ctl | BMCR_RESET);
|
||||
|
||||
bound = 100;
|
||||
do {
|
||||
DELAY(10);
|
||||
ctl = mii_read(l, phy, MII_BMCR);
|
||||
if (ctl == 0xffff) {
|
||||
printf("MII: PHY %d has died after reset\n", phy);
|
||||
return;
|
||||
}
|
||||
} while (bound-- > 0 && (ctl & BMCR_RESET));
|
||||
if (bound == 0)
|
||||
printf("PHY %d reset failed\n", phy);
|
||||
|
||||
ctl &= ~BMCR_ISO;
|
||||
mii_write(l, phy, MII_BMCR, ctl);
|
||||
sts = mii_read(l, phy, MII_BMSR) |
|
||||
mii_read(l, phy, MII_BMSR); /* read twice */
|
||||
l->phy = phy;
|
||||
l->bmsr = sts;
|
||||
}
|
||||
|
||||
static void
|
||||
mii_dealan(struct local *l, unsigned timo)
|
||||
{
|
||||
unsigned anar, bound;
|
||||
|
||||
anar = ANAR_TX_FD | ANAR_TX | ANAR_10_FD | ANAR_10 | ANAR_CSMA;
|
||||
mii_write(l, l->phy, MII_ANAR, anar);
|
||||
mii_write(l, l->phy, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
|
||||
l->anlpar = 0;
|
||||
bound = getsecs() + timo;
|
||||
do {
|
||||
l->bmsr = mii_read(l, l->phy, MII_BMSR) |
|
||||
mii_read(l, l->phy, MII_BMSR); /* read twice */
|
||||
if ((l->bmsr & BMSR_LINK) && (l->bmsr & BMSR_ACOMP)) {
|
||||
l->anlpar = mii_read(l, l->phy, MII_ANLPAR);
|
||||
break;
|
||||
}
|
||||
DELAY(10 * 1000);
|
||||
} while (getsecs() < bound);
|
||||
}
|
||||
|
||||
static void
|
||||
mii_bitbang_sync(struct local *l)
|
||||
{
|
||||
int i;
|
||||
uint8_t v;
|
||||
|
||||
v = l->phyctrl_saved | PC_MgmtDir | PC_MgmtData;
|
||||
CSR_WRITE_1(l, STGE_PhyCtrl, v);
|
||||
DELAY(1);
|
||||
for (i = 0; i < 32; i++)
|
||||
mii_bitbang_clk(l, v);
|
||||
}
|
||||
|
||||
static void
|
||||
mii_bitbang_send(struct local *l, uint32_t data, int nbits)
|
||||
{
|
||||
uint32_t i;
|
||||
uint8_t v;
|
||||
|
||||
v = l->phyctrl_saved | PC_MgmtDir;
|
||||
CSR_WRITE_1(l, STGE_PhyCtrl, v);
|
||||
DELAY(1);
|
||||
for (i = 1 << (nbits - 1); i != 0; i >>= 1) {
|
||||
if (data & i)
|
||||
v |= PC_MgmtData;
|
||||
else
|
||||
v &= ~PC_MgmtData;
|
||||
CSR_WRITE_1(l, STGE_PhyCtrl, v);
|
||||
DELAY(1);
|
||||
mii_bitbang_clk(l, v);
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
mii_bitbang_clk(struct local *l, uint8_t v)
|
||||
{
|
||||
|
||||
CSR_WRITE_1(l, STGE_PhyCtrl, v | PC_MgmtClk);
|
||||
DELAY(1);
|
||||
CSR_WRITE_1(l, STGE_PhyCtrl, v);
|
||||
DELAY(1);
|
||||
}
|
||||
|
||||
static int
|
||||
eeprom_wait(struct local *l)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < 1000; i++) {
|
||||
DELAY(1000);
|
||||
if ((CSR_READ_2(l, STGE_EepromCtrl) & EC_EepromBusy) == 0)
|
||||
return 0;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user