Driver for the Altima AC101 10/100 Ethernet PHY.
This commit is contained in:
thorpej
parent
20039b1dd8
commit
b6aa674493
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/* $NetBSD: acphy.c,v 1.1 2001/08/24 17:54:33 thorpej Exp $ */
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/*
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* Copyright 2001 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Driver for the Altima AC101 PHY.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/socket.h>
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#include <sys/errno.h>
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#include <net/if.h>
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#include <net/if_media.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include <dev/mii/miidevs.h>
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#include <dev/mii/acphyreg.h>
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int acphymatch(struct device *, struct cfdata *, void *);
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void acphyattach(struct device *, struct device *, void *);
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struct cfattach acphy_ca = {
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sizeof(struct mii_softc), acphymatch, acphyattach,
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mii_phy_detach, mii_phy_activate
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};
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int acphy_service(struct mii_softc *, struct mii_data *, int);
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void acphy_status(struct mii_softc *);
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const struct mii_phy_funcs acphy_funcs = {
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acphy_service, acphy_status, mii_phy_reset,
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};
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const struct mii_phydesc acphys[] = {
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{ MII_OUI_ALTIMA, MII_MODEL_ALTIMA_AC101,
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MII_STR_ALTIMA_AC101 },
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{ 0, 0,
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NULL },
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};
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int
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acphymatch(parent, match, aux)
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struct device *parent;
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struct cfdata *match;
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void *aux;
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{
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struct mii_attach_args *ma = aux;
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if (mii_phy_match(ma, acphys) != NULL)
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return (10);
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return (0);
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}
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void
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acphyattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct mii_softc *sc = (struct mii_softc *)self;
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struct mii_attach_args *ma = aux;
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struct mii_data *mii = ma->mii_data;
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const struct mii_phydesc *mpd;
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mpd = mii_phy_match(ma, acphys);
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printf(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
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sc->mii_inst = mii->mii_instance;
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sc->mii_phy = ma->mii_phyno;
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sc->mii_funcs = &acphy_funcs;
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sc->mii_pdata = mii;
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sc->mii_flags = mii->mii_flags;
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sc->mii_anegticks = 5;
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PHY_RESET(sc);
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/*
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* XXX Check MCR_FX_SEL to set MIIF_HAVE_FIBER?
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*/
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sc->mii_capabilities =
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PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
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printf("%s: ", sc->mii_dev.dv_xname);
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if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0)
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printf("no media present");
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else
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mii_phy_add_media(sc);
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printf("\n");
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}
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int
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acphy_service(sc, mii, cmd)
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struct mii_softc *sc;
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struct mii_data *mii;
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int cmd;
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{
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struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
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int reg;
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switch (cmd) {
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case MII_POLLSTAT:
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/*
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* If we're not polling our PHY instance, just return.
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*/
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if (IFM_INST(ife->ifm_media) != sc->mii_inst)
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return (0);
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break;
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case MII_MEDIACHG:
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/*
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* If the media indicates a different PHY instance,
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* isolate ourselves.
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*/
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if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
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reg = PHY_READ(sc, MII_BMCR);
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PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
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return (0);
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}
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/*
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* If the interface is not up, don't do anything.
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*/
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if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
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break;
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mii_phy_setmedia(sc);
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break;
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case MII_TICK:
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/*
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* If we're not currently selected, just return.
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*/
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if (IFM_INST(ife->ifm_media) != sc->mii_inst)
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return (0);
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if (mii_phy_tick(sc) == EJUSTRETURN)
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return (0);
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break;
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case MII_DOWN:
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mii_phy_down(sc);
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return (0);
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}
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/* Update the media status. */
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mii_phy_status(sc);
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/* Callback if something changed. */
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mii_phy_update(sc, cmd);
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return (0);
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}
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void
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acphy_status(sc)
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struct mii_softc *sc;
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{
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struct mii_data *mii = sc->mii_pdata;
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struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
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int bmsr, bmcr, dr;
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mii->mii_media_status = IFM_AVALID;
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mii->mii_media_active = IFM_ETHER;
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bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
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dr = PHY_READ(sc, MII_ACPHY_DR);
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if (bmsr & BMSR_LINK)
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mii->mii_media_status |= IFM_ACTIVE;
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bmcr = PHY_READ(sc, MII_BMCR);
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if (bmcr & BMCR_ISO) {
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mii->mii_media_active |= IFM_NONE;
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mii->mii_media_status = 0;
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return;
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}
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if (bmcr & BMCR_LOOP)
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mii->mii_media_active |= IFM_LOOP;
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if (bmcr & BMCR_AUTOEN) {
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/*
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* The media status bits are only valid of autonegotiation
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* has completed (or it's disabled).
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*/
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if ((bmsr & BMSR_ACOMP) == 0) {
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/* Erg, still trying, I guess... */
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mii->mii_media_active |= IFM_NONE;
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return;
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}
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if (dr & DR_SPEED)
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mii->mii_media_active |= IFM_100_TX;
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else
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mii->mii_media_active |= IFM_10_T;
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if (dr & DR_DPLX)
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mii->mii_media_active |= IFM_FDX;
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} else
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mii->mii_media_active = ife->ifm_media;
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}
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@ -0,0 +1,120 @@
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/* $NetBSD: acphyreg.h,v 1.1 2001/08/24 17:54:33 thorpej Exp $ */
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/*
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* Copyright 2001 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DEV_MII_ACPHYREG_H_
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#define _DEV_MII_ACPHYREG_H_
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/*
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* Altima AC101 PHY registers.
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*/
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#define MII_ACPHY_PILR 0x10 /* polarity and interrupt control */
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#define PILR_REPEATER 0x8000 /* repeater mode */
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#define PILR_INTR_LEVL 0x4000 /* 1 = active high, 0 = active low */
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#define PILR_SQE_INHIBIT 0x0800 /* disable 10T SQE testing */
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#define PILR_10T_LOOP 0x0400 /* enable loopback in 10T */
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#define PILR_GPIO1_DATA 0x0200 /* GPIO1 pin */
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#define PILR_GPIO1_DIR 0x0100 /* 1 = input */
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#define PILR_GPIO0_DATA 0x0080 /* GPIO0 pin */
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#define PILR_GPIO0_DIR 0x0040 /* 1 = input */
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#define PILR_AUTO_POL_DIS 0x0020 /* disable auto-polarity */
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#define PILR_REVERSE_POL 0x0010 /* 1 = reverse, 0 = normal */
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#define PILR_RXCLK_CTRL 0x0001 /* disable RX_CLK when idle */
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#define MII_ACPHY_ICSR 0x11 /* interrupt control/status */
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#define ICSR_JABBER_IE 0x8000 /* jabber interrupt enable */
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#define ICSR_RX_ER_IE 0x4000 /* Rx error interrupt enable */
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#define ICSR_PAGE_RX_IE 0x2000 /* page received interrupt enable */
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#define ICSR_PD_FAULT_IE 0x1000 /* parallel detection fault int en */
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#define ICSR_LP_ACK_IE 0x0800 /* link partner ACK interrupt en */
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#define ICSR_LNK_NOT_OK_IE 0x0400 /* link not okay interrupt enable */
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#define ICSR_R_FAULT_IE 0x0200 /* remote fault interrupt enable */
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#define ICSR_ANEG_COMP_IE 0x0100 /* autonegotiation complete int en */
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#define ICSR_JABBER_INT 0x0080 /* jabber interrupt */
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#define ICSR_RX_ER_INT 0x0040 /* Rx error interrupt */
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#define ICSR_PAGE_RX_INT 0x0020 /* page received interrupt */
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#define ICSR_PD_FAULT_INT 0x0010 /* parallel detection fault interrupt */
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#define ICSR_LP_ACK_INT 0x0008 /* link partner ACK interrupt */
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#define ICSR_LNK_NOT_OK_INT 0x0004 /* link not okay interrupt */
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#define ICSR_R_FAULT_INT 0x0002 /* remote fault interrupt */
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#define ICSR_ANEG_COMP_INT 0x0001 /* autonegotiation complete interrupt */
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#define MII_ACPHY_DR 0x12 /* diagnostic register */
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#define DR_DPLX 0x0800 /* full-duplex resolved */
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#define DR_SPEED 0x0400 /* 100BASE-TX resolved */
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#define DR_RX_PASS 0x0200 /* manchester/signal received */
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#define DR_RX_LOCK 0x0100 /* PLL signal has been locked */
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#define MII_ACPHY_PLR 0x13 /* power/loopback register */
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#define PLR_TB125 0x0040 /* Tx transformer ratio 1.25:1 */
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#define PLR_LOW_POWER_MODE 0x0020 /* enable advanced power saving mode */
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#define PLR_TEST_LOOPBACK 0x0010 /* enable test loopback */
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#define PLR_DIGITAL_LOOPBACK 0x0008 /* enable loopback */
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#define PLR_LP_LPBK 0x0004 /* enable link pulse loopback */
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#define PLR_NLP_LINK_INT_TEST 0x0002 /* send NLP instead of FLP */
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#define PLR_REDUCE_TIMER 0x0001 /* reduce time constant for aneg */
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#define MII_ACPHY_CMR 0x14 /* cable measurement register */
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#define CMR_MASK 0x00f0 /* cable measurement mask */
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#define MII_ACPHY_MCR 0x17 /* mode control register */
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#define MCR_NLP_DISABLE 0x4000 /* force good 10BASE-T link */
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#define MCR_FORCE_LINK_UP 0x2000 /* force good 100BASE-TX link */
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#define MCR_JABBER_DISABLE 0x1000 /* disable jabber function */
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#define MCR_10BT_SEL 0x0800 /* enable 7-wire 10T operation */
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#define MCR_CONF_ALED 0x0400 /* 1 = ALED only Rx, 0 = ALED Rx/Tx */
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#define MCR_LED_SEL 0x0200 /* 1 = tqphy-compat LED config */
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#define MCR_FEF_DIS 0x0100 /* disable far-end-fault insertion */
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#define MCR_FORCE_FEF_TX 0x0080 /* force FEF transmission */
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#define MCR_RX_ER_CNT_FULL 0x0040 /* Rx error counter full */
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#define MCR_DIS_RX_ER_CNT 0x0020 /* disable Rx error counter */
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#define MCR_DIS_WDT 0x0010 /* disable the watchdog timer */
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#define MCR_EN_RPBK 0x0008 /* enable remote loopback */
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#define MCR_DIS_SCRM 0x0004 /* enable 100M data scrambling */
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#define MCR_PCSBP 0x0002 /* bypass PCS */
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#define MCR_FX_SEL 0x0001 /* FX mode selected */
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#define MII_ACPHY_AUX_CSR 0x18 /* receive error counter register */
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#endif /* _DEV_MII_ACPHYREG_H_ */
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@ -1,4 +1,4 @@
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# $NetBSD: files.mii,v 1.25 2001/07/12 21:54:40 thorpej Exp $
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# $NetBSD: files.mii,v 1.26 2001/08/24 17:54:32 thorpej Exp $
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file dev/mii/mii.c mii
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@ -10,6 +10,10 @@ file dev/mii/mii_physubr.c mii_phy
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define ukphy_subr
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file dev/mii/ukphy_subr.c ukphy_subr
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device acphy: mii_phy
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attach acphy at mii
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file dev/mii/acphy.c acphy
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device bmtphy: mii_phy
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attach bmtphy at mii
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file dev/mii/bmtphy.c bmtphy
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